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2024-05-20drm/msm: remove python 3.9 dependency for compiling msmAbhinav Kumar1-2/+3
Since commit 5acf49119630 ("drm/msm: import gen_header.py script from Mesa"), compilation is broken on machines having python versions older than 3.9 due to dependency on argparse.BooleanOptionalAction. Switch to use simple bool for the validate flag to remove the dependency. Fixes: 5acf49119630 ("drm/msm: import gen_header.py script from Mesa") Closes: https://lore.kernel.org/all/CA+G9fYs1ZN2K=UHOjrwRR2JNE-M0nf9iW_Q-YPzVgmW+9daU4Q@mail.gmail.com/ Tested-by: Douglas Anderson <[email protected]> Reviewed-by: Dmitry Baryshkov <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/593057/ Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Abhinav Kumar <[email protected]>
2024-05-20drm/amdkfd: Let VRAM allocations go to GTT domain on small APUsLang Yu5-13/+23
Small APUs(i.e., consumer, embedded products) usually have a small carveout device memory which can't satisfy most compute workloads memory allocation requirements. We can't even run a Basic MNIST Example with a default 512MB carveout. https://github.com/pytorch/examples/tree/main/mnist. Error Log: "torch.cuda.OutOfMemoryError: HIP out of memory. Tried to allocate 84.00 MiB. GPU 0 has a total capacity of 512.00 MiB of which 0 bytes is free. Of the allocated memory 103.83 MiB is allocated by PyTorch, and 22.17 MiB is reserved by PyTorch but unallocated" Though we can change BIOS settings to enlarge carveout size, which is inflexible and may bring complaint. On the other hand, the memory resource can't be effectively used between host and device. The solution is MI300A approach, i.e., let VRAM allocations go to GTT. Then device and host can flexibly and effectively share memory resource. v2: Report local_mem_size_private as 0. (Felix) Signed-off-by: Lang Yu <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-20drm/amdkfd: handle duplicate BOs in reserve_bo_and_cond_vmsLang Yu1-1/+2
Observed on gfx8 ASIC where KFD_IOC_ALLOC_MEM_FLAGS_AQL_QUEUE_MEM is used. Two attachments use the same VM, root PD would be locked twice. [ 57.910418] Call Trace: [ 57.793726] ? reserve_bo_and_cond_vms+0x111/0x1c0 [amdgpu] [ 57.793820] amdgpu_amdkfd_gpuvm_unmap_memory_from_gpu+0x6c/0x1c0 [amdgpu] [ 57.793923] ? idr_get_next_ul+0xbe/0x100 [ 57.793933] kfd_process_device_free_bos+0x7e/0xf0 [amdgpu] [ 57.794041] kfd_process_wq_release+0x2ae/0x3c0 [amdgpu] [ 57.794141] ? process_scheduled_works+0x29c/0x580 [ 57.794147] process_scheduled_works+0x303/0x580 [ 57.794157] ? __pfx_worker_thread+0x10/0x10 [ 57.794160] worker_thread+0x1a2/0x370 [ 57.794165] ? __pfx_worker_thread+0x10/0x10 [ 57.794167] kthread+0x11b/0x150 [ 57.794172] ? __pfx_kthread+0x10/0x10 [ 57.794177] ret_from_fork+0x3d/0x60 [ 57.794181] ? __pfx_kthread+0x10/0x10 [ 57.794184] ret_from_fork_asm+0x1b/0x30 Signed-off-by: Lang Yu <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-20drm/amdgpu: Fix amdgpu_vm_is_bo_always_valid kerneldocTvrtko Ursulin1-1/+1
Align kerneldoc with the function argument name. Signed-off-by: Tvrtko Ursulin <[email protected]> Reported-by: Stephen Rothwell <[email protected]> Fixes: 26e20235ce00 ("drm/amdgpu: Add amdgpu_bo_is_vm_bo helper") Cc: Christian König <[email protected]> Cc: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-20drm/amd/display: remove unused struct 'dc_reg_sequence'Dr. David Alan Gilbert1-5/+0
'dc_reg_sequence' was added in commit 44788bbc309b ("drm/amd/display: refactor reg_update") but isn't actually used. Remove it. Signed-off-by: Dr. David Alan Gilbert <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-20drm/amd/display: remove unused struct 'aux_payloads'Dr. David Alan Gilbert1-4/+0
'aux_payloads' is unused since commit eae5ffa9bd7b ("drm/amd/display: Switch ddc to new aux interface") Remove it. Signed-off-by: Dr. David Alan Gilbert <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-20drm/amdgpu: remove unused struct 'hqd_registers'Dr. David Alan Gilbert1-38/+0
'hqd_registers' used to be used in a member of the 'bonaire_mqd' struct. 'bonaire_mqd' was removed by commit 486d807cd9a9 ("drm/amdgpu: remove duplicate definition of cik_mqd") It's now unused. Remove 'hqd_registers' as well. Signed-off-by: Dr. David Alan Gilbert <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-20drm/amd/pm: enable thermal alert on smu 14.0.2/3Kenneth Feng3-3/+108
enable thermal alert on smu 14.0.2/3 Signed-off-by: Kenneth Feng <[email protected]> Reviewed-by: Likun Gao <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-20drm/amd/amdgpu: add thm 14.0.2 header fileKenneth Feng2-0/+1168
add thm 14.0.2 header file v2: add license, update to latest changes (Alex) Signed-off-by: Kenneth Feng <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Reviewed-by: Likun Gao <[email protected]>
2024-05-20Revert "drm/amd/pm: Add gpu_metrics_v1_6"Asad Kamal2-92/+0
Remove gpu_metrics_v1_6 temporarily until tool support is ready This reverts commit 00dedab07b52ca16107e82ce5ca7caaaedf6a417. Signed-off-by: Asad Kamal <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-20Documentation/amdgpu: Add PM policy documentationLijo Lazar1-0/+53
Add documentation about the newly added pm_policy node in sysfs. Signed-off-by: Lijo Lazar <[email protected]> Acked-by: Alex Deucher <[email protected]> Reviewed-by: Asad Kamal <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-20Revert "drm/amd/pm: Use gpu_metrics_v1_6 for SMUv13.0.6"Asad Kamal1-14/+4
Remove gpu_metrics_v1_6 usage for SMUv13.0.6 temporarily and use gpu_metrics_v1_5 until tool support is ready for it. This reverts commit 74ab6253dc077263a61bebfbdd3766b5c11e94be. Signed-off-by: Asad Kamal <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-20drm/amd/pm: Remove unused interface to set plpdLijo Lazar4-91/+0
Remove unused callback to set PLPD policy and its implementation from arcturus, aldebaran and SMUv13.0.6 SOCs. Signed-off-by: Lijo Lazar <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Reviewed-by: Asad Kamal <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-20drm/amdgpu: update type of buf size to u32 for eeprom functionsTao Zhou2-5/+5
Avoid overflow issue. Signed-off-by: Tao Zhou <[email protected]> Reviewed-by: Yang Wang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-20drm/amd/swsmu: update Dpmclocks_t for smu v14.0.1Li Ma1-1/+0
MinGfxClk in Dpmclocks_t is wrong. According to pmfw, dropping an uint8_t spare in Dpmclocks_t. Signed-off-by: Li Ma <[email protected]> Reviewed-by: Yifan Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-20drm/amdgpu: Queue KFD reset workitem in VF FEDVictor Skvortsov1-1/+1
The guest recovery sequence is buggy in Fatal Error when both FLR & KFD reset workitems are queued at the same time. In addition, FLR guest recovery sequence is out of order when PF/VF communication breaks due to a GPU fatal error As a temporary work around, perform a KFD style reset (Initiate reset request from the guest) inside the pf2vf thread on FED. Signed-off-by: Victor Skvortsov <[email protected]> Reviewed-by: Zhigang Luo <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-20drm/amdgpu: Extend KIQ reg polling wait for VFVictor Skvortsov1-3/+3
Runtime KIQ interface to read/write registers in VF may take longer than expected for BM environment. Extend the timeout. Signed-off-by: Victor Skvortsov <[email protected]> Reviewed-by: Zhigang Luo <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-20drm/amd/display: 3.2.286Aric Cyr1-1/+1
This version pairs with DMUB FW Release 0.0.218.0 for dcn314/315/316, dcn35/351, dcn401 and brings along the following: - Fix powerpc compilation - Fix TBT+TypeC Daisy-chain lightup - Fix ODM combine setup - Fix OTC underflow on dcn35 - Fix DVI config for dcn401 - Add ips status info to debugfs - Add 3DLUT DMA load trigger - Modify clock programming to support DPM - Disable dcn401 idle optimizations Acked-by: Roman Li <[email protected]> Signed-off-by: Aric Cyr <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-20drm/amd/display: Fix POWERPC_64 compilationRoman Li1-1/+1
[Why] Compilation errors while compiling without CONFIG_DRM_AMD_DC_FP: "undefined reference to `dc_bandwidth_in_kbps_from_timing'" [How] Fix Makefile to move dsc files out of DC_FP guard. Fixes: 00c391102abc ("drm/amd/display: Add misc DC changes for DCN401") Reviewed-by: Aurabindo Pillai <[email protected]> Signed-off-by: Roman Li <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-20drm/amd/display: Not fallback if link BW is smaller than req BWCruise2-17/+4
[Why] When the link BW is smaller than the request BW, the DP LT just kept running and fallback to lower link config. DP LT just aborted if is_hpd_pending bit is high. But is_hpd_pending bit indicates a new HPD event received. It doesn't mean the HPD is low. [How] Abort the DP LT if the link BW is smaller than the request BW. Remove checking is_hpd_pending bit in DP LT. Reviewed-by: Wenjing Liu <[email protected]> Acked-by: Roman Li <[email protected]> Signed-off-by: Cruise <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-20drm/amd/display: Correct display clocks update block sequenceDillon Varone2-313/+272
[WHY&HOW] At the time of block sequence construction, the exact reference DPP/DISP clock is not yet known, so the clock should be passed by reference to the DTO programming function. Reviewed-by: Alvin Lee <[email protected]> Acked-by: Roman Li <[email protected]> Signed-off-by: Dillon Varone <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-20drm/amd/display: Disable DCN401 idle optimizationsDillon Varone1-0/+1
[WHY&HOW] Disable to improve stability for now. Reviewed-by: Alvin Lee <[email protected]> Acked-by: Roman Li <[email protected]> Signed-off-by: Dillon Varone <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-20drm/amd/display: Fix ODM + underscan case with cursorAlvin Lee1-3/+9
[Description] There is a corner case where we're in an ODM config that has recout.x != 0. In these scenarios we have to take into account the extra offset in the ODM adjustment for cursor. Reviewed-by: Aric Cyr <[email protected]> Acked-by: Roman Li <[email protected]> Signed-off-by: Alvin Lee <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-20drm/amd/display: fix a typo which causes an incorrect ODM combine setupWenjing Liu1-1/+1
[why] A recent change for ODM combine refactor contains a typo which causes ODM combine mode programmed incorrectly. Reviewed-by: George Shen <[email protected]> Acked-by: Roman Li <[email protected]> Signed-off-by: Wenjing Liu <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-20drm/amd/display: Remove redundant idle optimization checkRoman Li1-3/+0
[Why] Disable idle optimization for each atomic commit is unnecessary, and can lead to a potential race condition. [How] Remove idle optimization check from amdgpu_dm_atomic_commit_tail() Fixes: 196107eb1e15 ("drm/amd/display: Add IPS checks before dcn register access") Cc: [email protected] Reviewed-by: Hamza Mahfooz <[email protected]> Acked-by: Roman Li <[email protected]> Signed-off-by: Roman Li <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-20drm/amd/display: Fix pipe addition logic in calc_blocks_to_ungate DCN35Nicholas Susanto1-1/+2
[Why] Missing check for when there is new pipe configuration but both cur_pipe and new_pipe are both populated causing update_state of DSC for that instance not being updated correctly. This causes some display mode changes to cause underflow since DSCCLK is still gated when the display requires DSC. [How] Added another condition in the new pipe addition branch that checks if there is a new pipe configuration and if it is not the same as cur_pipe. cur_pipe does not necessarily have to be NULL to go in this branch. Reviewed-by: Nicholas Kazlauskas <[email protected]> Acked-by: Roman Li <[email protected]> Signed-off-by: Nicholas Susanto <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-20drm/amd/display: Add ips status info to debugfsRoman Li1-0/+47
[Why] For debugging and testing purposes. [How] If IPS is supported create ips_status debugfs entry. Usage: cat /sys/kernel/debug/dri/0/amdgpu_dm_ips_status Reviewed-by: Jerry Zuo <[email protected]> Acked-by: Roman Li <[email protected]> Signed-off-by: Roman Li <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-20drm/amd/display: Clear shared dmub firmware state on initRoman Li1-0/+3
[Why] Reset the shared dmub firmware region on dmub hw init to start with known state. [How] Memset the shared region to 0 in dmub_hw_init(). Suggested-by: Nicholas Kazlauskas <[email protected]> Reviewed-by: Nicholas Kazlauskas <[email protected]> Signed-off-by: Roman Li <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-20drm/amd/display: Add 3DLUT DMA load triggerIlya Bakoulin5-4/+25
[Why/How] Need to be able to trigger a DMA load to update 3DLUT contents in MPC. Adding a HWSS function to serve as the trigger. Reviewed-by: Krunoslav Kovac <[email protected]> Acked-by: Roman Li <[email protected]> Signed-off-by: Ilya Bakoulin <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-20drm/amd/display: Deallocate DML 2.1 Memory AllocationChris Park3-0/+9
[Why] DML 2.1 allocates two types of memory in its ctx structure but does not destroy them, causing memory leak whenever DML 2.1 instance is created and destroyed. [How] Deallocate two instances of allocated memory whenever DML 2.1 is destroyed. Reviewed-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Chris Park <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-20drm/amd/display: Add NULL check within get_target_mpc_factorHersen Wu1-0/+9
[Why] Coverity reports NULL_RETURN warning. [How] Add pointer NULL check. Reviewed-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Hersen Wu <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-20drm/amd/pm: update driver-if interfaceKenneth Feng2-3/+20
update driver-if interface for smu 14.0.2/3 Signed-off-by: Kenneth Feng <[email protected]> Reviewed-by: Yang Wang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-20drm/amd/display: Add missing DML2 var helpersRodrigo Siqueira2-0/+4
Acked-by: Roman Li <[email protected]> Signed-off-by: Rodrigo Siqueira <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-20drm/amd/display: Modify HPO pixel clock programming to support DPMDillon Varone1-4/+4
Need to select DTBCLK and DPREFCLK as DTBCLK_p source according to hardware guidance. Reviewed-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Dillon Varone <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-20drm/amd/display: Refactor HUBBUB into component folder for DCN401Harikrishna Revalla4-2/+5
[why] Cleaning up the code refactor requires hubbub to be in its own component. [how] Move all DCN401 files under newly created hubbub folder and fixing the makefiles. Reviewed-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Harikrishna Revalla <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-20drm/amd/display: enable EASF support for DCN40Samson Tam9-34/+382
[Why] Enable adaptive scaler support for DCN401 [How] - Enable build flag for SPL - Set prefer_easf flag to true - Apply light linear scaling policy based on transfer function and pixel format. Choose between linear or non-linear scaling - Set matrix_mode based on pixel format - Disable ring estimator - Add missing EASF register defines, masks, and writes - Disable EASF if scale ratio or number of taps is unsupported and when bypassing the scaler - Add debug flags and registry keys for debugging SPL and EASF - Add support for Visual Confirm with EASF Reviewed-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Samson Tam <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-20drm/amd/display: Adjust incorrect indentations and spacesAlex Hung10-17/+13
This fixes indentations and adjust spaces for better readability and code styles. Reviewed-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Hung <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-20drm/amd/display: Use the correct TMDS function to avoid DVI issuesChris Park1-1/+1
[Why] DVI is TMDS signal like HDMI but without audio. Current signal check does not correctly reflect DVI clock programming. [How] Define a new signal check for TMDS that includes DVI to HDMI TMDS programming. Reviewed-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Chris Park <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-20drm/amd/display: Fix incorrect DCN401 comparisonAlex Hung1-2/+2
The comparisons intend to be DCN401 inclusive, and fix it by adding equal signs. Reviewed-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Hung <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-20drm/amd/display: Add missing enable and disable symclk_se functions for dcn401Wenjing Liu4-1/+181
The functions are missing. These two functions are required to support MST. Reviewed-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Wenjing Liu <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-20drm/amd/display: Remove duplicate configurationRodrigo Siqueira1-18/+0
The function that commits planes calls the same set of functions twice, and in the case of the FAMs utilization, it is not desired to call the dmub, hwss_build and hwss_execute. This commit just removes the unnecessary calls to those functions. Acked-by: Roman Li <[email protected]> Signed-off-by: Rodrigo Siqueira <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-20drm/amd/display: Move DSC functions from dc.c to dc_dsc.cWenjing Liu2-99/+96
Move dsc functions from dc.c to dc_dsc.c. Co-developed-by: George Shen <[email protected]> Signed-off-by: George Shen <[email protected]> Signed-off-by: Wenjing Liu <[email protected]> Reviewed-by: Rodrigo Siqueira <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-05-20drm/v3d: Use V3D_MAX_COUNTERS instead of V3D_PERFCNT_NUMMaíra Canal2-2/+5
V3D_PERFCNT_NUM represents the maximum number of performance counters for V3D 4.2, but not for V3D 7.1. This means that, if we use V3D_PERFCNT_NUM, we might go out-of-bounds on V3D 7.1. Therefore, use the number of performance counters on V3D 7.1 as the maximum number of counters. This will allow us to create arrays on the stack with reasonable size. Note that userspace must use the value provided by DRM_V3D_PARAM_MAX_PERF_COUNTERS. Signed-off-by: Maíra Canal <[email protected]> Reviewed-by: Iago Toral Quiroga <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-05-20drm/v3d: Create new IOCTL to expose performance counters informationMaíra Canal3-0/+36
Userspace usually needs some information about the performance counters available. Although we could replicate this information in the kernel and user-space, let's use the kernel as the "single source of truth" to avoid issues in the future (e.g. list of performance counters is updated in user-space, but not in the kernel, generating invalid requests). Therefore, create a new IOCTL to expose the performance counters information, that is name, category, and description. Signed-off-by: Maíra Canal <[email protected]> Reviewed-by: Iago Toral Quiroga <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-05-20drm/v3d: Create a new V3D parameter for the maximum number of perfcntMaíra Canal1-0/+3
The maximum number of performance counters can change from version to version and it's important for userspace to know this value, as it needs to use the counters for performance queries. Therefore, expose the maximum number of performance counters to userspace as a parameter. Signed-off-by: Maíra Canal <[email protected]> Reviewed-by: Iago Toral Quiroga <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-05-20drm/v3d: Different V3D versions can have different number of perfcntMaíra Canal3-1/+14
Currently, even though V3D 7.1 has 93 performance counters, it is not possible to create counters bigger than 87, as `v3d_perfmon_create_ioctl()` understands that counters bigger than 87 are invalid. Therefore, create a device variable to expose the maximum number of counters for a given V3D version and make `v3d_perfmon_create_ioctl()` check this variable. This commit fixes CTS failures in the performance queries tests `dEQP-VK.query_pool.performance_query.*` [1] Link: https://gitlab.freedesktop.org/mesa/mesa/-/commit/ea1f09a5f21839f4f3b93610b58507c4bd9b9b81 [1] Fixes: 6fd9487147c4 ("drm/v3d: add brcm,2712-v3d as a compatible V3D device") Signed-off-by: Maíra Canal <[email protected]> Reviewed-by: Iago Toral Quiroga <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-05-20drm/v3d: Add Performance Counters descriptions for V3D 4.2 and 7.1Maíra Canal2-0/+210
Add name, category and description for each one of the 93 performance counters available on V3D. Note that V3D 4.2 has 87 performance counters, while V3D 7.1 has 93. Therefore, there are two performance counters arrays. The index of the performance counter for each V3D version is represented by its position on the array. Signed-off-by: Maíra Canal <[email protected]> Reviewed-by: Iago Toral Quiroga <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-05-20Merge tag 'i2c-for-6.10-rc1' of ↵Linus Torvalds1-1/+1
git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux Pull i2c updates from Wolfram Sang: "i2c core removes an argument from the i2c_mux_add_adapter() call to further deprecate class based I2C device instantiation. All users are converted, too. Other that that, Andi collected a number if I2C host driver patches. Those merges have their own description" * tag 'i2c-for-6.10-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux: (72 commits) power: supply: sbs-manager: Remove class argument from i2c_mux_add_adapter() i2c: mux: Remove class argument from i2c_mux_add_adapter() i2c: synquacer: Fix an error handling path in synquacer_i2c_probe() i2c: acpi: Unbind mux adapters before delete i2c: designware: Replace MODULE_ALIAS() with MODULE_DEVICE_TABLE() i2c: pxa: use 'time_left' variable with wait_event_timeout() i2c: s3c2410: use 'time_left' variable with wait_event_timeout() i2c: rk3x: use 'time_left' variable with wait_event_timeout() i2c: qcom-geni: use 'time_left' variable with wait_for_completion_timeout() i2c: jz4780: use 'time_left' variable with wait_for_completion_timeout() i2c: synquacer: use 'time_left' variable with wait_for_completion_timeout() i2c: stm32f7: use 'time_left' variable with wait_for_completion_timeout() i2c: stm32f4: use 'time_left' variable with wait_for_completion_timeout() i2c: st: use 'time_left' variable with wait_for_completion_timeout() i2c: omap: use 'time_left' variable with wait_for_completion_timeout() i2c: imx-lpi2c: use 'time_left' variable with wait_for_completion_timeout() i2c: hix5hd2: use 'time_left' variable with wait_for_completion_timeout() i2c: exynos5: use 'time_left' variable with wait_for_completion_timeout() i2c: digicolor: use 'time_left' variable with wait_for_completion_timeout() i2c: amd-mp2-plat: use 'time_left' variable with wait_for_completion_timeout() ...
2024-05-20drm/i915/psr: PSR2_CTL[Block Count Number] not needed for LunarLakeJouni Högander1-1/+1
PSR2_CTL[Block Count Number] is not used by LunarLake do not configure it. Bspec: 69885 Signed-off-by: Jouni Högander <[email protected]> Reviewed-by: Uma Shankar <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-05-20drm/i915/psr: LunarLake PSR2_CTL[IO Wake Lines] is 6 bits wideJouni Högander2-0/+6
On LunarLake PSR2_CTL[IO Wake Lines] contains now bit 13:18. Take this into account when enabling PSR2_CTL. Bspec: 69885 Signed-off-by: Jouni Högander <[email protected]> Reviewed-by: Uma Shankar <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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