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2024-06-26gpu: ipu-v3: pre: add dynamic buffer layout reconfigurationLucas Stach3-30/+63
imx-drm doesn't mandate a modeset when the framebuffer modifier changes, but currently the tile prefetch and resolve (TPR) configuration of the PRE is only set up on the initial modeset. As the TPR configuration is double buffered, same as all the other PRE states, we can support dynamic reconfiguration of the buffer layout from one frame to another. As switching between (super-)tiled and linear prefetch needs to touch the CTRL register make sure to do the reconfiguration inside the safe window. Signed-off-by: Lucas Stach <[email protected]> Reviewed-by: Philipp Zabel <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Philipp Zabel <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-06-26gpu: ipu-v3: pre: move state into structLucas Stach1-12/+15
Move the variables tracking the current dynamic state into a struct to separate it a bit better from the static device properties. Signed-off-by: Lucas Stach <[email protected]> Reviewed-by: Philipp Zabel <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Philipp Zabel <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-06-26gpu: ipu-v3: pre: replace of_node_put() with __freeR Sundar1-5/+2
use the new cleanup magic to replace of_node_put() with __free(device_node) marking to auto release when they get out of scope. Suggested-by: Julia Lawall <[email protected]> Signed-off-by: R Sundar <[email protected]> Reviewed-by: Philipp Zabel <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Philipp Zabel <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-06-26drm/etnaviv: don't block scheduler when GPU is still activeLucas Stach1-5/+4
Since 45ecaea73883 ("drm/sched: Partial revert of 'drm/sched: Keep s_fence->parent pointer'") still active jobs aren't put back in the pending list on drm_sched_start(), as they don't have a active parent fence anymore, so if the GPU is still working and the timeout is extended, all currently active jobs will be freed. To avoid prematurely freeing jobs that are still active on the GPU, don't block the scheduler until we are fully committed to actually reset the GPU. As the current job is already removed from the pending list and will not be put back when drm_sched_start() isn't called, we must make sure to put the job back on the pending list when extending the timeout. Cc: [email protected] #6.0 Signed-off-by: Lucas Stach <[email protected]> Reviewed-by: Philipp Zabel <[email protected]> Reviewed-by: Christian Gmeiner <[email protected]>
2024-06-26drm/etnaviv: reduce number of ktime_get calls in IRQ handlerLucas Stach1-1/+2
A single IRQ might signal the completion of multiple jobs/fences at once. There is no point in attaching a new timestamp to each fence that only differs in when exactly the IRQ handler was able to process this fence. Get a single timestamp when the IRQ handler has determined that there are completed jobs and reuse this for all fences that get signalled by the handler. Signed-off-by: Lucas Stach <[email protected]> Reviewed-by: Philipp Zabel <[email protected]> Reviewed-by: Christian Gmeiner <[email protected]>
2024-06-26drm/qxl: Add check for drm_cvt_modeChen Ni1-0/+3
Add check for the return value of drm_cvt_mode() and return the error if it fails in order to avoid NULL pointer dereference. Fixes: 1b043677d4be ("drm/qxl: add qxl_add_mode helper function") Signed-off-by: Chen Ni <[email protected]> Reviewed-by: Heng Qi <[email protected]> Signed-off-by: Maxime Ripard <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-06-26drm/etnaviv: fix DMA direction handling for cached RW buffersLucas Stach1-2/+4
The dma sync operation needs to be done with DMA_BIDIRECTIONAL when the BO is prepared for both read and write operations. Fixes: a8c21a5451d8 ("drm/etnaviv: add initial etnaviv DRM driver") Signed-off-by: Lucas Stach <[email protected]> Reviewed-by: Philipp Zabel <[email protected]> Reviewed-by: Christian Gmeiner <[email protected]>
2024-06-26drm/etnaviv: switch devcoredump allocations to GFP_NOWAITLucas Stach1-3/+2
The etnaviv devcoredump is created in the GPU reset path, which must make forward progress to avoid stalling memory reclaim on unsignalled dma fences. The currently used __GFP_NORETRY does not prohibit sleeping on direct reclaim, breaking the forward progress guarantee. Switch to GFP_NOWAIT, which allows background reclaim to be triggered, but avoids any stalls waiting for direct reclaim. Signed-off-by: Lucas Stach <[email protected]> Reviewed-by: Daniel Vetter <[email protected]>
2024-06-26drm/mediatek: Fix bit depth overwritten for mtk_ovl_set bit_depth()Jason-JH.Lin1-13/+8
Refine the value and mask define of bit depth for mtk_ovl_set bit_depth(). Use cmdq_pkt_write_mask() instead of cmdq_pkt_write() to avoid bit depth settings being overwritten. Fixes: fb36c5020c9c ("drm/mediatek: Add support for AR30 and BA30 overlays") Signed-off-by: Jason-JH.Lin <[email protected]> Reviewed-by: AngeloGioacchino Del Regno <[email protected]> Link: https://patchwork.kernel.org/project/dri-devel/patch/[email protected]/ Signed-off-by: Chun-Kuang Hu <[email protected]>
2024-06-26drm/i915/display: For MTL+ platforms skip mg dp programmingImre Deak1-0/+3
For MTL+ platforms we use PICA chips for Type-C support and hence mg programming is not needed. Fixes issue with drm warn of TC port not being in legacy mode. Cc: [email protected] Signed-off-by: Mika Kahola <[email protected]> Signed-off-by: Imre Deak <[email protected]> Reviewed-by: Gustavo Sousa <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-06-26drm/mediatek: select DRM_GEM_DMA_HELPER if DRM_FBDEV_EMULATION=yChen-Yu Tsai1-0/+1
With the recent switch from fbdev-generic to fbdev-dma, the driver now requires the DRM GEM DMA helpers. This dependency is missing, and will cause a link failure if fbdev emulation is enabled. Add the missing dependency. Fixes: 0992284b4fe4 ("drm/mediatek: Use fbdev-dma") Signed-off-by: Chen-Yu Tsai <[email protected]> Reviewed-by: Thomas Zimmermann <[email protected]> Acked-by: Chun-Kuang Hu <[email protected]> Signed-off-by: Thomas Zimmermann <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-06-25drm/nouveau/dispnv04: fix null pointer dereference in nv17_tv_get_ld_modesMa Ke1-0/+2
In nv17_tv_get_ld_modes(), the return value of drm_mode_duplicate() is assigned to mode, which will lead to a possible NULL pointer dereference on failure of drm_mode_duplicate(). Add a check to avoid npd. Cc: [email protected] Signed-off-by: Ma Ke <[email protected]> Signed-off-by: Lyude Paul <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-06-25drm/nouveau/dispnv04: fix null pointer dereference in nv17_tv_get_hd_modesMa Ke1-0/+4
In nv17_tv_get_hd_modes(), the return value of drm_mode_duplicate() is assigned to mode, which will lead to a possible NULL pointer dereference on failure of drm_mode_duplicate(). The same applies to drm_cvt_mode(). Add a check to avoid null pointer dereference. Cc: [email protected] Signed-off-by: Ma Ke <[email protected]> Signed-off-by: Lyude Paul <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-06-25drm/amdgpu: Don't show false warning for reg listLijo Lazar2-6/+24
If reg list is already loaded on PSP 13.0.2 SOCs, psp will give TEE_ERR_CANCEL response on second time load. Avoid printing warn message for it. Signed-off-by: Lijo Lazar <[email protected]> Reviewed-by: Feifei Xu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-06-25drm/amdgpu: avoid using null object of framebufferJulia Zhang1-2/+16
Instead of using state->fb->obj[0] directly, get object from framebuffer by calling drm_gem_fb_get_obj() and return error code when object is null to avoid using null object of framebuffer. Reported-by: Fusheng Huang <[email protected]> Signed-off-by: Julia Zhang <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2024-06-25drm/amd/display: Send DP_TOTAL_LTTPR_CNT during detection if LTTPR is presentMichael Strauss2-1/+14
[WHY] New register field added in DP2.1 SCR, needed for auxless ALPM [HOW] Echo value read from 0xF0007 back to sink Reviewed-by: Wenjing Liu <[email protected]> Cc: Mario Limonciello <[email protected]> Cc: Alex Deucher <[email protected]> Cc: [email protected] Signed-off-by: Alex Hung <[email protected]> Signed-off-by: Michael Strauss <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-06-25drm/amdgpu: Fix pci state save during mode-1 resetLijo Lazar1-2/+5
Cache the PCI state before bus master is disabled. The saved state is later used for other cases like restoring config space after mode-2 reset. Fixes: 5c03e5843e6b ("drm/amdgpu:add smu mode1/2 support for aldebaran") Signed-off-by: Lijo Lazar <[email protected]> Reviewed-by: Feifei Xu <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-06-25drm/amdgpu/atomfirmware: fix parsing of vram_infoAlex Deucher1-1/+1
v3.x changed the how vram width was encoded. The previous implementation actually worked correctly for most boards. Fix the implementation to work correctly everywhere. This fixes the vram width reported in the kernel log on some boards. Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2024-06-25drm/amd/swsmu: add MALL init support workaround for smu_v14_0_1Li Ma5-3/+96
[Why] SMU firmware has not supported MALL PG. [How] Disable MALL PG and make it always on until SMU firmware is ready. Signed-off-by: Li Ma <[email protected]> Reviewed-by: Tim Huang <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-06-25drm/vmwgfx: Use VMware hypercall APIAlexey Makhalov3-358/+196
Switch from VMWARE_HYPERCALL macro to vmware_hypercall API. Eliminate arch specific code. drivers/gpu/drm/vmwgfx/vmwgfx_msg_arm64.h: implement arm64 variant of vmware_hypercall. And keep it here until introduction of ARM64 VMWare hypervisor interface. Signed-off-by: Alexey Makhalov <[email protected]> Signed-off-by: Borislav Petkov (AMD) <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2024-06-25drm/msm/dpu: remove CRTC frame event callback registrationDmitry Baryshkov5-64/+18
The frame event callback is always set to dpu_crtc_frame_event_cb() (or to NULL) and the data is always either the CRTC itself or NULL (correpondingly). Thus drop the event callback registration, call the dpu_crtc_frame_event_cb() directly and gate on the dpu_enc->crtc assigned using dpu_encoder_assign_crtc(). Signed-off-by: Dmitry Baryshkov <[email protected]> Reviewed-by: Abhinav Kumar <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/600751/ Link: https://lore.kernel.org/r/[email protected]
2024-06-25drm/connector: hdmi: shorten too long function nameDmitry Baryshkov1-3/+3
If CONFIG_MODVERSIONS is enabled, then using the HDMI Connector framework can result in build failures. Rename the function to make it fit into the name requirements. ERROR: modpost: too long symbol "drm_atomic_helper_connector_hdmi_disable_audio_infoframe" [drivers/gpu/drm/msm/msm.ko] Reported-by: Mark Brown <[email protected]> Reviewed-by: Maxime Ripard <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/20240624-hdmi-connector-shorten-name-v1-1-5bd3410138db@linaro.org Signed-off-by: Dmitry Baryshkov <[email protected]>
2024-06-25drm/ttm/tests: add missing MODULE_DESCRIPTION() macrosJeff Johnson8-0/+8
make allmodconfig && make W=1 C=1 reports: WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/gpu/drm/ttm/tests/ttm_device_test.o WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/gpu/drm/ttm/tests/ttm_pool_test.o WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/gpu/drm/ttm/tests/ttm_resource_test.o WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/gpu/drm/ttm/tests/ttm_tt_test.o WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/gpu/drm/ttm/tests/ttm_bo_test.o WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/gpu/drm/ttm/tests/ttm_bo_validate_test.o WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/gpu/drm/ttm/tests/ttm_mock_manager.o WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/gpu/drm/ttm/tests/ttm_kunit_helpers.o Add the missing invocations of the MODULE_DESCRIPTION() macro. Signed-off-by: Jeff Johnson <[email protected]> Acked-by: Christian König <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/20240624-md-drivers-gpu-drm-ttm-tests-v2-1-76bb765e19c9@quicinc.com Signed-off-by: Christian König <[email protected]>
2024-06-25drm/i915/psr: Modify dg2_activate_panel_replay to support eDPJouni Högander1-0/+13
There are couple of bits in PSR2_CTL which needs to be written in case of eDP Panel Replay Bspec: 68920 v2: use boolean instead of assuming eDP Panel Replay mean Early Transport Signed-off-by: Jouni Högander <[email protected]> Reviewed-by: Animesh Manna <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-06-25drm/i915/psr: Check Early Transport for Panel Replay as wellJouni Högander1-3/+3
Move Early Transport validity check to be performed for Panel Replay as well and use Early Transport for eDP Panel Replay always. v2:set crtc_state->enable_psr2_su_region_et directly (not in if block) Signed-off-by: Jouni Högander <[email protected]> Reviewed-by: Animesh Manna <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-06-25drm/i915/psr: Perform scanline indication check for Panel Replay as wellJouni Högander1-6/+6
Scanline indication needs to be checked and configure for both PSR2 and Panel Replay Selective Update. Move this check to intel_sel_update_config_valid. Signed-off-by: Jouni Högander <[email protected]> Reviewed-by: Animesh Manna <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-06-25drm/i915/psr: Perform psr2 checks related to ALPM for Panel ReplayJouni Högander1-13/+28
eDP1.5 support ALPM with Panel Replay as well. We need to check ALPM related things for Panel Replay as well. Bspec: 68920 v5: - instead of using crtc_state->has_panel_replay provide aux_less flag v4: - do not move _compute_psr2_sdp_prior_scanline_indication - move ALPM related checks to separate function v3: move vblank check as well v2: do not move Vblank >= PSR2_CTL Block Count Number maximum line count check Signed-off-by: Jouni Högander <[email protected]> Reviewed-by: Animesh Manna <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-06-25drm/i915/alpm: Make crtc_state as const in intel_alpm_compute_paramsJouni Högander2-5/+6
Intel_alpm_compute_params doesn't change crtc_state. Let's convert it as const. Signed-off-by: Jouni Högander <[email protected]> Reviewed-by: Animesh Manna <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-06-25drm/i915/psr: HW will not allow PR on eDP when HDCP enabledJouni Högander1-0/+14
Take into account in Panel Replay compute config that HW will not allow PR on eDP when HDCP enabled. v2: add debug message to print out why Panel Replay is not possible Signed-off-by: Jouni Högander <[email protected]> Reviewed-by: Animesh Manna <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-06-25drm/i915/psr: 128b/132b Panel Replay is not supported on eDPJouni Högander1-2/+19
Take into account that 128b/132b Panel Replay is not supported on eDP. Bspec: 68920 v2: - make crtc_state as const - add debug message to print out why Panel Replay is not possible Signed-off-by: Jouni Högander <[email protected]> Reviewed-by: Animesh Manna <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-06-25drm/i915/psr: Check panel Early Transport capability for eDP PRJouni Högander1-5/+12
Our HW doesn't support panel replay without Early Transport on eDP. Bspec: 68920 Signed-off-by: Jouni Högander <[email protected]> Reviewed-by: Animesh Manna <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-06-25drm/i915/psr: enable sink for eDP1.5 Panel ReplayJouni Högander1-6/+30
eDP1.5 allows Panel Replay on eDP as well. Take this into account when enabling sink PSR/Panel Replay. Write also PANEL_REPLAY_CONFIG2 register accordingly. v3: - set DP_PANEL_REPLAY_CRC_VERIFICATION in PANEL_REPLAY_CONFIG2 - PANEL_REPLAY_CONFIG2 is available in DP2.1 as well v2: do not configure ALPM for DP2.0 Panel Replay Signed-off-by: Jouni Högander <[email protected]> Reviewed-by: Animesh Manna <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-06-25drm/i915/psr: Inform Panel Replay source support on eDP as wellJouni Högander1-2/+4
Display version >= 20 support eDP 1.5. Inform Panel Replay source support on eDP for display version >= 20. Bspec: 68920 Signed-off-by: Jouni Högander <[email protected]> Reviewed-by: Animesh Manna <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-06-25drm/i915/psr: Check panel ALPM capability for eDP Panel ReplayJouni Högander1-0/+7
Our HW doesn't support Panel Replay without AUX_LESS ALPM on eDP. Check panel support for this and prevent eDP panel replay if it doesn't exits. Bspec: 68920 v3: remove excessive parens v2: use intel_alpm_aux_less_wake_supported Signed-off-by: Jouni Högander <[email protected]> Reviewed-by: Animesh Manna <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-06-25drm/msm/dsi: Add phy configuration for MSM8937Daniil Titov3-0/+21
Add phy configuration for 28nm dsi phy found on MSM8937 SoC. Only difference from existing msm8916 configuration is number of phy and io_start addresses. Signed-off-by: Daniil Titov <[email protected]> Reviewed-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Barnabás Czémán <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/600518/ Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Dmitry Baryshkov <[email protected]>
2024-06-25drm/msm/mdp5: Add MDP5 configuration for MSM8937Daniil Titov1-0/+88
Add the mdp5_cfg_hw entry for MDP5 version v1.14 found on msm8937. Signed-off-by: Daniil Titov <[email protected]> Signed-off-by: Barnabás Czémán <[email protected]> Reviewed-by: Dmitry Baryshkov <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/600513/ Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Dmitry Baryshkov <[email protected]>
2024-06-25drm/msm/mdp5: Remove MDP_CAP_SRC_SPLIT from msm8x53_configBarnabás Czémán1-2/+1
Remove MDP_CAP_SRC_SPLIT from msm8x53_config because it is not referenced in downstream. Fixes: fb25d4474fa0 ("drm/msm/mdp5: Add configuration for MDP v1.16") Signed-off-by: Barnabás Czémán <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/600521/ Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Dmitry Baryshkov <[email protected]>
2024-06-24drm/msm/dp: switch to struct drm_edidJani Nikula3-40/+20
Prefer the struct drm_edid based functions for reading the EDID and updating the connector. Simplify the flow by updating the EDID property when the EDID is read instead of at .get_modes. Signed-off-by: Jani Nikula <[email protected]> Reviewed-by: Dmitry Baryshkov <[email protected]> Reviewed-by: Douglas Anderson <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/593976/ Link: https://lore.kernel.org/r/93d6c446ed4831dadfb4a77635a67cf5f27e19ff.1715691257.git.jani.nikula@intel.com Signed-off-by: Dmitry Baryshkov <[email protected]>
2024-06-24drm/msm/dpu: guard ctl irq callback register/unregisterBarnabás Czémán1-2/+2
CTLs on older qualcomm SOCs like msm8953 and msm8996 has not got interrupts, so better to skip CTL irq callback register/unregister make dpu_ctl_cfg be able to define without intr_start. Signed-off-by: Barnabás Czémán <[email protected]> Reviewed-by: Dmitry Baryshkov <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/596854/ Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Dmitry Baryshkov <[email protected]>
2024-06-24drm/msm/dpu: rename dpu_hw_setup_vsync_source functionsDmitry Baryshkov1-7/+7
Rename dpu_hw_setup_vsync_source functions to make the names match the implementation: on DPU 5.x the TOP only contains timer setup, while 3.x and 4.x used MDP_VSYNC_SEL register to select TE source. Signed-off-by: Dmitry Baryshkov <[email protected]> Reviewed-by: Abhinav Kumar <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/598745/ Link: https://lore.kernel.org/r/[email protected]
2024-06-24drm/msm/dpu: support setting the TE sourceDmitry Baryshkov1-1/+43
Make the DPU driver use the TE source specified in the DT. If none is specified, the driver defaults to the first GPIO (mdp_vsync_p). Signed-off-by: Dmitry Baryshkov <[email protected]> Reviewed-by: Abhinav Kumar <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/598733/ Link: https://lore.kernel.org/r/[email protected]
2024-06-24drm/msm/dsi: parse vsync source from device treeDmitry Baryshkov4-0/+24
Allow board's device tree to specify the vsync source (aka TE source). If the property is omitted, the display controller driver will use the default setting. Reviewed-by: Abhinav Kumar <[email protected]> [DB: fixed clearing of return value if there is no TE property] Signed-off-by: Dmitry Baryshkov <[email protected]> Reviewed-by: Marijn Suijten <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/598740/ Link: https://lore.kernel.org/r/[email protected]
2024-06-24drm/msm/dpu: rework vsync_source handlingDmitry Baryshkov3-7/+5
The struct msm_display_info has is_te_using_watchdog_timer field which is neither set anywhere nor is flexible enough to specify different sources. Replace it with the field specifying the vsync source using enum dpu_vsync_source. Reviewed-by: Abhinav Kumar <[email protected]> Signed-off-by: Dmitry Baryshkov <[email protected]> Reviewed-by: Marijn Suijten <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/598738/ Link: https://lore.kernel.org/r/[email protected]
2024-06-24drm/msm/dpu: pull the is_cmd_mode out of _dpu_encoder_update_vsync_source()Dmitry Baryshkov1-3/+3
Setting vsync source makes sense only for DSI CMD panels. Pull the is_cmd_mode condition out of the function into the calling code, so that it becomes more explicit. Reviewed-by: Abhinav Kumar <[email protected]> Signed-off-by: Dmitry Baryshkov <[email protected]> Reviewed-by: Marijn Suijten <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/598736/ Link: https://lore.kernel.org/r/[email protected]
2024-06-24drm/msm/dsi: drop unused GPIOs handlingDmitry Baryshkov1-37/+0
Neither disp-enable-gpios nor disp-te-gpios are defined in the schema. None of the board DT files use those GPIO pins. Drop them from the driver. Reviewed-by: Abhinav Kumar <[email protected]> Signed-off-by: Dmitry Baryshkov <[email protected]> Reviewed-by: Marijn Suijten <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/598734/ Link: https://lore.kernel.org/r/[email protected]
2024-06-24drm/msm/dpu: convert vsync source defines to the enumDmitry Baryshkov5-16/+18
Add enum dpu_vsync_source instead of a series of defines. Use this enum to pass vsync information. Reviewed-by: Abhinav Kumar <[email protected]> Signed-off-by: Dmitry Baryshkov <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/598743/ Link: https://lore.kernel.org/r/[email protected]
2024-06-24drm/i915: Use the same vblank worker for atomic unpinMaarten Lankhorst5-2/+49
In case of legacy cursor update, the cursor VMA needs to be unpinned only after vblank. This exceeds the lifetime of the whole atomic commit. Any trick I attempted to keep the atomic commit alive didn't work, as drm_atomic_helper_setup_commit() force throttles on any old commit that wasn't cleaned up. The only option remaining is to remove the plane from the atomic commit, and use the same path as the legacy cursor update to clean the state after vblank. Changes since previous version: - Call the memset for plane state immediately when scheduling vblank, this prevents a use-after-free in cursor cleanup. Signed-off-by: Maarten Lankhorst <[email protected]> Reviewed-by: Uma Shankar <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-06-24drm/i915: Use vblank worker to unpin old legacy cursor fb safelyVille Syrjälä3-2/+30
The cursor hardware only does sync updates, and thus the hardware will be scanning out from the old fb until the next start of vblank. So in order to make the legacy cursor fastpath actually safe we should not unpin the old fb until we're sure the hardware has ceased accessing it. The simplest approach is to just use a vblank work here to do the delayed unpin. Not 100% sure it's a good idea to put this onto the same high priority vblank worker as eg. our timing critical gamma updates. But let's keep it simple for now, and it we later discover that this is causing problems we can think about adding a lower priority worker for such things. This patch is slightly reworked by Maarten Cc: Maarten Lankhorst <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Signed-off-by: Maarten Lankhorst <[email protected]> Reviewed-by: Uma Shankar <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-06-24drm: Add drm_vblank_work_flush_all().Maarten Lankhorst1-0/+22
In some cases we want to flush all vblank work, right before vblank_off for example. Add a simple function to make this possible. Check that both pending_work and running work are empty when flushing. Co-Developed-by: Chaitanya Kumar Borah <[email protected]> Signed-off-by: Maarten Lankhorst <[email protected]> Reviewed-by: Uma Shankar <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-06-24drm/i915: Nuke the TGL+ chroma plane tile row alignment stuffVille Syrjälä3-26/+1
I don't think the display hardware really has such chroma plane tile row alignment requirements as outlined in commit d156135e6a54 ("drm/i915/tgl: Make sure a semiplanar UV plane is tile row size aligned") Bspec had the same exact thing to say about earlier hardware as well, but we never cared and things work just fine. The one thing mentioned in that commit that is definitely true however is the fence alignment issue. But we don't deal with that on earlier hardware either. We do have code to deal with that issue for the first color plane, but not the chroma planes. So I think if we did want to check this more extensively we should do it in the same places where we already check the first color plane (namely convert_plane_offset_to_xy() and intel_fb_bo_framebuffer_init()). Reviewed-by: Imre Deak <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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