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2023-01-17drm/amd/display: move dp capability related logic to link_dp_capabilityWenjing Liu26-2263/+2380
Tested-by: Daniel Wheeler <[email protected]> Reviewed-by: Wesley Chalmers <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Wenjing Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-01-17drm/amd/display: move dp phy related logic to link_dp_phyWenjing Liu14-149/+210
Tested-by: Daniel Wheeler <[email protected]> Reviewed-by: Wesley Chalmers <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Wenjing Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-01-17drm/amd/display: move dp link training logic to link_dp_trainingWenjing Liu22-4119/+4545
[why] Extract dp link training logic out to their own files. link_dp_training - high level training sequence and helper functions. link_dp_training_8b_10b - dp1.x training link_dp_training_auxless - aux-less training link_dp_traininig_dpia - dpia training link_dp_training_fixed_vs_pe_retimer - fixed vs pe retimer training link_dp_training_128b_132b - dp2.1 training Tested-by: Daniel Wheeler <[email protected]> Reviewed-by: Wesley Chalmers <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Wenjing Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-01-17drm/amd/display: Remove SubVp support if src/dst rect does not equal stream ↵Saaem Rizvi1-0/+8
timing Current implementation of SubVP does not support cases where stream timing matched neither the destination rect nor the source rect. Will need to further debug to see how we can support these cases. Tested-by: Daniel Wheeler <[email protected]> Reviewed-by: Alvin Lee <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Saaem Rizvi <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-01-17drm/amd/display: Change i2c speed for hdcpBhawanpreet Lakha1-1/+1
[why] HDCP 1.4 failed on SL8800 SW w/a test driver use. [how] slower down the HW i2c speed when used by HW i2c. Tested-by: Daniel Wheeler <[email protected]> Reviewed-by: Aurabindo Pillai <[email protected]> Reviewed-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-01-17drm/amd/display: cleanup function args in dmlDillon Varone2-2/+2
Remove array size on array passed to CalculateDETSwathFillLatencyHiding. Tested-by: Daniel Wheeler <[email protected]> Reviewed-by: Alvin Lee <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Dillon Varone <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-01-17drm/amd/display: Use DML for MALL SS and Subvp allocation calculationsDillon Varone7-237/+134
MALL SS and Subvp use the same calculations for determining the size of the required allocation for a given surface, which is already done in DML. Add an interface to extract this information from VBA variables and use in their respective helper functions. Also refactor existing code to remove stale workarounds. Tested-by: Daniel Wheeler <[email protected]> Reviewed-by: Alvin Lee <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Dillon Varone <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-01-17drm/amd/display: Account for Subvp Phantoms in DML MALL surface calculationsDillon Varone3-4/+14
DML does not explicitly consider support for space in MALL required for subvp phantom pipes. This adds a check to make sure portion of phantom surface can fit in MALL. Tested-by: Daniel Wheeler <[email protected]> Reviewed-by: Alvin Lee <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Dillon Varone <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-01-17drm/amd/display: Account for DCC Meta pitch in DML MALL surface calculationsDillon Varone3-4/+12
DML incorrectly uses surface width for determining DCC meta size in MALL allocation calculations. Meta pitch should be used instead. Tested-by: Daniel Wheeler <[email protected]> Reviewed-by: Alvin Lee <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Dillon Varone <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-01-17drm/amd/display: Optimize subvp and drr validationDillon Varone1-16/+26
Two issues existed: 1) Configs that support DRR, but have it disabled will fail subvp+vblank validation incorrectly. Use subvp+vblank path for this case. 2) Configs that support DRR and have it enabled can use higher voltage level than required if they also support subvp+vblank. Use lowest supported voltage level for this case. Tested-by: Daniel Wheeler <[email protected]> Reviewed-by: Alvin Lee <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Dillon Varone <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-01-17drm/amdgpu: Add a missing tabDan Carpenter1-1/+1
This tab was deleted accidentally and triggers a Smatch warning: drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c:1006 gfx_v8_0_init_microcode() warn: inconsistent indenting Add it back. Fixes: 0aaafb7359d2 ("drm/amd: Use `amdgpu_ucode_*` helpers for GFX8") Signed-off-by: Dan Carpenter <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-01-17drm: panel: visionox: add backlight dependencyArnd Bergmann1-0/+1
The newly added driver uses the backlight subsystem but is missing the corresponding Kconfig dependency: arm-linux-gnueabi-ld: drivers/gpu/drm/panel/panel-visionox-vtdr6130.o: in function `visionox_vtdr6130_probe': panel-visionox-vtdr6130.c:(.text+0xdee): undefined reference to `devm_backlight_device_register' Fixes: 65dc9360f741 ("drm: panel: Add Himax HX8394 panel controller driver") Signed-off-by: Arnd Bergmann <[email protected]> Signed-off-by: Linus Walleij <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-01-17drm/bridge: cdns-dsi: Add support for J721E wrapperRahul T R6-1/+132
Add support for wrapper settings for DSI bridge on j721e. Also enable DPI0 --------------- ----------------------- | -------| |------- | | DSS | DPI2 |----->| DPI0 | DSI Wrapper | | -------| |------- | --------------- ----------------------- As shown above DPI2 output of DSS is connected to DPI0 input of DSI Wrapper, DSI wrapper gives control wheather to enable/disable DPI0 input. In j721e above is the only configuration supported Signed-off-by: Rahul T R <[email protected]> Reviewed-by: Tomi Valkeinen <[email protected]> Reviewed-by: Laurent Pinchart <[email protected]> Reviewed-by: Andrzej Hajda <[email protected]> Signed-off-by: Tomi Valkeinen <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-01-17drm/bridge: cdns-dsi: Create a header fileRahul T R2-46/+66
Create a header file for cdns dsi and move structure definations to prepare for adding j721e wrapper support Signed-off-by: Rahul T R <[email protected]> Reviewed-by: Tomi Valkeinen <[email protected]> Reviewed-by: Laurent Pinchart <[email protected]> Reviewed-by: Andrzej Hajda <[email protected]> Signed-off-by: Tomi Valkeinen <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-01-17drm/bridge: cdns-dsi: Move to drm/bridge/cadenceRahul T R5-12/+13
Move the cadence dsi bridge under drm/bridge/cadence directory, to prepare for adding j721e wrapper support Signed-off-by: Rahul T R <[email protected]> Reviewed-by: Tomi Valkeinen <[email protected]> Reviewed-by: Laurent Pinchart <[email protected]> Reviewed-by: Andrzej Hajda <[email protected]> Signed-off-by: Tomi Valkeinen <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-01-17drm/omap: Fix kernel docsTomi Valkeinen2-3/+3
Fix doc related warnings seen with W=1: the function names have changed but the docs have not been changed accordingly. Signed-off-by: Tomi Valkeinen <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Laurent Pinchart <[email protected]>
2023-01-17drm/i915/display: Check source height is > 0Drew Davenport1-1/+1
The error message suggests that the height of the src rect must be at least 1. Reject source with height of 0. Cc: [email protected] Signed-off-by: Drew Davenport <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/20221226225246.1.I15dff7bb5a0e485c862eae61a69096caf12ef29f@changeid (cherry picked from commit 0fe76b198d482b41771a8d17b45fb726d13083cf) Signed-off-by: Rodrigo Vivi <[email protected]>
2023-01-17Drivers: hv: Make remove callback of hyperv driver void returnedDawei Li1-3/+1
Since commit fc7a6209d571 ("bus: Make remove callback return void") forces bus_type::remove be void-returned, it doesn't make much sense for any bus based driver implementing remove callbalk to return non-void to its caller. As such, change the remove function for Hyper-V VMBus based drivers to return void. Signed-off-by: Dawei Li <[email protected]> Link: https://lore.kernel.org/r/TYCP286MB2323A93C55526E4DF239D3ACCAFA9@TYCP286MB2323.JPNP286.PROD.OUTLOOK.COM Signed-off-by: Wei Liu <[email protected]>
2023-01-17drm/i915/psr: Implement Wa_14015648006Jouni Högander2-20/+29
Add 4th pipe and extend TGL Wa_16013835468 to support ADLP, MTL and DG2 and all TGL steppings. BSpec: 54369, 55378, 66624 v3: - commit message modified v2: - apply for PSR1 as well - remove stepping information from comments Cc: Matt Roper <[email protected]> Cc: José Roberto de Souza <[email protected]> Cc: Stanislav Lisovskiy <[email protected]> Signed-off-by: Mika Kahola <[email protected]> Signed-off-by: Jouni Högander <[email protected]> Reviewed-by: Matt Roper <[email protected]> Signed-off-by: Stanislav Lisovskiy <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-01-17drm/ttm: fix some minor kerneldoc issuesChristian König1-7/+6
Pointed out by the kernel test robot while merging ttm_bo_api.h and ttm_bo_driver.h. Signed-off-by: Christian König <[email protected]> Reported-by: kernel test robot <[email protected]> Reviewed-by: Nirmoy Das <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-01-17drm/ttm: Include <linux/vmalloc.h> to fix MIPS buildThomas Zimmermann1-0/+2
On MIPS, vmap() and vunmap() are undeclared in ttm_bo_util.c. An error message is shown below. CC drivers/gpu/drm/ttm/ttm_bo_util.o ../drivers/gpu/drm/ttm/ttm_bo_util.c: In function 'ttm_bo_kmap_ttm': ../drivers/gpu/drm/ttm/ttm_bo_util.c:364:32: error: implicit declaration of function 'vmap'; did you mean 'kmap'? [-Werror=implicit-function-declaration] 364 | map->virtual = vmap(ttm->pages + start_page, num_pages, | ^~~~ | kmap ../drivers/gpu/drm/ttm/ttm_bo_util.c:364:30: warning: assignment to 'void *' from 'int' makes pointer from integer without a cast [-Wint-conversion] 364 | map->virtual = vmap(ttm->pages + start_page, num_pages, | ^ ../drivers/gpu/drm/ttm/ttm_bo_util.c: In function 'ttm_bo_kunmap': ../drivers/gpu/drm/ttm/ttm_bo_util.c:429:17: error: implicit declaration of function 'vunmap'; did you mean 'kunmap'? [-Werror=implicit-function-declaration] 429 | vunmap(map->virtual); | ^~~~~~ | kunmap ../drivers/gpu/drm/ttm/ttm_bo_util.c: In function 'ttm_bo_vmap': ../drivers/gpu/drm/ttm/ttm_bo_util.c:509:23: warning: assignment to 'void *' from 'int' makes pointer from integer without a cast [-Wint-conversion] 509 | vaddr = vmap(ttm->pages, ttm->num_pages, 0, prot); | ^ Fix this by including <linux/vmalloc.h>. Signed-off-by: Thomas Zimmermann <[email protected]> Reviewed-by: Christian König <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-01-17Merge tag 'drm-intel-next-2023-01-12' of ↵Dave Airlie64-1474/+3108
git://anongit.freedesktop.org/drm/drm-intel into drm-next drm/i915 feature pull #1 for v6.3: Features and functionality: - Meteorlake display enabling (Animesh, Luca, Stan, Jouni, Anusha) - DP MST DSC support (Stan) - Gamma/degamma readout support for the state checker (Ville) - Enable SDP split support for DP 2.0 (Vinod) - Add probe blocking support to i915.force_probe parameter (Rodrigo) - Enable Xe HP 4tile support (Jonathan) Refactoring and cleanups: - Color refactoring, especially related to DSB usage (Ville) - DSB refactoring (Ville) - DVO refactoring (Ville) - Backlight register and logging cleanups (Jani) - Avoid display direct calls to uncore (Maarten, Jani) - Add new "soc" sub-directory (Jani) - Refactor DSC platform support checks (Swati) Fixes: - Interlace modes are no longer supported starting at display version 12 (Ankit) - Use polling read for aux control (Arun) - DMC firmware no longer requires specific versions (Gustavo) - Fix PSR flickering and freeze issues (Jouni) - Fix ICL+ DSI GPIO handling (Jani) - Ratelimit errors in display engine irqs (Lucas) - Fix DP MST DSC bpp and timeslot calculations (Stan) - Fix CDCLK squash and crawl sequences (Ville, Anusha) - Fix bigjoiner checks for fused pipes (Ville) - Fix ADP+ degamma LUT size (Ville) - Fix DVO ch7xxx and sil164 suspend/resume (Ville) - Fix memory leak in VBT parsing (Xia Fukun) - Fix VBT packet port selection for dual link DSI (Mikko Kovanen) - Fix SDP infoframe product string for discrete graphics (Clint) - Fix VLV/CHV HDMI/DP audio enable (Ville) - Fix VRR delays and calculations (Ville) - No longer disable transcoder for PHY test pattern change (Khaled) - Fix dual PPS handling (Ville) - Fix timeout and wait for DDI BUF CTL active after enabling (Ankit) Merges: - Backmerge drm-next to sync up with v6.2-rc1 (Jani) Signed-off-by: Dave Airlie <[email protected]> From: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-01-16drm/msm/gpu: Add default devfreq thresholdsRob Clark1-0/+9
Setup more appropriate devfreq tuning thresholds. Signed-off-by: Rob Clark <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/517788/ Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Chia-I Wu <[email protected]>
2023-01-16drm/msm/gpu: Bypass PM QoS constraint for idle clampRob Clark2-82/+65
Change idle freq clamping back to the direct method, bypassing PM QoS requests. The problem with using PM QoS requests is they call (indirectly) the governors ->get_target_freq() which goes thru a get_dev_status() cycle. The problem comes when the GPU becomes active again and we remove the idle-clamp request, we go through another get_dev_status() cycle for the period that the GPU has been idle, which triggers the governor to lower the target freq excessively. This partially reverts commit 7c0ffcd40b16 ("drm/msm/gpu: Respect PM QoS constraints"), but preserves the use of boost QoS request, so that it will continue to play nicely with other QoS requests such as a cooling device. This also mostly undoes commit 78f815c1cf8f ("drm/msm: return the average load over the polling period") Signed-off-by: Rob Clark <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/517785/ Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Chia-I Wu <[email protected]>
2023-01-16drm/msm/gpu: Add devfreq tuning debugfsRob Clark6-6/+27
Make the handful of tuning knobs available visible via debugfs. v2: select DEVFREQ_GOV_SIMPLE_ONDEMAND because for some reason struct devfreq_simple_ondemand_data depends on this Signed-off-by: Rob Clark <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/517784/ Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Chia-I Wu <[email protected]>
2023-01-16drm/msm/a6xx: Update ROQ size in coredumpAkhil P Oommen2-8/+20
Since RoQ size differs between generations, calculate dynamically the RoQ size while capturing coredump. Signed-off-by: Akhil P Oommen <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/515610/ Link: https://lore.kernel.org/r/20221221203925.v2.4.I07f22966395eb045f6b312710f53890d5d7e69d4@changeid Signed-off-by: Rob Clark <[email protected]>
2023-01-16drm/msm/a6xx: Update a6xx gpu coredumpAkhil P Oommen3-9/+108
Update gpu coredump for a660/a650 family of gpus with the extra information available. Signed-off-by: Akhil P Oommen <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/515608/ Link: https://lore.kernel.org/r/20221221203925.v2.3.Ifbfce6d693b202dac92006345bb825e7c5aee9c6@changeid Signed-off-by: Rob Clark <[email protected]>
2023-01-16drm/msm: Fix failure paths in msm_drm_init()Akhil P Oommen2-4/+10
Ensure that we do drm_dev_put() when there is an early return in msm_drm_init(). Signed-off-by: Akhil P Oommen <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/515606/ Link: https://lore.kernel.org/r/20221221203925.v2.2.I49dfc3654040be61702e491f1aa63d3a5f308852@changeid Signed-off-by: Rob Clark <[email protected]>
2023-01-16drm/msm/adreno: Fix null ptr access in adreno_gpu_cleanup()Akhil P Oommen1-2/+2
Fix the below kernel panic due to null pointer access: [ 18.504431] Unable to handle kernel NULL pointer dereference at virtual address 0000000000000048 [ 18.513464] Mem abort info: [ 18.516346] ESR = 0x0000000096000005 [ 18.520204] EC = 0x25: DABT (current EL), IL = 32 bits [ 18.525706] SET = 0, FnV = 0 [ 18.528878] EA = 0, S1PTW = 0 [ 18.532117] FSC = 0x05: level 1 translation fault [ 18.537138] Data abort info: [ 18.540110] ISV = 0, ISS = 0x00000005 [ 18.544060] CM = 0, WnR = 0 [ 18.547109] user pgtable: 4k pages, 39-bit VAs, pgdp=0000000112826000 [ 18.553738] [0000000000000048] pgd=0000000000000000, p4d=0000000000000000, pud=0000000000000000 [ 18.562690] Internal error: Oops: 0000000096000005 [#1] PREEMPT SMP **Snip** [ 18.696758] Call trace: [ 18.699278] adreno_gpu_cleanup+0x30/0x88 [ 18.703396] a6xx_destroy+0xc0/0x130 [ 18.707066] a6xx_gpu_init+0x308/0x424 [ 18.710921] adreno_bind+0x178/0x288 [ 18.714590] component_bind_all+0xe0/0x214 [ 18.718797] msm_drm_bind+0x1d4/0x614 [ 18.722566] try_to_bring_up_aggregate_device+0x16c/0x1b8 [ 18.728105] __component_add+0xa0/0x158 [ 18.732048] component_add+0x20/0x2c [ 18.735719] adreno_probe+0x40/0xc0 [ 18.739300] platform_probe+0xb4/0xd4 [ 18.743068] really_probe+0xfc/0x284 [ 18.746738] __driver_probe_device+0xc0/0xec [ 18.751129] driver_probe_device+0x48/0x110 [ 18.755421] __device_attach_driver+0xa8/0xd0 [ 18.759900] bus_for_each_drv+0x90/0xdc [ 18.763843] __device_attach+0xfc/0x174 [ 18.767786] device_initial_probe+0x20/0x2c [ 18.772090] bus_probe_device+0x40/0xa0 [ 18.776032] deferred_probe_work_func+0x94/0xd0 [ 18.780686] process_one_work+0x190/0x3d0 [ 18.784805] worker_thread+0x280/0x3d4 [ 18.788659] kthread+0x104/0x1c0 [ 18.791981] ret_from_fork+0x10/0x20 [ 18.795654] Code: f9400408 aa0003f3 aa1f03f4 91142015 (f9402516) [ 18.801913] ---[ end trace 0000000000000000 ]--- [ 18.809039] Kernel panic - not syncing: Oops: Fatal exception Fixes: 17e822f7591f ("drm/msm: fix unbalanced pm_runtime_enable in adreno_gpu_{init, cleanup}") Signed-off-by: Akhil P Oommen <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/515605/ Link: https://lore.kernel.org/r/20221221203925.v2.1.Ib978de92c4bd000b515486aad72e96c2481f84d0@changeid Signed-off-by: Rob Clark <[email protected]>
2023-01-16drm/msm/a2xx: support loading legacy (iMX) firmwareDmitry Baryshkov2-4/+24
Support loading A200 firmware generated from the iMX firmware header files. The firmware lacks protection support, however it allows GPU to function properly while using the firmware files with clear license which allows redistribution. Cc: Jonathan Marek <[email protected]> Signed-off-by: Dmitry Baryshkov <[email protected]> Reviewed-by: Rob Clark <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/516443/ Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Rob Clark <[email protected]>
2023-01-16drm/msm: Add MSM_SUBMIT_BO_NO_IMPLICITRob Clark2-1/+13
In cases where implicit sync is used, it is still useful (for things like sub-allocation, etc) to allow userspace to opt-out of implicit sync on per-BO basis. Signed-off-by: Rob Clark <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/514216/ Link: https://lore.kernel.org/r/[email protected]
2023-01-16drm/nouveau/fb/ga102: Replace zero-length array of trailing structs with ↵Kees Cook1-1/+1
flex-array Zero-length arrays are deprecated[1] and are being replaced with flexible array members in support of the ongoing efforts to tighten the FORTIFY_SOURCE routines on memcpy(), correctly instrument array indexing with UBSAN_BOUNDS, and to globally enable -fstrict-flex-arrays=3. Replace zero-length array with flexible-array member. This results in no differences in binary output. [1] https://github.com/KSPP/linux/issues/78 Cc: Ben Skeggs <[email protected]> Cc: Karol Herbst <[email protected]> Cc: Lyude Paul <[email protected]> Cc: David Airlie <[email protected]> Cc: Daniel Vetter <[email protected]> Cc: Gourav Samaiya <[email protected]> Cc: "Gustavo A. R. Silva" <[email protected]> Cc: [email protected] Cc: [email protected] Signed-off-by: Kees Cook <[email protected]> Reviewed-by: Gustavo A. R. Silva <[email protected]> Reviewed-by: Karol Herbst <[email protected]> Signed-off-by: Karol Herbst <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-01-16drm/bridge: tc358767: Set default CLRSIPO countMarek Vasut1-4/+4
The current CLRSIPO count is still marginal and does not work with high DSI clock rates in burst mode. Increase it further to allow the DSI link to work at up to 1Gbps lane speed. This returns the counts to defaults as provided by datasheet. Fixes: ea6490b02240b ("drm/bridge: tc358767: increase CLRSIPO count") Signed-off-by: Marek Vasut <[email protected]> Acked-by: Maxime Ripard <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-01-16drm/i915/display: drop redundant display/ from #includesJani Nikula3-33/+30
Drop the redundant sub-directory from #includes under display/. Group and sort the results. v2: Rebase Reviewed-by: Arun R Murthy <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-01-16Merge tag 'drm-misc-next-2023-01-12' of ↵Dave Airlie69-1329/+2832
git://anongit.freedesktop.org/drm/drm-misc into drm-next drm-misc-next for v6.3: UAPI Changes: * fourcc: Document Open Source user waiver Cross-subsystem Changes: * firmware: fix color-format selection for system framebuffers Core Changes: * format-helper: Add conversion from XRGB8888 to various sysfb formats; Make XRGB8888 the only driver-emulated legacy format * fb-helper: Avoid blank consoles from selecting an incorrect color format * probe-helper: Enable/disable HPD on connectors plus driver updates * Use drm_dbg_ helpers in several places * docs: Document defaults for CRTC backgrounds; Document use of drm_minor Driver Changes: * arm/hdlcd: Use new debugfs helpers * gud: Use new debugfs helpers * panel: Support Visionox VTDR6130 AMOLED DSI; Support Himax HX8394; Convert many drivers to common generic DSI write-sequence helper * v3d: Do not opencode drm_gem_object_lookup() * vc4: Various HVS an CRTC fixes * vkms: Fix SEGFAULT from incorrect GEM-buffer mapping * Convert various drivers to i2c probe_new() Signed-off-by: Dave Airlie <[email protected]> From: Thomas Zimmermann <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/Y8ADeSzZDj+tpibF@linux-uq9g
2023-01-16Merge tag 'amd-drm-next-6.3-2023-01-13' of ↵Dave Airlie67-1591/+997
https://gitlab.freedesktop.org/agd5f/linux into drm-next amd-drm-next-6.3-2023-01-13: amdgpu: - Fix possible segfault in failure case - Rework FW requests to happen in early_init for all IPs so that we don't lose the sbios console if FW is missing - PSR fixes - Misc cleanups - Unload fix - SMU13 fixes amdkfd: - Fix for cleared VRAM BOs - Fix cleanup if GPUVM creation fails - Memory accounting fix - Use resource_size rather than open codeing it - GC11 mGPU fix radeon: - Fix memory leak on shutdown Signed-off-by: Dave Airlie <[email protected]> From: Alex Deucher <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-01-16Merge tag 'amd-drm-next-6.3-2023-01-06' of ↵Dave Airlie136-999/+1967
https://gitlab.freedesktop.org/agd5f/linux into drm-next amd-drm-next-6.3-2023-01-06: amdgpu: - secure display support for multiple displays - DML optimizations - DCN 3.2 updates - PSR updates - DP 2.1 updates - SR-IOV RAS updates - VCN RAS support - SMU 13.x updates - Switch 1 element arrays to flexible arrays - Add RAS support for DF 4.3 - Stack size improvements - S0ix rework - Soft reset fix - Allow 0 as a vram limit on APUs - Display fixes - Misc code cleanups - Documentation fixes - Handle profiling modes for SMU13.x amdkfd: - Error handling fixes - PASID fixes radeon: - Switch 1 element arrays to flexible arrays drm: - Add DP adaptive sync DPCD definitions UAPI: - Add new INFO queries for peak and min sclk/mclk for profile modes on newer chips Proposed mesa patch: https://gitlab.freedesktop.org/mesa/drm/-/merge_requests/278 Signed-off-by: Dave Airlie <[email protected]> From: Alex Deucher <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-01-13drm/amd/display: add hubbub_init relatedCharlene Liu7-5/+88
Required by display init, also update get_dig_mode Tested-by: Daniel Wheeler <[email protected]> Reviewed-by: Hansen Dsouza <[email protected]> Reviewed-by: Duncan Ma <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Charlene Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-01-13drm/amd/display: Update dmub header to match DMUBMustapha Ghaddar3-92/+109
[WHY] Last PR missed name of a struct to match in DMUB [HOW] Update the logic in dmub_cmh.h header Tested-by: Daniel Wheeler <[email protected]> Reviewed-by: Meenakshikumar Somasundaram <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Mustapha Ghaddar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-01-13drm/amdgpu: Skip specific mmhub and sdma registers accessing under sriovYifan Zha2-21/+23
[Why] SDMA0_CNTL and MMHUB system aperture related registers are blocked by L1 Policy. Therefore, they cannot be accessed by VF and loged in violation. [How] For MMHUB registers, they will be programmed by PF. So VF will skip to program them in mmhubv3_0. For SDMA0_CNTL which is a PF_only register, VF don't need to program it in sdma_v6_0. Signed-off-by: Yifan Zha <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-01-13drm/amd/pm: Support RAS fatal error mode1 reset on smu v13_0_0 and v13_0_10Candice Li3-3/+48
Support RAS fatal error mode1 reset on smu v13_0_0 and v13_0_10. Signed-off-by: Candice Li <[email protected]> Reviewed-by: Evan Quan <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-01-13drm/amdgpu: Correct the power calcultion for Renior/Cezanne.jie1zhan1-1/+6
From smu firmware,the value of power is transferred in units of watts. Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/2321 Fixes: 137aac26a2ed ("drm/amdgpu/smu12: fix power reporting on renoir") Acked-by: Alex Deucher <[email protected]> Signed-off-by: Jesse Zhang <[email protected]> Reviewed-by: Aaron Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-01-13drm/amd: fix some dead code in `gfx_v9_0_init_cp_compute_microcode`Mario Limonciello1-5/+6
Some dead code was introduced as part of utilizing the `amdgpu_ucode_*` helpers. Adjust the control flow to make sure that firmware is released in the appropriate error flows. Reported-by: coverity-bot <[email protected]> Addresses-Coverity-ID: 1530548 ("Control flow issues") Fixes: ec787deb2ddf ("drm/amd: Use `amdgpu_ucode_*` helpers for GFX9") Signed-off-by: Mario Limonciello <[email protected]> Reviewed-by: Kees Cook <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-01-13drm/amd/display: move dc_link_dpia logic to link_dp_dpiaWenjing Liu6-8/+7
Tested-by: Daniel Wheeler <[email protected]> Reviewed-by: George Shen <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Wenjing Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-01-13drm/amd/display: move dpcd logic from dc_link_dpcd to link_dpcdWenjing Liu18-24/+19
[why] Moving dpcd logic from dc_link_dpcd to link_dpcd as part of link file restructure Tested-by: Daniel Wheeler <[email protected]> Reviewed-by: George Shen <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Wenjing Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-01-13drm/amd/display: refactor ddc logic from dc_link_ddc to link_ddcWenjing Liu36-584/+512
[why] 1. Move dd_link_ddc functions to link_ddc. 2. Move link ddc functions declaration exposed in dc to link.h 3. Move link ddc functions declaration exposed in dm to dc_link.h 4. Remove i2caux_interface.h file Tested-by: Daniel Wheeler <[email protected]> Reviewed-by: Jun Lei <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Wenjing Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-01-13drm/amd/display: refactor hpd logic from dc_link to link_hpdWenjing Liu8-245/+357
[why] Factor out hpd handling logic from generic dc link file. Tested-by: Daniel Wheeler <[email protected]> Reviewed-by: Jun Lei <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Wenjing Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-01-13drm/amd/display: Implement FIFO enable sequence on DCN32Dillon Varone1-0/+28
[WHY?] FIFO enable sequence is incomplete as it is currently implemented in FW, and requires reset to prevent the FIFO to be enabled in an invalid state. This cannot be done until DIG FE is connected to the BE. [HOW?] Add FIFO enable sequence in driver for dcn32 with reset after DIG FE is connected to BE. Tested-by: Daniel Wheeler <[email protected]> Reviewed-by: Alvin Lee <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Dillon Varone <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-01-13drm/amd/display: Fix DPIA link encoder assignment issueCruise Hung1-27/+30
[Why] The DPIA link encoder (DIG) was not released when a Display XDR 6K monitor was disconnected. That's because the DPIA link encoder logic checked the BW when it removed the link encoder for it. And the timing BW was less than DP link BW. So, it failed to release the link encoder. And that caused the DIG was occupied and can't be used. The reason it checked the BW is it wants to identify whether this link was using DIG or HPO. It skips if it's not DIG. [How] Not to check the BW when it removes the link encoder because it's already in the assignment table, it must be the DIG. Tested-by: Daniel Wheeler <[email protected]> Reviewed-by: Jun Lei <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Cruise Hung <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-01-13drm/amd/display: fix multi edp panel instancingDmytro Laktyushkin1-3/+2
A previous fix attempted to correct mismatch between DM display targets and dc panel instancing by only counting connected panels. This behaviour breaks a feature, thus this is an alternative solution that allows mapping display targets to dc links during mod_power_create. Tested-by: Daniel Wheeler <[email protected]> Reviewed-by: Nicholas Kazlauskas <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Dmytro Laktyushkin <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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