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2023-04-03drm/panfrost: Fix the panfrost_mmu_map_fault_addr() error pathBoris Brezillon1-0/+1
Make sure all bo->base.pages entries are either NULL or pointing to a valid page before calling drm_gem_shmem_put_pages(). Reported-by: Tomeu Vizoso <[email protected]> Cc: <[email protected]> Fixes: 187d2929206e ("drm/panfrost: Add support for GPU heap allocations") Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Steven Price <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-04-03drm/mediatek: Add ovl_adaptor get format functionNancy.Lin3-0/+18
1. Add ovl_adaptor get_format and get_num_formats component function. The two functions are needed for getting the supported format in mtk_plane_init(). 2. Get supported format from the ovl_adaptor's rdma engine - mdp_rdma. Signed-off-by: Nancy.Lin <[email protected]> Link: https://patchwork.kernel.org/project/linux-mediatek/patch/[email protected]/ Signed-off-by: Chun-Kuang Hu <[email protected]>
2023-04-03drm/mediatek: Add mdp_rdma get format functionNancy.Lin2-0/+27
Add mdp_rdma get_format and get_num_formats function. Signed-off-by: Nancy.Lin <[email protected]> Link: https://patchwork.kernel.org/project/linux-mediatek/patch/[email protected]/ Signed-off-by: Chun-Kuang Hu <[email protected]>
2023-04-02drm/lima: add show_fdinfo for drm usage statsErico Nunes1-1/+30
This exposes an accumulated active time per client via the fdinfo infrastructure per execution engine, following Documentation/gpu/drm-usage-stats.rst. In lima, the exposed execution engines are gp and pp. Signed-off-by: Erico Nunes <[email protected]> Signed-off-by: Qiang Yu <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-04-02drm/lima: allocate unique id per drm_fileErico Nunes3-0/+16
To track if fds are pointing to the same execution context and export the expected information to fdinfo, similar to what is done in other drivers. Signed-off-by: Erico Nunes <[email protected]> Signed-off-by: Qiang Yu <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-04-02drm/lima: add usage counting method to ctx_mgrErico Nunes2-1/+32
lima maintains a context manager per drm_file, similar to amdgpu. In order to account for the complete usage per drm_file, all of the associated contexts need to be considered. Previously released contexts also need to be accounted for but their drm_sched_entity info is gone once they get released, so account for it in the ctx_mgr. Signed-off-by: Erico Nunes <[email protected]> Signed-off-by: Qiang Yu <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-04-02drm/lima/lima_drv: Add missing unwind goto in lima_pdev_probe()Harshit Mogalapalli1-2/+4
Smatch reports: drivers/gpu/drm/lima/lima_drv.c:396 lima_pdev_probe() warn: missing unwind goto? Store return value in err and goto 'err_out0' which has lima_sched_slab_fini() before returning. Fixes: a1d2a6339961 ("drm/lima: driver for ARM Mali4xx GPUs") Signed-off-by: Harshit Mogalapalli <[email protected]> Signed-off-by: Qiang Yu <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-04-01drm/nouveau/disp: Support more modes by checking with lower bpcKarol Herbst2-3/+37
This allows us to advertise more modes especially on HDR displays. Fixes using 4K@60 modes on my TV and main display both using a HDMI to DP adapter. Also fixes similar issues for users running into this. Cc: [email protected] # 5.10+ Signed-off-by: Karol Herbst <[email protected]> Reviewed-by: Lyude Paul <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-03-31drm/msm/a6xx: Add support for A650 speed binningKonrad Dybcio1-0/+18
Add support for matching QFPROM fuse values to get the correct speed bin on A650 (SM8250) GPUs. Reviewed-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Konrad Dybcio <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/530043/ Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Rob Clark <[email protected]>
2023-03-31drm/msm/a6xx: Add support for A640 speed binningKonrad Dybcio1-0/+13
Add support for matching QFPROM fuse values to get the correct speed bin on A640 (SM8150) GPUs. Reviewed-by: Akhil P Oommen <[email protected]> Signed-off-by: Konrad Dybcio <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/530042/ Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Rob Clark <[email protected]>
2023-03-31drm/amd/pm: enable sysfs node vclk1 and dclk1 for NV3XTong Liu011-2/+6
Enable node pp_dpm_vclk1 and pp_dpm_dclk1 for gc11.0.2 and gc11.0.3 Signed-off-by: Tong Liu01 <[email protected]> Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-03-31drm/amd/pm: enable sysfs node vclk1 and dclk1 for NV2XTong Liu011-0/+8
Enable vclk1 and dclk1 node for gc10.3.0 and gc10.3.1 Signed-off-by: Tong Liu01 <[email protected]> Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-03-31drm/amd/pm: add sysfs node vclk1 and dclk1Tong Liu013-0/+42
User can check pp_dpm_vclk1 and pp_dpm_dclk1 for DPM frequency of vcn and dcn Signed-off-by: Tong Liu01 <[email protected]> Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-03-31drm/amd/display: Mark function 'optc3_wait_drr_doublebuffer_pending_clear' ↵Caio Novais1-1/+1
as static Compiling AMD GPU drivers displays a warning: drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_optc.c:294:6: warning: no previous prototype for ‘optc3_wait_drr_doublebuffer_pending_clear’ [-Wmissing-prototypes] Get rid of it by marking the function as static Signed-off-by: Caio Novais <[email protected]> Signed-off-by: Hamza Mahfooz <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-03-31drm/amdkfd: Set TG_CHUNK_SIZE for GC 9.4.3Amber Lin1-0/+15
On GC 9.4.3, DW 41 in MQD is repurposed as compute_tg_chunk_size for cooperative dispatch. When it's a AQL queue, set compute_tg_chunk_size as 1 to spread work groups evenly among XCCs. If it's PM4 queue, unset compute_tg_chunk_size to disable cooperative mode. v3: set compute_tg_chunk_size as 1 instead of #CUs per XCC v2: set compute_tg_chunk_size as #CUs per XCC instead of total wave slots per XCC Signed-off-by: Amber Lin <[email protected]> Reviewed-by: Sean Keely <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-03-31drm/amdkfd: Trap handler changes for GC 9.4.3 v2Jay Cornwall3-19/+526
v1: Check new exception bits in TRAPSTS register Remove single step exception workaround, now part of exception bits v2: GC 9.4.3 uses ttmp11 to store {1’b0, dispatch index [24:0], wave_id_in_workgroup[5:0]}, so use ttmp13 instead of ttmp11 to preserve ib_sts. (Laurent) Signed-off-by: Jay Cornwall <[email protected]> Signed-off-by: Laurent Morichetti <[email protected]> Reviewed-by: Laurent Morichetti <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-03-31drm/amd/display: Remove unused variable 'scl_enable'Caio Novais1-2/+0
Compiling AMD GPU drivers displays a warning: drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn314/display_rq_dlg_calc_314.c: In function ‘dml_rq_dlg_get_dlg_params’: drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn314/display_rq_dlg_calc_314.c:991:14: warning: variable ‘scl_enable’ set but not used [-Wunused-but-set-variable] Get rid of it by removing the variable 'scl_enable'. Signed-off-by: Caio Novais <[email protected]> Signed-off-by: Hamza Mahfooz <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-03-31drm/amdkfd: Set noretry/xnack for GC 9.4.3Amber Lin2-1/+3
For GC 9.4.3, disable retry as default and XNACK can be different modes per process. Signed-off-by: Amber Lin <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-03-31drm/amd/display: Whitespace cleanupUwe Kleine-König1-13/+13
Commit 075e2099c32c ("drm/amd/display: Fix race condition in DPIA AUX transfer") was backported to stable, which I noticed because of git saying linux-6.1/.git/rebase-apply/patch:37154: space before tab in indent. while applying patch-6.1.21. While fixing the code location that issued that warning, improve in few more places. Signed-off-by: Uwe Kleine-König <[email protected]> Signed-off-by: Hamza Mahfooz <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-03-31drm/amdkfd: Add GC 9.4.3 KFD supportHawking Zhang3-1/+8
Add initial KFD support Convert a few structures to IP version checking (Hawking) Signed-off-by: Elena Sakhnovitch <[email protected]> Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Amber Lin <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-03-31drm/amd/display: Promote DAL to 3.2.229Aric Cyr1-1/+1
This DC version brings along: - Enable FPO optimization - Support for 6.75 GBps link rate - Fixes to underflow, black screen and more Acked-by: Qingqing Zhuo <[email protected]> Signed-off-by: Aric Cyr <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-03-31drm/amd/display: Uncomment assignments after HW headers are promotedAlvin Lee1-6/+4
[Description] Assign the correct info now that FW headers are promoted Acked-by: Qingqing Zhuo <[email protected]> Signed-off-by: Alvin Lee <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-03-31drm/amd/display: [FW Promotion] Release 0.0.160.0Anthony Koo1-3/+11
- New parameter to define extra vblank stretch required when doing FPO + Vactive - Pass in pipe index for FPO Reviewed-by: Alvin Lee <[email protected]> Acked-by: Qingqing Zhuo <[email protected]> Signed-off-by: Anthony Koo <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-03-31drm/amd/display: skip CLEAR_PAYLOAD_ID_TABLE if device mst_en is 0Peichen Huang1-1/+4
[Why] Some dock and mst monitor don't like to receive CLEAR_PAYLOAD_ID_TABLE when mst_en is set to 0. It doesn't make sense to do so in source side, either. [How] Don't send CLEAR_PAYLOAD_ID_TABLE if mst_en is 0 Reviewed-by: George Shen <[email protected]> Acked-by: Qingqing Zhuo <[email protected]> Signed-off-by: Peichen Huang <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-03-31drm/amd/display: Enable FPO optimizationAlvin Lee2-2/+2
[Description] Enable optimization for preferring FPO if it achieves a lower voltage level Reviewed-by: George Shen <[email protected]> Acked-by: Qingqing Zhuo <[email protected]> Signed-off-by: Alvin Lee <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-03-31drm/amd/display: Only keep cursor p-state force for FPOAlvin Lee1-0/+6
[Description] If transitioning from an FPO config -> FPO config, we want to keep cursor P-State force disallowed. Any other transition from FPO config -> non FPO config should unforce the cursor P-State disallow Reviewed-by: Wesley Chalmers <[email protected]> Acked-by: Qingqing Zhuo <[email protected]> Signed-off-by: Alvin Lee <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-03-31drm/amd/display: Conditionally enable 6.75 GBps link rateArtem Grishin2-5/+19
[Why] The 6.75 GBps link rate is part of the new eDP specification version 1.5 is going to be supported in the future. Since this standard is very new and there are no existing 6.75 GBps panels on the market yet, we should put a condition in the driver on enabling this feature until we can validate it with real hardware. [How] - Add boolean flag support_eDP1_5 in struct dc_debug_options. - Enable the 6.75 link rate in reduce_link_rate(...) only when the flag is true. Reviewed-by: Charlene Liu <[email protected]> Acked-by: Qingqing Zhuo <[email protected]> Signed-off-by: Artem Grishin <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-03-31drm/amd/display: Add support for 6.75 GBps link rateArtem Grishin3-9/+16
[Why] The latest eDP spec version 1.5 defines a new generic link rate of 6.75 Gbps/Lane, which needs to be supported in the driver. [How] Added new element to the dc_link_rate enum Reviewed-by: Charlene Liu <[email protected]> Acked-by: Qingqing Zhuo <[email protected]> Signed-off-by: Artem Grishin <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-03-31drm/amd/display: fixed dcn30+ underflow issueAyush Gupta3-3/+4
[Why] Observing underflow on dcn30+ system config at 4k144hz [How] We set the UCLK hardmax on AC/DC switch if softmax is enabled and also on boot. While booting up the UCLK Hardmax is set to softmax before the init sequence and the init sequence resets the hardmax to UCLK max which enables P-state switching. Just added a conditional check to avoid setting hardmax on init. Reviewed-by: Alvin Lee <[email protected]> Reviewed-by: Martin Leung <[email protected]> Acked-by: Qingqing Zhuo <[email protected]> Signed-off-by: Ayush Gupta <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-03-31drm/amd/display: Use per pipe P-State force for FPOAlvin Lee13-43/+88
[Description] * Pass in pipe index for FPO cmd to DMCUB - This change will pass in the pipe index for each stream that is using FPO - This change is in preparation to enable FPO + VActive * Use per pipe P-State force for FPO - For FPO, instead of using max watermarks value for P-State disallow, use per pipe p-state force instead - This is in preparation to enable FPO + VActive Reviewed-by: Jun Lei <[email protected]> Acked-by: Qingqing Zhuo <[email protected]> Signed-off-by: Alvin Lee <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-03-31drm/amd/display: Add infrastructure for enabling FAMS for DCN30Qingqing Zhuo1-7/+46
As part of the FAMS work, we need code infrastructure in DC. dcn30_fpu.c changes went missing during previous upstream activity. Reviewed-by: Rodrigo Siqueira <[email protected]> Acked-by: Qingqing Zhuo <[email protected]> Signed-off-by: Qingqing Zhuo <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-03-31drm/amd/display: Add 90Mhz to video_optimized_pixel_ratesTaimur Hassan1-0/+1
[Why & How] Needed to get certain EDID to light up during TMDS compliance. Reviewed-by: Charlene Liu <[email protected]> Acked-by: Qingqing Zhuo <[email protected]> Signed-off-by: Taimur Hassan <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-03-31drm/amd/display: w/a for dcn315 inconsistent smu clock tableDmytro Laktyushkin1-0/+5
[Why & How] w/a for dcn315 inconsistent smu clock. Reviewed-by: Nicholas Kazlauskas <[email protected]> Acked-by: Qingqing Zhuo <[email protected]> Signed-off-by: Dmytro Laktyushkin <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-03-31drm/amd/display: update dig enable sequenceCharlene Liu3-10/+19
[why] HW delta follow up Reviewed-by: Chris Park <[email protected]> Reviewed-by: Jun Lei <[email protected]> Reviewed-by: Jerry Zuo <[email protected]> Acked-by: Qingqing Zhuo <[email protected]> Signed-off-by: Charlene Liu <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-03-31drm/amd/display: fix double memory allocationMartin Leung1-2/+3
[Why & How] when trying to fix a nullptr dereference on VMs, accidentally doubly allocated memory for the non VM case. removed the extra link_srv creation since dc_construct_ctx is called in both VM and non VM cases Also added a proper fail check for if kzalloc fails Cc: [email protected] Cc: Mario Limonciello <[email protected]> Reviewed-by: Leo Ma <[email protected]> Acked-by: Qingqing Zhuo <[email protected]> Signed-off-by: Martin Leung <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-03-31drm/amd/display: Fix 4to1 MPC black screen with DPP RCONicholas Kazlauskas9-26/+72
[Why] DPP Root clock optimization when combined with 4to1 MPC combine results in the screen turning black. This is because the DPPCLK is stopped during the middle of an optimize_bandwidth sequence during commit_minimal_transition without going through plane power down/power up. [How] The intent of a 0Hz DPP clock through update_clocks is to disable the DTO. This differs from the behavior of stopping the DPPCLK entirely (utilizing a 0Hz clock on some ASIC) so it's better to move this logic to reside next to plane power up/power down where we gate the HUBP/DPP DOMAIN. The new sequence should be: Power down: PG enabled -> RCO on Power up: RCO off -> PG disabled Rename power_on_plane to power_on_plane_resources to reflect the actual operation that's occurring. Cc: [email protected] Cc: Mario Limonciello <[email protected]> Reviewed-by: Jun Lei <[email protected]> Acked-by: Qingqing Zhuo <[email protected]> Signed-off-by: Nicholas Kazlauskas <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-03-31drm/amd/display: Update FCLK change latencyAlvin Lee1-1/+1
[Descrtipion] - Driver hardcoded FCLK P-State latency was incorrect - Use the value provided by PMFW header instead Reviewed-by: Nevenko Stupar <[email protected]> Reviewed-by: Jun Lei <[email protected]> Acked-by: Qingqing Zhuo <[email protected]> Signed-off-by: Alvin Lee <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-03-31drm/amd/display: Enable FPO for configs that could reduce vlevelAlvin Lee4-6/+20
[Description] - On high refresh rate DRR displays that support VBLANK naturally, UCLK could be idling at DPM1 instead of DPM0 since it doesn't use FPO - To achieve DPM0, enable FPO on these configs even though it can support P-State without FPO - Default disable for now, have debug option to enable Reviewed-by: Jun Lei <[email protected]> Acked-by: Qingqing Zhuo <[email protected]> Signed-off-by: Alvin Lee <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-03-31drm/amd/display: Add NULL plane_state check for cursor disable logicNicholas Kazlauskas1-1/+3
[Why] While scanning the top_pipe connections we can run into a case where the bottom pipe is still connected to a top_pipe but with a NULL plane_state. [How] Treat a NULL plane_state the same as the plane being invisible for pipe cursor disable logic. Cc: [email protected] Cc: Mario Limonciello <[email protected]> Reviewed-by: Charlene Liu <[email protected]> Acked-by: Qingqing Zhuo <[email protected]> Signed-off-by: Nicholas Kazlauskas <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-03-31drm/amdgpu: Correct xgmi_wafl block nameHawking Zhang1-1/+1
Fix backward compatibility issue to stay with the old name of xgmi_wafl node. Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Tao Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-03-31drm/amd/pm: re-enable the gfx imu when smu resumeTim Huang1-12/+28
If the gfx imu is poweroff when suspend, then it need to be re-enabled when resume. Signed-off-by: Tim Huang <[email protected]> Reviewed-by: Yifan Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-03-31drm/amdgpu: Add JPEG IP block to SRIOV reinitYifan Zha1-1/+2
[Why] Reset(mode1) failed as JPRG IP did not reinit under sriov. [How] Add JPEG IP block to sriov reinit function. Signed-off-by: Yifan Zha <[email protected]> Reviewed-by: Horace Chen <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-03-31drm/amd/amdgpu: Remove initialisation of globals to 0 or NULLSrinivasan Shanmugam1-2/+2
Global variables do not need to be initialized to 0 or NULL and checkpatch flags this error in drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c: ERROR: do not initialise globals to NULL +char *amdgpu_disable_cu = NULL; +char *amdgpu_virtual_display = NULL; Fix this checkpatch error. Cc: Christian König <[email protected]> Cc: Alex Deucher <[email protected]> Cc: Mario Limonciello <[email protected]> Cc: Hamza Mahfooz <[email protected]> Signed-off-by: Srinivasan Shanmugam <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-03-31drm/amdgpu: add GMC ip block for GC 9.4.3Hawking Zhang1-0/+1
Add GMC IP handling for GC 9.4.3 Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Le Ma <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-03-31drm/amdgpu: initialize gfxhub v1_2 and mmhub v1_8 funcsLe Ma1-1/+9
Initialize gfxhub1.2 and mmhub1.8 function calls Signed-off-by: Le Ma <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-03-31drm/amdgpu: add mmhub v1_8 supportLe Ma3-1/+506
Hack the mmhub 1.7 reg offset for initial support v2: squash in header switch, CG funcs (Alex) Signed-off-by: Le Ma <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-03-31drm/amdgpu: add mmhub v1_8_0 ip headersHawking Zhang2-0/+25629
Add mmhub v1_8_0 register offset and shift masks header files v2: update headers (Alex) Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Le Ma <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-03-31drm/amdgpu: add gfxhub v1_2 supportLe Ma3-1/+501
Hack the gc 9.0 reg offset for initial support v2: squash in header switch (Alex) Signed-off-by: Le Ma <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-03-31drm/amdgpu: add gmc ip block support for GC 9.4.3Hawking Zhang1-4/+10
Initialize various gmc sw/hw settings/configurations for GC 9.4.3. Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Le Ma <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-03-31drm/amdgpu: add gc v9_4_3 ip headersHawking Zhang2-0/+37793
Add gc v9_4_3 register offset and shift masks header files v2: update headers (Alex) v3: more updates (Alex) Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Le Ma <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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