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2023-05-19drm/display/dsc: split DSC 1.2 and DSC 1.1 (pre-SCR) parametersDmitry Baryshkov2-26/+123
The array of rc_parameters contains a mixture of parameters from DSC 1.1 and DSC 1.2 standards. Split these tow configuration arrays in preparation to adding more configuration data. Signed-off-by: Dmitry Baryshkov <[email protected]> Reviewed-by: Suraj Kandpal Reviewed-by: Suraj Kandpal Reviewed-by: Suraj Kandpal <[email protected]> Signed-off-by: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Acked-by: Dave Airlie <[email protected]>
2023-05-19drm/display/dsc: use flat array for rc_parameters lookupDmitry Baryshkov1-120/+108
Next commits are going to add support for additional RC parameter lookup tables. These tables are going to use different bpp/bpc combinations, thus it makes little sense to keep the 2d array for RC parameters. Switch to using the flat array. Reviewed-by: Jani Nikula <[email protected]> Signed-off-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Acked-by: Dave Airlie <[email protected]>
2023-05-19drm/i915/dsc: stop using interim structure for calculated paramsDmitry Baryshkov1-74/+26
Stop using an interim structure rc_parameters for storing calculated params and then setting drm_dsc_config using that structure. Instead put calculated params into the struct drm_dsc_config directly. Reviewed-by: Jani Nikula <[email protected]> Signed-off-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-05-19drm/i915/dsc: move DSC tables to DRM DSC helperDmitry Baryshkov2-312/+379
Move DSC RC tables to DRM DSC helper. No additional code changes and/or cleanups are a part of this commit, it will be cleaned up in the followup commits. Reviewed-by: Jani Nikula <[email protected]> Signed-off-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Acked-by: Dave Airlie <[email protected]>
2023-05-19drm/i915/dsc: move rc_buf_thresh values to common helperDmitry Baryshkov2-23/+36
The rc_buf_thresh values are common to all DSC implementations. Move them to the common helper together with the code to propagate them to the drm_dsc_config. Reviewed-by: Jani Nikula <[email protected]> Reviewed-by: Marijn Suijten <[email protected]> Signed-off-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Acked-by: Dave Airlie <[email protected]>
2023-05-19drm/i915/dsc: change DSC param tables to follow the DSC modelDmitry Baryshkov1-2/+20
After cross-checking DSC models (20150914, 20161212, 20210623) change values in rc_parameters tables to follow config files present inside the DSC model. Handle two places, where i915 tables diverged from the model, by patching the rc values in the code. Note: I left one case uncorrected, 8bpp/10bpc/range_max_qp[0], because the table in the VESA DSC 1.1 sets it to 4. Reviewed-by: Jani Nikula <[email protected]> Signed-off-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-05-19drm/i915: Fix memory leaks in function live_nop_switchCong Liu1-6/+8
Be sure to properly free the allocated memory before exiting the live_nop_switch function. Signed-off-by: Cong Liu <[email protected]> Suggested-by: Rodrigo Vivi <[email protected]> Signed-off-by: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-05-19drm/i915/hdmi: C20 computed PLL frequenciesClint Taylor2-6/+137
Use algorithm to generate HDMI C20 PLL clock frequencies. v2: checkpatch fixes BSPEC: 64568 Cc: Radhakrishna Sripada <[email protected]> Cc: Mika Kahola <[email protected]> Cc: Anusha Srivatsa <[email protected]> Reviewed-by: Gustavo Sousa <[email protected]> Signed-off-by: Clint Taylor <[email protected]> [mattrope: Wrapped one overly long line] Signed-off-by: Matt Roper <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-05-19drm/i915: Add 16bit register/mask operatorsClint Taylor1-0/+48
Add the support macros to define/extract bits as 16bits. v2: checkpatch fixes Reviewed-by: Gustavo Sousa <[email protected]> Signed-off-by: Clint Taylor <[email protected]> Signed-off-by: Matt Roper <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-05-19drm/msm/dpu: simplify intf allocation codeDmitry Baryshkov3-31/+18
Rather than passing DRM_MODE_ENCODER_* and letting dpu_encoder to guess, which intf type we mean, pass INTF_DSI/INTF_DP directly. This is required to support HDMI output in DPU, as both DP and HDMI encoders are DRM_MODE_ENCODER_TMDS. Thus dpu_encoder code can not make a difference between HDMI and DP outputs. Reviewed-by: Bjorn Andersson <[email protected]> Signed-off-by: Dmitry Baryshkov <[email protected]> Reviewed-by: Arnaud Vrac <[email protected]> Tested-by: Arnaud Vrac <[email protected]> Reviewed-by: Abhinav Kumar <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/532370/ Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Dmitry Baryshkov <[email protected]>
2023-05-19drm/msm/dpu: use CTL_SC7280_MASK for sm8450's ctl_0Dmitry Baryshkov1-1/+1
On sm8450 platform the CTL_0 doesn't differ from the rest of CTL blocks, so switch it to CTL_SC7280_MASK too. Some background: original commit 100d7ef6995d ("drm/msm/dpu: add support for SM8450") had all (relevant at that time) bit spelled individually. Then commit 0e91bcbb0016 ("drm/msm/dpu: Add SM8350 to hw catalog"), despite being a mismerge, correctly changed all other CTL entries to use CTL_SC7280_MASK, except CTL_0. While the current BLOCK_SOC_MASK style is not ideal (and while we are working on a better scheme), let's follow its usage as a least minimal surprise. For example, sc8280xp, a close associate of sm8450, also uses CTL_SC7280_MASK. Signed-off-by: Dmitry Baryshkov <[email protected]> Reviewed-by: Abhinav Kumar <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/531493/ Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Dmitry Baryshkov <[email protected]>
2023-05-19drm/msm/dpu: enable DSPP and DSC on sc8180xDmitry Baryshkov1-2/+26
Enable DSPP and DSC hardware blocks on sc8180x platform. Signed-off-by: Dmitry Baryshkov <[email protected]> Reviewed-by: Abhinav Kumar <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/531490/ Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Dmitry Baryshkov <[email protected]>
2023-05-19drm/msm/dpu: enable DSPP_2/3 for LM_2/3 on sm8450Dmitry Baryshkov1-2/+2
Mark DSPP_2 and DSPP_3 as used for LM_2 and LM_3 Fixes: 100d7ef6995d ("drm/msm/dpu: add support for SM8450") Signed-off-by: Dmitry Baryshkov <[email protected]> Reviewed-by: Abhinav Kumar <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/531491/ Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Dmitry Baryshkov <[email protected]>
2023-05-19drm/msm/dpu: enable DPU_CTL_SPLIT_DISPLAY for sc8280xpDmitry Baryshkov1-2/+3
Theoretically, since sm8150 we should be using a single CTL for the split panel case, but since we do not support it for now, fallback to DPU_CTL_SPLIT_DISPLAY. Signed-off-by: Dmitry Baryshkov <[email protected]> Reviewed-by: Abhinav Kumar <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/531489/ Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Dmitry Baryshkov <[email protected]>
2023-05-19drm/sched: Rename to drm_sched_wakeup_if_can_queue()Luben Tuikov2-5/+5
Rename drm_sched_wakeup() to drm_sched_wakeup_if_canqueue() since the former is misleading, as it wakes up the GPU scheduler _only if_ more jobs can be queued to the underlying hardware. This distinction is important to make, since the wake conditional in the GPU scheduler thread wakes up when other conditions are also true, e.g. when there are jobs to be cleaned. For instance, a user might want to wake up the scheduler only because there are more jobs to clean, but whether we can queue more jobs is irrelevant. v2: Separate "canqueue" to "can_queue". (Alex D.) Cc: Christian König <[email protected]> Cc: Alex Deucher <[email protected]> Signed-off-by: Luben Tuikov <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Alex Deucher <[email protected]>
2023-05-19drm/sched: Rename to drm_sched_can_queue()Luben Tuikov1-5/+4
Rename drm_sched_ready() to drm_sched_can_queue(). "ready" can mean many things and is thus meaningless in this context. Instead, rename to a name which precisely conveys what is being checked. Cc: Christian König <[email protected]> Cc: Alex Deucher <[email protected]> Signed-off-by: Luben Tuikov <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2023-05-19drm/sched: Remove redundant checkVladislav Efanov1-3/+0
The rq pointer points inside the drm_gpu_scheduler structure. Thus it can't be NULL. Found by Linux Verification Center (linuxtesting.org) with SVACE. Fixes: c61cdbdbffc1 ("drm/scheduler: Fix hang when sched_entity released") Signed-off-by: Vladislav Efanov <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Luben Tuikov <[email protected]> Signed-off-by: Luben Tuikov <[email protected]>
2023-05-19Merge tag 'drm-misc-next-2023-05-11' of ↵Dave Airlie74-663/+1952
git://anongit.freedesktop.org/drm/drm-misc into drm-next drm-misc-next for 6.5: UAPI Changes: Cross-subsystem Changes: - arch: Consolidate <asm/fb.h> Core Changes: - aperture: Ignore firmware framebuffers with non-primary devices - fbdev: Use fbdev's I/O helpers - sysfs: Expose DRM connector ID - tests: More tests for drm_rect Driver Changes: - armada: Implement fbdev emulation as a client - bridge: - fsl-ldb: Support i.MX6SX - lt9211: Remove blanking packets - lt9611: Remove blanking packets - tc358768: Implement input bus formats reporting, fix various timings and clocks settings - ti-sn65dsi86: Implement wait_hpd_asserted - nouveau: Improve NULL pointer checks before dereference - panel: - nt36523: Support Lenovo J606F - st7703: Support Anbernic RG353V-V2 - new panels: InnoLux G070ACE-L01 - sun4i: Fix MIPI-DSI dotclock - vc4: RGB Range toggle property, BT601 and BT2020 support for HDMI - vkms: Convert to drmm helpers, Add reflection and rotation support Signed-off-by: Dave Airlie <[email protected]> From: Maxime Ripard <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/2pxmxdzsk2ekjy6xvbpj67zrhtwvkkhfspuvdm5pfm5i54hed6@sooct7yq6z4w
2023-05-19Merge tag 'amd-drm-fixes-6.4-2023-05-18' of ↵Dave Airlie9-46/+80
https://gitlab.freedesktop.org/agd5f/linux into drm-fixes amd-drm-fixes-6.4-2023-05-18: amdgpu: - update gfx11 clock counter logic - Fix a race when disabling gfxoff on gfx10/11 for profiling - Raven/Raven2/PCO clock counter fix - Add missing get_vbios_fb_size for GMC 11 - Fix a spurious irq warning in the device remove case - Fix possible power mode mismatch between driver and PMFW - USB4 fix Signed-off-by: Dave Airlie <[email protected]> From: Alex Deucher <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-05-19Merge tag 'drm-msm-fixes-2023-05-17' of ↵Dave Airlie24-108/+124
https://gitlab.freedesktop.org/drm/msm into drm-fixes msm-fixes for v6.4-rc3 Display Fixes: + Catalog fixes: - fix the programmable fetch lines and qos settings of msm8998 to match what is present downstream - fix the LM pairs for msm8998 to match what is present downstream. The current settings are not right as LMs with incompatible connected blocks are paired - remove unused INTF0 interrupt mask from SM6115/QCM2290 as there is no INTF0 present on those chipsets. There is only one DSI on index 1 - remove TE2 block from relevant chipsets because this is mainly used for ping-pong split feature which is not supported upstream and also for the chipsets where we are removing them in this change, that block is not present as the tear check has been moved to the intf block - relocate non-MDP_TOP INTF_INTR offsets from dpu_hwio.h to dpu_hw_interrupts.c to match where they belong - fix the indentation for REV_7xxx interrupt masks - fix the offset and version for dither blocks of SM8[34]50/SC8280XP chipsets as it was incorrect - make the ping-pong blk length 0 for appropriate chipsets as those chipsets only have a dither ping-pong dither block but no other functionality in the base ping-pong - remove some duplicate register defines from INTF + Fix the log mask for the writeback block so that it can be enabled correctly via debugfs + unregister the hdmi codec for dp during unbind otherwise it leaks audio codec devices + Yaml change to fix warnings related to 'qcom,master-dsi' and 'qcom,sync-dual-dsi' GPU Fixes: + fix submit error path leak + arm-smmu-qcom fix for regression that broke per-process page tables + fix no-iommu crash Signed-off-by: Dave Airlie <[email protected]> From: Rob Clark <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/CAF6AEGvHEcJfp=k6qatmb_SvAeyvy3CBpaPfwLqtNthuEzA_7w@mail.gmail.com
2023-05-19Merge tag 'drm-intel-fixes-2023-05-17' of ↵Dave Airlie1-4/+6
git://anongit.freedesktop.org/drm/drm-intel into drm-fixes Add missing null check for HDCP code. Signed-off-by: Dave Airlie <[email protected]> From: Joonas Lahtinen <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-05-18drm/i915/mtl: Extend Wa_16014892111 to MTL A-stepRadhakrishna Sripada1-1/+3
Like DG2, MTL a-step hardware is subject to Wa_16014892111 which requires that any changes made to the DRAW_WATERMARK register be done via an INDIRECT_CTX batch buffer rather than through a regular context workaround. The bspec gives the same non-default recommended tuning value for DRAW_WATERMARK as DG2, so we can re-use the INDIRECT_CTX code to apply that tuning setting on A-step hardware. Application of the tuning setting on B-step and later does not need INDIRECT_CTX handling and is already done in mtl_ctx_workarounds_init() as usual. v2: Limit the WA for A-step v3: Update the commit message. v4: Reorder platform checks and update commit message. Bspec: 68331 Cc: Haridhar Kalvala <[email protected]> Cc: Gustavo Sousa <[email protected]> Reviewed-by: Matt Roper <[email protected]> Signed-off-by: Radhakrishna Sripada <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-05-18drm/i915/mtl: Add MTL performance tuning changesRadhakrishna Sripada1-1/+22
MTL reuses the tuning parameters for DG2. Extend the dg2 performance tuning parameters to MTL. v2: Add DRAW_WATERMARK tuning parameter. v3: Limit DRAW_WATERMARK tuning to non A0 step. v4: Reorder platform checks. Restrict Blend fill caching optimization to Render GT. v5: Move mtl tuning params to its own function Bspec: 68331 Cc: Haridhar Kalvala <[email protected]> Cc: Matt Roper <[email protected]> Reviewed-by: Gustavo Sousa <[email protected]> Signed-off-by: Radhakrishna Sripada <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-05-18drm/i915/mtl: do not enable render power-gating on MTLAndrzej Hajda1-2/+8
Multiple CI tests fails with forcewake ack timeouts if render power gating is enabled. BSpec 52698 states it should be 0 for MTL, but apparently this info is outdated. Anyway since the patch makes MTL pass basic tests added FIXME tag informing this is temporary workaround. v2: added FIXME tag Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/4983 Signed-off-by: Andrzej Hajda <[email protected]> Reviewed-by: Nirmoy Das <[email protected]> Reviewed-by: Rodrigo Vivi <[email protected]> Reviewed-by: Andi Shyti <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-05-18drm/i915/mtl: Fix expected reg value for Thunderbolt PLL disablingMika Kahola1-3/+1
While disabling Thunderbolt PLL, we request PLL to be stopped and wait for ACK bit to be cleared. The expected value should be '0' instead of '~XELPDP_TBT_CLOCK_ACK' or otherwise we incorrectly receive dmesg warn "PHY PLL not unlocked in 10us". Signed-off-by: Mika Kahola <[email protected]> Reviewed-by: Imre Deak <[email protected]> Signed-off-by: Radhakrishna Sripada <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-05-18drm/amd/display: enable dpia validateMustapha Ghaddar1-0/+3
Use dpia_validate_usb4_bw() function Fixes: a8b537605e22 ("drm/amd/display: Add function pointer for validate bw usb4") Reviewed-by: Roman Li <[email protected]> Reviewed-by: Meenakshikumar Somasundaram <[email protected]> Acked-by: Aurabindo Pillai <[email protected]> Signed-off-by: Mustapha Ghaddar <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-05-18drm/amd/pm: fix possible power mode mismatch between driver and PMFWEvan Quan3-19/+20
PMFW may boots the ASIC with a different power mode from the system's real one. Notify PMFW explicitly the power mode the system in. This is needed only when ACDC switch via gpio is not supported. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Kenneth Feng <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2023-05-18drm/amdgpu: skip disabling fence driver src_irqs when device is unpluggedGuchun Chen1-1/+2
When performing device unbind or halt, we have disabled all irqs at the very begining like amdgpu_pci_remove or amdgpu_device_halt. So amdgpu_irq_put for irqs stored in fence driver should not be called any more, otherwise, below calltrace will arrive. [ 139.114088] WARNING: CPU: 2 PID: 1550 at drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c:616 amdgpu_irq_put+0xf6/0x110 [amdgpu] [ 139.114655] Call Trace: [ 139.114655] <TASK> [ 139.114657] amdgpu_fence_driver_hw_fini+0x93/0x130 [amdgpu] [ 139.114836] amdgpu_device_fini_hw+0xb6/0x350 [amdgpu] [ 139.114955] amdgpu_driver_unload_kms+0x51/0x70 [amdgpu] [ 139.115075] amdgpu_pci_remove+0x63/0x160 [amdgpu] [ 139.115193] ? __pm_runtime_resume+0x64/0x90 [ 139.115195] pci_device_remove+0x3a/0xb0 [ 139.115197] device_remove+0x43/0x70 [ 139.115198] device_release_driver_internal+0xbd/0x140 Signed-off-by: Guchun Chen <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-05-18drm/amdgpu/gmc11: implement get_vbios_fb_size()Alex Deucher1-1/+20
Implement get_vbios_fb_size() so we can properly reserve the vbios splash screen to avoid potential artifacts on the screen during the transition from the pre-OS console to the OS console. Acked-by: Sunil Khatri <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected] # 6.1.x
2023-05-18drm/amdgpu: Differentiate between Raven2 and Raven/Picasso according to ↵Jesse Zhang1-19/+14
revision id Due to the raven2 and raven/picasso maybe have the same GC_HWIP version. So differentiate them by revision id. Signed-off-by: shanshengwang <[email protected]> Signed-off-by: Jesse Zhang <[email protected]> Acked-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-05-18drm/amdgpu/gfx11: Adjust gfxoff before powergating on gfx11 as wellGuilherme G. Piccoli1-1/+7
(Bas: speculative change to mirror gfx10/gfx9) Signed-off-by: Guilherme G. Piccoli <[email protected]> Signed-off-by: Bas Nieuwenhuizen <[email protected]> Cc: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected] # 6.1.x
2023-05-18drm/amdgpu/gfx10: Disable gfxoff before disabling powergating.Bas Nieuwenhuizen1-1/+7
Otherwise we get a full system lock (looks like a FW mess). Copied the order from the GFX9 powergating code. Fixes: 366468ff6c34 ("drm/amdgpu: Allow GfxOff on Vangogh as default") Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2545 Signed-off-by: Bas Nieuwenhuizen <[email protected]> Tested-by: Guilherme G. Piccoli <[email protected]> Cc: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2023-05-18ipu-v3: Include <linux/io.h>Thomas Zimmermann1-0/+1
The code uses readl() and writel(). Include the header file to get the declarations. Signed-off-by: Thomas Zimmermann <[email protected]> Reviewed-by: Arnd Bergmann <[email protected]> Reviewed-by: Sam Ravnborg <[email protected]> Reviewed-by: Sui Jingfeng <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-05-17drm/i915/guc/slpc: Disable rps_boost debugfsVinay Belgaumkar2-1/+6
rps_boost debugfs shows host turbo related info. This is not valid when SLPC is enabled. guc_slpc_info already shows the number of boosts. Add num_waiters there as well and disable rps_boost when SLPC is enabled. v2: Replace Bug with Link to resolve checkpatch warning Link: https://gitlab.freedesktop.org/drm/intel/-/issues/7632 Reviewed-by: Ashutosh Dixit <[email protected]> Signed-off-by: Vinay Belgaumkar <[email protected]> Signed-off-by: John Harrison <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-05-17drm/amdgpu/gfx11: update gpu_clock_counter logicAlex Deucher1-4/+7
This code was written prior to previous updates to this logic for other chips. The RSC registers are part of SMUIO which is an always on block so there is no need to disable gfxoff. Additionally add the carryover and preemption checks. v2: rebase Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected] # 6.1.y: 5591a051b86b: drm/amdgpu: refine get gpu clock counter method Cc: [email protected] # 6.2.y: 5591a051b86b: drm/amdgpu: refine get gpu clock counter method Cc: [email protected] # 6.3.y: 5591a051b86b: drm/amdgpu: refine get gpu clock counter method
2023-05-17drm/msm: Be more shouty if per-process pgtables aren't workingRob Clark1-1/+6
Otherwise it is not always obvious if a dt or iommu change is causing us to fall back to global pgtable. Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Dmitry Baryshkov <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/537359/ Link: https://lore.kernel.org/r/[email protected]
2023-05-17drm/bridge: tc358767: Switch to devm MIPI-DSI helpersAlexander Stein1-2/+2
DSI device registering and attaching needs to be undone upon deregistration. This fixes module unload/load. Fixes: bbfd3190b656 ("drm/bridge: tc358767: Add DSI-to-DPI mode support") Signed-off-by: Alexander Stein <[email protected]> Reviewed-by: Robert Foss <[email protected]> Signed-off-by: Robert Foss <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-05-17Merge drm/drm-next into drm-intel-nextRodrigo Vivi538-10200/+134704
Backmerge to get some hwmon dependencies. Signed-off-by: Rodrigo Vivi <[email protected]>
2023-05-17drm/i915: tweak language in fastset pipe config compare loggingJani Nikula1-5/+10
The "fastset mismatch" debug logging has been slightly confusing, leading people to believe some error happened. Change it to the more informative "fastset requirement not met", and add a final message about this leading to full modeset. Cc: Ville Syrjälä <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Reviewed-by: Suraj Kandpal <[email protected]> Acked-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-05-17drm: panel-orientation-quirks: Change Air's quirk to support Air PlusMaya Matuszczyk1-1/+1
It turned out that Aya Neo Air Plus had a different board name than expected. This patch changes Aya Neo Air's quirk to account for that, as both devices share "Air" in DMI product name. Tested on Air claiming to be an Air Pro, and on Air Plus. Signed-off-by: Maya Matuszczyk <[email protected]> Reviewed-by: Hans de Goede <[email protected]> Signed-off-by: Hans de Goede <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-05-17drm/ttm: let struct ttm_device_funcs be placed in rodataJani Nikula1-1/+1
Make the struct ttm_device_funcs pointers const so the data can be placed in rodata. Cc: Christian Koenig <[email protected]> Cc: Huang Rui <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Reviewed-by: Christian König <[email protected]> Reviewed-by: Thomas Zimmermann <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-05-17drm/i915: fix intel_display_irq.c include orderJani Nikula1-8/+8
I meant to sort the includes before submitting commit 2b874a027810 ("drm/i915/irq: split out display irq handling") but forgot, and it wasn't noticed in review either. Sort the includes. Cc: Gustavo Sousa <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Reviewed-by: Gustavo Sousa <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-05-17drm/drm_atomic_helper.c: fix a typoSui Jingfeng1-1/+1
Signed-off-by: Sui Jingfeng <[email protected]> Acked-by: Thomas Zimmermann <[email protected]> Signed-off-by: Thomas Zimmermann <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-05-16drm/i915/guc: Dump error capture to dmesg on CTB errorJohn Harrison2-0/+59
In the past, There have been sporadic CTB failures which proved hard to reproduce manually. The most effective solution was to dump the GuC log at the point of failure and let the CI system do the repro. It is preferable not to dump the GuC log via dmesg for all issues as it is not always necessary and is not helpful for end users. But rather than trying to re-invent the code to do this each time it is wanted, commit the code but for DEBUG_GUC builds only. v2: Use IS_ENABLED for testing config options. Signed-off-by: John Harrison <[email protected]> Reviewed-by: Vinay Belgaumkar <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-05-16drm/i915: Dump error capture to kernel logJohn Harrison2-0/+142
This is useful for getting debug information out in certain situations, such as failing kernel selftests and CI runs that don't log error captures. It is especially useful for things like retrieving GuC logs as GuC operation can't be tracked by adding printk or ftrace entries. v2: Add CONFIG_DRM_I915_DEBUG_GEM wrapper (review feedback by Rodrigo). Signed-off-by: John Harrison <[email protected]> Reviewed-by: Vinay Belgaumkar <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-05-16drm/panel: Modify innolux hj110iz panel initial codeCong Yang1-162/+235
There is a problem of screen shake on the old panel. So increase the panel GOP component pull-down circuit size in hardware, and update the initialization code at the same time. The new initialization code mainly modifles the following. a)adjusted for GOP timing. When Display sleep in, raise all GOP signals to VGHO and then drop to GND. b)Increased the Vertical back Porch and Vertical pulse width, so need to update vsync_end and vtotal and CLK in drm_display_mode. Signed-off-by: Cong Yang <[email protected]> Reviewed-by: Douglas Anderson <[email protected]> [dianders: fixed spelling mistake in subject] Signed-off-by: Douglas Anderson <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/20230509025153.1321446-1-yangcong5@huaqin.corp-partner.google.com
2023-05-16drm/i915/tc: Reset TypeC PHYs left enabled in DP-alt mode after the sink ↵Imre Deak6-25/+265
disconnects If the output on a DP-alt link with its sink disconnected is kept enabled for too long (about 20 sec), then some IOM/TCSS firmware timeout will cause havoc on the PCI bus, at least for other GFX devices on it which will stop powering up. Since user space is not guaranteed to do a disabling modeset in time, switch such disconnected but active links to TBT mode - which is without such shortcomings - with a 2 second delay. If the above condition is detected already during the driver load/system resume sanitization step disable the output instead, as at that point no user space or kernel client depends on a consistent output state yet and because subsequent atomic modeset on such connectors - without the actual sink capabilities available - can fail. An active/disconnected port as above will also block the HPD status of other active/disconnected ports to get updated (stuck in the connected state), until the former port is disabled, its PHY is disconnected and a ~10 ms delay has elapsed. This means the link state for all TypeC ports/CRTCs must be rechecked after a CRTC is disabled due to the above reason. For this disconnect the PHY synchronously after the CRTC/port is disabled and recheck all CRTCs for the above condition whenever such a port is disabled. To account for a race condition during driver loading where the sink is disconnected after the above sanitization step and before the HPD interrupts get enabled, do an explicit check/link reset if needed from the encoder's late_register hook, which is called after the HPD interrupts are enabled already. v2: - Handle an active/disconnected port blocking the HPD state update of another active/disconnected port. - Cancel the delayed work resetting the link also from the encoder enable/suspend/shutdown hooks. - Rebase on the earlier intel_modeset_lock_ctx_retry() addition, fixing here the missed atomic state reset in case of a retry. - Fix handling of an error return from intel_atomic_get_crtc_state(). - Recheck if the port needs to be reset after all the atomic state is locked and async commits are waited on. v3: - Add intel_crtc_needs_link_reset(), instead of open-coding it, keep intel_crtc_has_encoders(). (Ville) - Fix state dumping and use a bitmask to track disabled CRTCs in intel_sanitize_all_crtcs(). (Ville) - Set internal in intel_atomic_state right after allocating it. (Ville) - Recheck all CRTCs (not yet force-disabled) after a CRTC is force-disabled for any reason (not only due to a link state) in intel_sanitize_all_crtcs(). - Reduce delay after CRTC disabling to 20ms, and use the simpler msleep(). - Clarify code comment about HPD behaviour in intel_sanitize_all_crtcs(). - Move all the TC link reset logic to intel_tc.c . - Cancel the link reset work synchronously during system suspend, driver unload and shutdown. v4: - Rebased on previous patch, which allows calling the TC port suspend/cleanup handlers without modeset locks held; remove the display driver suspended assert from the link reset work accordingly. v5: (Ville) - Remove reset work canceling from intel_ddi_pre_pll_enable(). - Track a crtc vs. pipe mask in intel_sanitize_all_crtcs(). - Add reset_link_commit() to clarify the intel_modeset_lock_ctx_retry loop. Cc: Kai-Heng Feng <[email protected]> Cc: Ville Syrjälä <[email protected]> Tested-by: Kai-Heng Feng <[email protected]> Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/5860 Reviewed-by: Ville Syrjälä <[email protected]> Signed-off-by: Imre Deak <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-05-16drm/i915/tc: Call TypeC port flush_work/cleanup without modeset locks heldImre Deak3-14/+41
Call the TypeC port flush_work and cleanup handlers without the modeset locks held. These don't require the locks, as the work takes - as it should be able to at any point in time - any locks it needs and by the time cleanup is called and after cleanup returns the encoder is not in use. This is required by the next patch canceling a TypeC port work synchronously during encoder suspend and shutdown, where the work can take modeset locks as well, hence the canceling must be done without holding the locks. I also considered moving the modeset locking down to each encoder suspend()/shutdown() hook instead, however locking the full modeset state for each encoder separately would be odd, and the bigger change - affecting all encoders - is beyond the scope of this patchset. v2: - Add a TODO: comment to remove modeset locks if no encoder depends on this. (Ville) Cc: Ville Syrjälä <[email protected]> Reviewed-by: Ville Syrjälä <[email protected]> Signed-off-by: Imre Deak <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-05-16drm/i915: Factor out a helper for handling atomic modeset locks/stateImre Deak4-14/+87
This patch simplifying the handling of modeset locks and atomic state for an atomic commit is based on https://lore.kernel.org/all/[email protected]/ adding the helper to i915. I find this approach preferrable than open-coding the corresponding steps (fixed for me an atomic state reset during a DEADLK retry, which I missed in the open-coded version) and also better than the existing DRM_MODESET_LOCK_ALL_BEGIN/END macros for the reasons described in the above original patchset. This change takes the helper into use only for atomic commits during DDI hotplug handling, as a preparation for a follow-up patch adding a similar commit started from the same spot. Other places doing a driver-internal atomic commit is to be converted by a follow-up patchset. Cc: Ville Syrjälä <[email protected]> Reviewed-by: Ville Syrjälä <[email protected]> Signed-off-by: Imre Deak <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-05-16drm/i915/dp: Factor out intel_dp_get_active_pipes()Imre Deak1-10/+10
Factor out a helper used by a follow up patch to reset an active DP link. No functional changes. Cc: Ville Syrjälä <[email protected]> Reviewed-by: Ville Syrjälä <[email protected]> Signed-off-by: Imre Deak <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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