| Age | Commit message (Collapse) | Author | Files | Lines |
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Fix the following errors & warnings reported by checkpatch:
ERROR: space required before the open brace '{'
ERROR: space required before the open parenthesis '('
ERROR: that open brace { should be on the previous line
ERROR: space prohibited before that ',' (ctx:WxW)
ERROR: else should follow close brace '}'
ERROR: open brace '{' following function definitions go on the next line
ERROR: code indent should use tabs where possible
WARNING: braces {} are not necessary for single statement blocks
WARNING: void function return statements are not generally useful
WARNING: Block comments use * on subsequent lines
WARNING: Block comments use a trailing */ on a separate line
Cc: Rodrigo Siqueira <[email protected]>
Cc: Aurabindo Pillai <[email protected]>
Cc: Alex Deucher <[email protected]>
Signed-off-by: Srinivasan Shanmugam <[email protected]>
Reviewed-by: Rodrigo Siqueira <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Allow the initramfs generator to automatically include psp_13_0_6_ta
firmware to initramfs.
Signed-off-by: Candice Li <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Use current uclk to be consistent with other dGPUs.
Reviewed-by: Kenneth Feng <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Cc: [email protected] # 6.1.x
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Use average gfxclock for consistency with other dGPUs.
Reviewed-by: Kenneth Feng <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Cc: [email protected] # 6.1.x
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Up until now, amdgpu was silently degrading to vsync when
user-space requested an async flip but the hardware didn't support
it.
The hardware doesn't support immediate flips when the update changes
the FB pitch, the DCC state, the rotation, enables or disables CRTCs
or planes, etc. This is reflected in the dm_crtc_state.update_type
field: UPDATE_TYPE_FAST means that immediate flip is supported.
Silently degrading async flips to vsync is not the expected behavior
from a uAPI point-of-view. Xorg expects async flips to fail if
unsupported, to be able to fall back to a blit. i915 already behaves
this way.
This patch aligns amdgpu with uAPI expectations and returns a failure
when an async flip is not possible.
Signed-off-by: Simon Ser <[email protected]>
Reviewed-by: André Almeida <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Reviewed-by: Harry Wentland <[email protected]>
Signed-off-by: André Almeida <[email protected]>
Signed-off-by: Hamza Mahfooz <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Cc: [email protected]
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In below thousands of screen rotation loop tests with virtual display
enabled, a CPU hard lockup issue may happen, leading system to unresponsive
and crash.
do {
xrandr --output Virtual --rotate inverted
xrandr --output Virtual --rotate right
xrandr --output Virtual --rotate left
xrandr --output Virtual --rotate normal
} while (1);
NMI watchdog: Watchdog detected hard LOCKUP on cpu 1
? hrtimer_run_softirq+0x140/0x140
? store_vblank+0xe0/0xe0 [drm]
hrtimer_cancel+0x15/0x30
amdgpu_vkms_disable_vblank+0x15/0x30 [amdgpu]
drm_vblank_disable_and_save+0x185/0x1f0 [drm]
drm_crtc_vblank_off+0x159/0x4c0 [drm]
? record_print_text.cold+0x11/0x11
? wait_for_completion_timeout+0x232/0x280
? drm_crtc_wait_one_vblank+0x40/0x40 [drm]
? bit_wait_io_timeout+0xe0/0xe0
? wait_for_completion_interruptible+0x1d7/0x320
? mutex_unlock+0x81/0xd0
amdgpu_vkms_crtc_atomic_disable
It's caused by a stuck in lock dependency in such scenario on different
CPUs.
CPU1 CPU2
drm_crtc_vblank_off hrtimer_interrupt
grab event_lock (irq disabled) __hrtimer_run_queues
grab vbl_lock/vblank_time_block amdgpu_vkms_vblank_simulate
amdgpu_vkms_disable_vblank drm_handle_vblank
hrtimer_cancel grab dev->event_lock
So CPU1 stucks in hrtimer_cancel as timer callback is running endless on
current clock base, as that timer queue on CPU2 has no chance to finish it
because of failing to hold the lock. So NMI watchdog will throw the errors
after its threshold, and all later CPUs are impacted/blocked.
So use hrtimer_try_to_cancel to fix this, as disable_vblank callback
does not need to wait the handler to finish. And also it's not necessary
to check the return value of hrtimer_try_to_cancel, because even if it's
-1 which means current timer callback is running, it will be reprogrammed
in hrtimer_start with calling enable_vblank to make it works.
v2: only re-arm timer when vblank is enabled (Christian) and add a Fixes
tag as well
v3: drop warn printing (Christian)
v4: drop superfluous check of blank->enabled in timer function, as it's
guaranteed in drm_handle_vblank (Christian)
Fixes: 84ec374bd580 ("drm/amdgpu: create amdgpu_vkms (v4)")
Cc: [email protected]
Suggested-by: Christian König <[email protected]>
Signed-off-by: Guchun Chen <[email protected]>
Reviewed-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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[Why&How]
DCN301 does not have FAMS hence the workaround needed on other DCN3x
variants related to OTG min/max selector programming is not applicable for it.
Hence isolate it and have it use the old sequence without workaround.
Fixes: 1598fc576420 ("drm/amd/display: Program OTG vtotal min/max selectors unconditionally for DCN1+")
Reviewed-by: Swapnil Patel <[email protected]>
Signed-off-by: Aurabindo Pillai <[email protected]>
Tested-by: Guilherme G. Piccoli <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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[Why&How]
Make a few functions non static so that they can be reused for other
asic. This is in preparation for separating out OTG programming sequence
for DCN301
Fixes: 1598fc576420 ("drm/amd/display: Program OTG vtotal min/max selectors unconditionally for DCN1+")
Reviewed-by: Swapnil Patel <[email protected]>
Signed-off-by: Aurabindo Pillai <[email protected]>
Tested-by: Guilherme G. Piccoli <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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SMU7 does a check if the dGPU is inserted into a Rocket Lake system,
to turn off DPM. Extend this check to all systems that have problems
with dynamic switching by using the
amdgpu_device_pcie_dynamic_switching_supported() helper.
Signed-off-by: Mario Limonciello <[email protected]>
Reviewed-by: Evan Quan <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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~0 as no xcp partition is used in several places, so improve its
definition by a macro for code consistency.
Suggested-by: Christian König <[email protected]>
Signed-off-by: Guchun Chen <[email protected]>
Reviewed-by: Felix Kuehling <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Other PDs/PTs allocation should just use the same xcp_id as that
stored in root PD.
Suggested-by: Christian König <[email protected]>
Signed-off-by: Guchun Chen <[email protected]>
Reviewed-by: Felix Kuehling <[email protected]>
Reviewed-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Recent code set xcp_id stored from file private data when opening
device to amdgpu bo for accounting memory usage etc, but not all
VMs are attached to this fpriv structure like the vm cases in
amdgpu_mes_self_test, otherwise, KASAN will complain below out
of bound access. And more importantly, VM code should not touch
fpriv structure, so drop fpriv code handling from amdgpu_vm_pt.
[ 77.292314] BUG: KASAN: slab-out-of-bounds in amdgpu_vm_pt_create+0x17e/0x4b0 [amdgpu]
[ 77.293845] Read of size 4 at addr ffff888102c48a48 by task modprobe/1069
[ 77.294146] Call Trace:
[ 77.294178] <TASK>
[ 77.294208] dump_stack_lvl+0x49/0x63
[ 77.294260] print_report+0x16f/0x4a6
[ 77.294307] ? amdgpu_vm_pt_create+0x17e/0x4b0 [amdgpu]
[ 77.295979] ? kasan_complete_mode_report_info+0x3c/0x200
[ 77.296057] ? amdgpu_vm_pt_create+0x17e/0x4b0 [amdgpu]
[ 77.297556] kasan_report+0xb4/0x130
[ 77.297609] ? amdgpu_vm_pt_create+0x17e/0x4b0 [amdgpu]
[ 77.299202] __asan_load4+0x6f/0x90
[ 77.299272] amdgpu_vm_pt_create+0x17e/0x4b0 [amdgpu]
[ 77.300796] ? amdgpu_init+0x6e/0x1000 [amdgpu]
[ 77.302222] ? amdgpu_vm_pt_clear+0x750/0x750 [amdgpu]
[ 77.303721] ? preempt_count_sub+0x18/0xc0
[ 77.303786] amdgpu_vm_init+0x39e/0x870 [amdgpu]
[ 77.305186] ? amdgpu_vm_wait_idle+0x90/0x90 [amdgpu]
[ 77.306683] ? kasan_set_track+0x25/0x30
[ 77.306737] ? kasan_save_alloc_info+0x1b/0x30
[ 77.306795] ? __kasan_kmalloc+0x87/0xa0
[ 77.306852] amdgpu_mes_self_test+0x169/0x620 [amdgpu]
v2: without specifying xcp partition for PD/PT bo, the xcp id is -1.
Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2686
Fixes: 3ebfd221c1a8 ("drm/amdkfd: Store xcp partition id to amdgpu bo")
Signed-off-by: Guchun Chen <[email protected]>
Tested-by: Mikhail Gavrilov <[email protected]>
Reviewed-by: Felix Kuehling <[email protected]>
Reviewed-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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file_priv needs to be setup firstly, otherwise, root PD
will always be allocated on partition 0, even if opening
the device from other partitions.
Fixes: 3ebfd221c1a8 ("drm/amdkfd: Store xcp partition id to amdgpu bo")
Signed-off-by: Guchun Chen <[email protected]>
Reviewed-by: Felix Kuehling <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Add RLCG interface support for gfx v9.4.3 and multiple XCCs.
Do not enable it yet.
v2: Fix amdgpu_rlcg_reg_access_ctrl init, add support for multiple XCCs
in amdgpu_mm_wreg_mmio_rlc
v3: Use GET_INST() when indexing amdgpu_rlcg_reg_access_ctrl
Signed-off-by: Victor Lu <[email protected]>
Reviewed-by: Zhigang Luo <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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This version brings along following fixes:
- Update 128b/132b downspread factor to 0.3%
- Add helpers to get DMUB FW boot options
- Initialize necessary uninitialized variables
- Add stream overhead in BW calculations for 128b/132b
- Add link encoding to timing BW calculation parameters
- Prevent vtotal from being set to 0
- Fix race condition when turning off an output alone
- Keep PHY active for DP displays on DCN31
- Fix ASIC check in aux timeout workaround
- ABM pause toggle
- Add missing triggers for full updates
- Disable MPC split by default on special asic
- Add additional refresh rate conditions for SubVP cases
- Fix DP2 link training failure with RCO
- Reenable all root clock gating options
- Cache backlight_millinits in link structure and setting brightness accordingly
- Refine to decide the verified link setting
- Update SW cursor fallback for subvp high refresh
Acked-by: Alan Liu <[email protected]>
Signed-off-by: Aric Cyr <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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[Description]
- Full update was missed for the following cases:
- Idle optimization is enabled
- Plane is not in current context
- Also don't clear surface updates at end of
commit_plane_for_stream_fast as they are cleared at
the beginning of each flip (only stream updates need
to be cleared in case there is no stream update in
the next flip)
Reviewed-by: Samson Tam <[email protected]>
Acked-by: Alan Liu <[email protected]>
Signed-off-by: Alvin Lee <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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[why]
Allow ABM states to be transferred across display
adapters for smooth display transitions.
[how]
We call DMUB to pause and get ABM states. We
transfer data to other gpu, and deliver data and
ask ABM to un-pause.
Reviewed-by: Harry Vanzylldejong <[email protected]>
Acked-by: Alan Liu <[email protected]>
Signed-off-by: Reza Amini <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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[Why]
Aux write was meant to be ASIC specific, and is
causing compliance failures on newer parts.
[How]
Make workaround specific to single ASIC.
Reviewed-by: Michael Strauss <[email protected]>
Acked-by: Alan Liu <[email protected]>
Signed-off-by: Taimur Hassan <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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[Why & How]
Port of a change that went into DCN314 to keep the PHY enabled
when we have a connected and active DP display.
The PHY can hang if PHY refclk is disabled inadvertently.
Cc: Mario Limonciello <[email protected]>
Cc: Alex Deucher <[email protected]>
Cc: [email protected]
Reviewed-by: Josip Pavic <[email protected]>
Acked-by: Alan Liu <[email protected]>
Signed-off-by: Nicholas Kazlauskas <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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[Why]
In dcn314 DML the destination pipe vtotal was being set
to the crtc adjustment vtotal_min value even in cases
where that value is 0.
[How]
Only set vtotal to the crtc adjustment vtotal_min value
in cases where the value is non-zero.
Cc: Mario Limonciello <[email protected]>
Cc: Alex Deucher <[email protected]>
Cc: [email protected]
Reviewed-by: Nicholas Kazlauskas <[email protected]>
Acked-by: Alan Liu <[email protected]>
Signed-off-by: Daniel Miess <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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[Why]
There certain cases where the timing BW is dependent on the type of link
encoding in use. Thus to calculate the correct BW required for a given
timing, the link encoding should be added as a parameter.
Reviewed-by: Wenjing Liu <[email protected]>
Acked-by: Alan Liu <[email protected]>
Signed-off-by: George Shen <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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[Why]
Current BW calculations do not account for the additional padding added
for uncompressed pixel-to-symbol packing.
This results in X.Y being too low for 128b/132b SST streams in certain
scenarios. If X.Y is too low, end user can observe image corruption.
[How]
Add function to calculate stream overhead to timing BW calculation for
128b/132b SST cases.
Reviewed-by: Wenjing Liu <[email protected]>
Acked-by: Alan Liu <[email protected]>
Signed-off-by: George Shen <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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This commit initializes uninitialized variables.
For some compilers uninitialized variable warnings are treated as Error.
Reviewed-by: Wenjing Liu <[email protected]>
Acked-by: Alan Liu <[email protected]>
Signed-off-by: Meera Patel <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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[Why & How]
To query the bits and print them out for debug purposes.
Reviewed-by: Nicholas Kazlauskas <[email protected]>
Acked-by: Alan Liu <[email protected]>
Signed-off-by: Cruise Hung <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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This version brings along following fixes:
- Setup stream encoder before link enable for TMDS
- Use is_dig_enable function instead of dcn10 hardcode
- Re-add aux intercept disable delay generically for 2+ LTTPRs
- Add polling method to handle MST reply packet
- Remove unused function
- Improve the include of header file
- Add missing static
- Hardcode vco_freq for dcn316
- Reduce stack size
- Skip enabling DMCUB when using emulation
- Check TG is non-null before checking if enabled
- Update scaler recout data for visual confirm
- Skip querying caps when DMCUB emulation is in use
Acked-by: Alan Liu <[email protected]>
Signed-off-by: Aric Cyr <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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[WHY]
All of pipes will be used when the MPC split enable on the dcn
which just has 2 pipes. Then MPO enter will trigger the minimal
transition which need programe dcn from 2 pipes MPC split to 2
pipes MPO. This action will cause lag if happen frequently.
[HOW]
Disable the MPC split for the platform which dcn resource is limited
Cc: Mario Limonciello <[email protected]>
Cc: Alex Deucher <[email protected]>
Cc: [email protected]
Reviewed-by: Alvin Lee <[email protected]>
Acked-by: Alan Liu <[email protected]>
Signed-off-by: Zhikai Zhai <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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[Why]
Updating downspread factor to 0.3% to add additional margin to account
for potential link rate deviations (up to 300ppm as per the DP spec).
Reviewed-by: Wenjing Liu <[email protected]>
Acked-by: Alan Liu <[email protected]>
Signed-off-by: George Shen <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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[Why]
When 2 threads are doing commit_tail parallelly, one thread could
commit new streams to dc state but another thread remove it from dc
right away.
[How]
If we don't have new dm state change from commit_check, then we should
not call dc_commit_streams() in commit_tail. A new function
amdgpu_dm_commit_streams() is introduced to refator dc_commit_stream()
adjacent code and fix this issue.
Reviewed-by: Harry Wentland <[email protected]>
Acked-by: Alan Liu <[email protected]>
Signed-off-by: Alan Liu <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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[Why]
Want to further constrain these refresh rate conditions for SubVP:
- SubVP + SubVP: either both <= 120Hz or both between 120-165Hz
- SubVP + DRR: SubVP <= 120Hz
- SubVP + VBlank: SubVP <= 120Hz
[How]
Add constraints in subvp_subvp_admissable(),
dcn32_subvp_drr_admissable() and dcn32_subvp_vblank_admissable()
Reviewed-by: Alvin Lee <[email protected]>
Acked-by: Alan Liu <[email protected]>
Signed-off-by: Samson Tam <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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[WHY]
We return false by default when link training fail at link loss.
It will cause we get a fail verified link caps directly.
[HOW]
Record the highest verified link caps. Use the recorded value as
the verified link caps if it is not successful in the last attempt
to avoid to use the lowest link setting.
Reviewed-by: Wenjing Liu <[email protected]>
Acked-by: Alan Liu <[email protected]>
Signed-off-by: Zhikai Zhai <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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[Why]
When RCO is enabled for symclk32_le we get failures during
DP2 link traing compliance tests.
[How]
Break out symclk32_le RCO into a separate function that is
called for hpo when link is enabled/disabled.
Reviewed-by: Nicholas Kazlauskas <[email protected]>
Acked-by: Alan Liu <[email protected]>
Signed-off-by: Daniel Miess <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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brightness accordingly
[Why]
Need to save the cached backlight level so that display lights up using
appropriate brightness level instead of the default brightness when
waking up from s0i3.
[How]
Adding a backlight level cache in link structure. Also instead on
calling set_default_brightness_aux, check if cached values exists.
Reviewed-by: Nicholas Kazlauskas <[email protected]>
Reviewed-by: Wenjing Liu <[email protected]>
Acked-by: Alan Liu <[email protected]>
Signed-off-by: Nicholas Susanto <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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[Why & How]
Re-enable all RCO options now that all known issues with
RCO have been addressed
Reviewed-by: Nicholas Kazlauskas <[email protected]>
Acked-by: Alan Liu <[email protected]>
Signed-off-by: Daniel Miess <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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[Description]
Since SubVP high refresh is now enabled, we must
fallback to SW cursor under if we're in a SubVP
high refresh config
Reviewed-by: Samson Tam <[email protected]>
Acked-by: Alan Liu <[email protected]>
Signed-off-by: Alvin Lee <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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[Why]
Workaround to avoid accessing DMCUB state too early if the emulator
is in use - we don't support any of the features the caps are querying
with emulation anyway.
[How]
Guard the query if emulation is in use.
Reviewed-by: Charlene Liu <[email protected]>
Acked-by: Alan Liu <[email protected]>
Signed-off-by: Nicholas Kazlauskas <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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[Why]
Visual confirm color is not as expected for Autoa Color Management
feature test.
[How]
Calculate scaler recout data when visual confirm enabled to update
the visual confirm bar on the display.
Reviewed-by: Aric Cyr <[email protected]>
Acked-by: Alan Liu <[email protected]>
Signed-off-by: Leo Ma <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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[Why & How]
If there is no TG allocation we can dereference a NULL pointer when
checking if the TG is enabled.
Cc: Mario Limonciello <[email protected]>
Cc: Alex Deucher <[email protected]>
Cc: [email protected]
Reviewed-by: Nicholas Kazlauskas <[email protected]>
Acked-by: Alan Liu <[email protected]>
Signed-off-by: Taimur Hassan <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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[Why & How]
Shouldn't be touching path for HW DMCUB when emulating.
Reviewed-by: Nicholas Kazlauskas <[email protected]>
Acked-by: Alan Liu <[email protected]>
Signed-off-by: Taimur Hassan <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Reduce stack size pointed by clang:
amdgpu_dm/amdgpu_dm.c:8655:13: error: stack frame size (1048) exceeds limit (1024) in 'amdgpu_dm_atomic_commit_tail' [-Werror,-Wframe-larger-than]
Reviewed-by: Harry Wentland <[email protected]>
Acked-by: Alan Liu <[email protected]>
Signed-off-by: Rodrigo Siqueira <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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There is no need to calculate the VCO frequency. In our internal branch
we've hard-coded this for a while, so it's well-tested. This also allows
us to remove the now unused code for calculating the VCO frequency.
Reviewed-by: Harry Wentland <[email protected]>
Acked-by: Alan Liu <[email protected]>
Signed-off-by: Alan Liu <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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After enable DRM_AMDGPU_WERROR, clang highlight multiple functions that
need to have `static`, and this commit address those issues and also
improve the indents.
Reviewed-by: Hamza Mahfooz <[email protected]>
Acked-by: Alan Liu <[email protected]>
Signed-off-by: Rodrigo Siqueira <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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The get_engine_type is never used in the code, for this reason, this
commit drops this function.
Reviewed-by: Hamza Mahfooz <[email protected]>
Acked-by: Alan Liu <[email protected]>
Signed-off-by: Rodrigo Siqueira <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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This commit improves the include of some header files to make them align
with other includes.
Reviewed-by: Hamza Mahfooz <[email protected]>
Acked-by: Alan Liu <[email protected]>
Signed-off-by: Rodrigo Siqueira <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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[Why]
Specific TBT4 dock doesn't send out short HPD to notify source
that IRQ event DOWN_REP_MSG_RDY is set. Which violates the spec
and cause source can't send out streams to mst sinks.
[How]
To cover this misbehavior, add an additional polling method to detect
DOWN_REP_MSG_RDY is set. HPD driven handling method is still kept.
Just hook up our handler to drm mgr->cbs->poll_hpd_irq().
Cc: Mario Limonciello <[email protected]>
Cc: Alex Deucher <[email protected]>
Cc: [email protected]
Reviewed-by: Jerry Zuo <[email protected]>
Acked-by: Alan Liu <[email protected]>
Signed-off-by: Wayne Lin <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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[WHY]
Issue not display generic, required for multiple 2+ LTTPR link configurations.
[HOW]
Revert monitor patch change and remove delay for single LTTPR case
Reviewed-by: George Shen <[email protected]>
Acked-by: Alan Liu <[email protected]>
Signed-off-by: Michael Strauss <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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[Why]
This can differ depending on ASIC and we can end up skipping all
transmitter control if we're relying on the wrong bit as a shortcut
for whether link is on/off.
[How]
The ASIC table itself provides the correct DIG check, use that instead
of the dcn10 hardcode.
Reviewed-by: Syed Hassan <[email protected]>
Acked-by: Alan Liu <[email protected]>
Signed-off-by: Nicholas Kazlauskas <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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[Why]
HDMI spec requires TMDS clock to be not more than 340MHz. Stream encoder ensure
this requirement but driver enable stream encoder later than PHY. So PHY will
output full speed TMDS clock first.
[How]
Enable stream encoder first in TMDS case.
Reviewed-by: Nicholas Kazlauskas <[email protected]>
Acked-by: Alan Liu <[email protected]>
Signed-off-by: JinZe Xu <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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This patch:
- creates a new file for doorbell management.
- moves doorbell code from amdgpu_device.c to this file.
V2:
- remove doc from function declaration (Christian)
- remove 'device' from function names to make it consistent (Alex)
- add SPDX license identifier (Luben)
V3:
- change license to MIT license(Christian)
Cc: Alex Deucher <[email protected]>
Cc: Christian Koenig <[email protected]>
Reviewed-by: Christian König <[email protected]>
Signed-off-by: Shashank Sharma <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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[Why & How]
It's useful to be able to enable DPIA trace with dcdebugmask
option, especially to debug DPIA issues involved in transition
of system power states.
This patch adds an option to amdgpu.dcdebugmask to be picked up
by amdgpu DM to enable DPIA trace.
Signed-off-by: Stylon Wang <[email protected]>
Reviewed-by: Aurabindo Pillai <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Allow the initramfs generator to automatically include psp_13_0_6_ta
firmware to initramfs.
Signed-off-by: Candice Li <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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