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2016-02-25drm/tilcdc: remove broken error handlingTomi Valkeinen1-6/+1
Remove broken error handling. The condition for handling the LCDC_SYNC_LOST and LCDC_FIFO_UNDERFLOW could never be satisfied as the LCDC_SYNC_LOST interrupt is not enabled. Also the requirement to have both LCDC_SYNC_LOST and LCDC_FIFO_UNDERFLOW fired at once before handling the error looks weird. Signed-off-by: Tomi Valkeinen <[email protected]> [Added description to the patch] Signed-off-by: Jyri Sarha <[email protected]>
2016-02-25drm/tilcdc: split reset to a separate functionTomi Valkeinen1-7/+14
Split reset to a separate function and use usleep_range(250, 1000) instead of msleep(1) to to keep the reset bit on long enough. Signed-off-by: Tomi Valkeinen <[email protected]> [Added description to the patch, changed mdelay(500) to usleep_range(250, 1000)] Signed-off-by: Jyri Sarha <[email protected]>
2016-02-25drm/tilcdc: disable crtc on unloadTomi Valkeinen1-0/+2
Disable crtc on unload. Call tilcdc_crtc_dpms() with DRM_MODE_DPMS_OFF in the beginning of unload function. Signed-off-by: Tomi Valkeinen <[email protected]> [Added description to the patch] Signed-off-by: Jyri Sarha <[email protected]>
2016-02-25drm/tilcdc: cleanup runtime PM handlingTomi Valkeinen2-9/+11
Cleanup runtime PM handling. Before the patch the usage of pm_runtime calls was inconsistent and hard to follow. After the update the pm_runtime calls are removed from set_scanout() and called around major operations that access the HW. After the patch the DPMS code does not have pm_runtime_forbid/allow calls any more and pm_runtime_irq_safe() is not set anymore. Signed-off-by: Tomi Valkeinen <[email protected]> [Added description to the patch] Signed-off-by: Jyri Sarha <[email protected]>
2016-02-25drm/tilcdc: Allocate register storage based on the actual number registersJyri Sarha2-2/+21
Allocate suspend/resume register storage based on the actual number registers the driver is aware of. The static allocation for register storage had fallen behind badly. Reported-by: Michael Bode <[email protected]> Signed-off-by: Jyri Sarha <[email protected]> Reviewed-by: Tomi Valkeinen <[email protected]>
2016-02-25drm/tilcdc: fix build error when !CONFIG_CPU_FREQGrygorii Strashko1-1/+1
Fix build error when !CONFIG_CPU_FREQ drivers/gpu/drm/tilcdc/tilcdc_drv.c: In function 'tilcdc_load': drivers/gpu/drm/tilcdc/tilcdc_drv.c:327:1: error: label 'fail_put_clk' defined but not used [-Werror=unused-label] fail_put_clk: ^ Signed-off-by: Grygorii Strashko <[email protected]> Signed-off-by: Jyri Sarha <[email protected]> Reviewed-by: Tomi Valkeinen <[email protected]>
2016-02-25drm/tilcdc: Implement dma-buf support for tilcdcJyri Sarha1-1/+12
There is nothing special about tilcdc HW when the video memory is concerned. Just using the standard drm helpers for implementation is enough. Signed-off-by: Jyri Sarha <[email protected]> Reviewed-by: Tomi Valkeinen <[email protected]>
2016-02-25drm/tilcdc: disable the lcd controller/dma engine when suspend invokedDarren Etheridge3-2/+5
The LCD controller must be deactivated and all DMA transactions stopped when the suspend power state is entered otherwise the PRCM causes the L3 bus to get stuck in transition state. This commit forces the lcdc to be shut down and waits for all pending DMA transactions to complete as part of the suspend handler for this driver. Signed-off-by: Darren Etheridge <[email protected]> Tested-by: Dave Gerlach <[email protected]> Signed-off-by: Jyri Sarha <[email protected]> Reviewed-by: Tomi Valkeinen <[email protected]>
2016-02-25drm/tilcdc: make frame_done interrupt active at all timesDarren Etheridge1-2/+4
The frame_done interrupt was only being enabled when the vsync interrupts were being enabled by DRM. However the frame_done is used to determine if the LCD controller has successfully completed the raster_enable, raster_disable commands and the vsync interrupts are not always enabled during these operations. Signed-off-by: Darren Etheridge <[email protected]> Tested-by: Dave Gerlach <[email protected]> Signed-off-by: Jyri Sarha <[email protected]> Reviewed-by: Tomi Valkeinen <[email protected]>
2016-02-25drm/tilcdc: fix kernel panic on suspend when no hdmi monitor connectedDarren Etheridge2-6/+18
On BeagleBone Black if no HDMI monitor is connected and suspend is requested a kernel panic will result: root@am335x-evm:~# echo mem > /sys/power/state [ 65.548710] PM: Syncing filesystems ... done. [ 65.631311] Freezing user space processes ... (elapsed 0.006 seconds) done. [ 65.648619] Freezing remaining freezable tasks ... (elapsed 0.005 seconds) done. [ 65.833500] Unhandled fault: external abort on non-linefetch (0x1028) at 0xfa30e004 [ 65.841692] Internal error: : 1028 [#1] SMP ARM <snip> [ 66.105287] [<c03765f0>] (platform_pm_suspend) from [<c037b6d4>] (dpm_run_callback+0x34/0x70) [ 66.114370] [<c037b6d4>] (dpm_run_callback) from [<c037ba84>] (__device_suspend+0x10c/0x2f4) [ 66.123357] [<c037ba84>] (__device_suspend) from [<c037d004>] (dpm_suspend+0x58/0x218) [ 66.131796] [<c037d004>] (dpm_suspend) from [<c008d948>] (suspend_devices_and_enter+0x9c/0x3c0) [ 66.141055] [<c008d948>] (suspend_devices_and_enter) from [<c008de7c>] (pm_suspend+0x210/0x24c) [ 66.150312] [<c008de7c>] (pm_suspend) from [<c008cabc>] (state_store+0x68/0xb8) [ 66.158103] [<c008cabc>] (state_store) from [<c02e9654>] (kobj_attr_store+0x14/0x20) [ 66.166355] [<c02e9654>] (kobj_attr_store) from [<c0185c70>] (sysfs_kf_write+0x4c/0x50) [ 66.174883] [<c0185c70>] (sysfs_kf_write) from [<c018926c>] (kernfs_fop_write+0xb4/0x150) [ 66.183598] [<c018926c>] (kernfs_fop_write) from [<c0122638>] (vfs_write+0xa8/0x180) [ 66.191846] [<c0122638>] (vfs_write) from [<c01229f8>] (SyS_write+0x40/0x8c) [ 66.199365] [<c01229f8>] (SyS_write) from [<c000e580>] (ret_fast_syscall+0x0/0x48) [ 66.207426] Code: e595c210 e5932000 e59cc000 e08c2002 (e592c000) This is because the lcdc module is not enabled when no monitor is detected to save power. However the suspend handler just blindly tries to save the lcdc state by copying out the pertinent registers. However module is off so no good things happen when you try and access it. This patch only saves off the registers if the module is enabled, and then only restores the registers on resume if they were saved off during suspend. Signed-off-by: Darren Etheridge <[email protected]> Tested-by: Dave Gerlach <[email protected]> Acked-by: Felipe Balbi <[email protected]> Signed-off-by: Jyri Sarha <[email protected]> Reviewed-by: Tomi Valkeinen <[email protected]>
2016-02-25drm/tilcdc: adopt pinctrl supportDave Gerlach1-0/+8
Update tilcdc driver to set the state of the pins to: - "default on resume - "sleep" on suspend By optionally putting the pins into sleep state in the suspend callback we can accomplish two things. - minimize current leakage from pins and thus save power, - prevent the IP from driving pins output in an uncontrolled manner, which may happen if the power domain drops the domain regulator. Signed-off-by: Dave Gerlach <[email protected]> Signed-off-by: Darren Etheridge <[email protected]> Signed-off-by: Jyri Sarha <[email protected]> Reviewed-by: Tomi Valkeinen <[email protected]>
2016-02-25drm/tilcdc: verify fb pitchTomi Valkeinen1-0/+31
LCDC hardware does not support fb pitch that is different (i.e. larger) than the screen size. The driver currently does no checks for this, and the results of too big pitch are are flickering and lower fps. This issue easily happens when using libdrm's modetest tool with non-32 bpp modes. As modetest always allocated 4 bytes per pixel, it implies a bigger pitch for 16 or 24 bpp modes. This patch adds a check to reject pitches the hardware cannot support. Signed-off-by: Tomi Valkeinen <[email protected]> Signed-off-by: Darren Etheridge <[email protected]> Signed-off-by: Jyri Sarha <[email protected]>
2016-02-25drm/tilcdc: rewrite pixel clock calculationDarren Etheridge3-19/+9
Updating the tilcdc DRM driver code to calculate the LCD controller pixel clock more accurately. Based on a suggested implementation by Tomi Valkeinen. The current code does not work correctly and produces wrong results with many requested clock rates. It also oddly uses two different clocks, a display pll clock and a divider clock (child of display pll), instead of just using the clock coming to the lcdc. This patch removes the use of the display pll clock, and rewrites the code to calculate the clock rates. The idea is simply to request a clock rate of pixelclock*2, as the LCD controller has an internal divider which we set to 2. Signed-off-by: Darren Etheridge <[email protected]> [Rewrapped description] Signed-off-by: Jyri Sarha <[email protected]> Reviewed-by: Tomi Valkeinen <[email protected]>
2016-02-25drm/i915: Kill off intel_crtc->atomic.wait_vblank, v6.Maarten Lankhorst3-25/+90
Currently we perform our own wait in post_plane_update, but the atomic core performs another one in wait_for_vblanks. This means that 2 vblanks are done when a fb is changed, which is a bit overkill. Merge them by creating a helper function that takes a crtc mask for the planes to wait on. The broadwell vblank workaround may look gone entirely but this is not the case. pipe_config->wm_changed is set to true when any plane is turned on, which forces a vblank wait. Changes since v1: - Removing the double vblank wait on broadwell moved to its own commit. Changes since v2: - Move out POWER_DOMAIN_MODESET handling to its own commit. Changes since v3: - Do not wait for vblank on legacy cursor updates. (Ville) - Move broadwell vblank workaround comment to page_flip_finished. (Ville) Changes since v4: - Compile fix, legacy_cursor_flip -> *_update. Changes since v5: - Kill brackets. - Add WARN_ON when wait_for_vblanks fails. - Remove extra newlines. - Split the checks whether vblank is needed to a separate function, with comments why a vblank is needed. Signed-off-by: Maarten Lankhorst <[email protected]> Link: http://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Paulo Zanoni <[email protected]>
2016-02-25drm/i915: Unify power domain handling.Maarten Lankhorst1-45/+24
Right now there's separate power domain handling for update_pipe and modesets. Unify this and only grab POWER_DOMAIN_MODESET once. Signed-off-by: Maarten Lankhorst <[email protected]> Link: http://patchwork.freedesktop.org/patch/msgid/1455108583-29227-3-git-send-email-maarten.lankhorst@linux.intel.com Reviewed-by: Paulo Zanoni <[email protected]>
2016-02-25drm/i915: Pass crtc state to modeset_get_crtc_power_domains.Maarten Lankhorst1-12/+21
Use our newly created encoder_mask to iterate over the encoders. This makes it possible to get the crtc power domains from the crtc_state at any time, without any locks or having to look at the legacy state. Signed-off-by: Maarten Lankhorst <[email protected]> Link: http://patchwork.freedesktop.org/patch/msgid/1455108583-29227-2-git-send-email-maarten.lankhorst@linux.intel.com Reviewed-by: Paulo Zanoni <[email protected]>
2016-02-25drm/nouveau/disp/dp: ensure sink is powered up before attempting link trainingBen Skeggs2-0/+16
This can happen under some annoying circumstances, and is a quick fix until more substantial changes can be made. Fixed eDP mode changes on (at least) the Lenovo P50. Signed-off-by: Ben Skeggs <[email protected]> Cc: [email protected]
2016-02-25drm/nouveau: platform: Fix deferred probeThierry Reding2-12/+30
The error cleanup paths aren't quite correct and will crash upon deferred probe. Cc: [email protected] # v4.3+ Reviewed-by: Ben Skeggs <[email protected]> Reviewed-by: Alexandre Courbot <[email protected]> Signed-off-by: Thierry Reding <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
2016-02-25Merge tag 'drm-intel-fixes-2016-02-22' of ↵Dave Airlie13-93/+367
git://anongit.freedesktop.org/drm-intel into drm-fixes This is a bit large, but it really helps Skylake bugs we are seeing on a number of laptops. Most of the commits are quite similar, ensuring the display power doesn't vanish under us during hardware access. Also do note that it's not just Skylake that's affected. * tag 'drm-intel-fixes-2016-02-22' of git://anongit.freedesktop.org/drm-intel: drm/i915/gen9: Verify and enforce dc6 state writes drm/i915/gen9: Check for DC state mismatch drm/i915/skl: Ensure HW is powered during DDB HW state readout drm/i915/lvds: Ensure the HW is powered during HW state readout drm/i915/hdmi: Ensure the HW is powered during HW state readout drm/i915/dsi: Ensure the HW is powered during HW state readout drm/i915/dp: Ensure the HW is powered during HW state readout drm/i915: Ensure the HW is powered when accessing the CRC HW block drm/i915/ddi: Ensure the HW is powered during HW state readout drm/i915/crt: Ensure the HW is powered during HW state readout drm/i915: Ensure the HW is powered during HW access in assert_pipe drm/i915: Ensure the HW is powered when disabling VGA drm/i915/ibx: Ensure the HW is powered during PLL HW readout drm/i915: Ensure the HW is powered during display pipe HW readout drm/i915: Add helper to get a display power ref if it was already enabled
2016-02-24drm/amdgpu: disable direct VM updates when vm_debug is setChristian König1-1/+2
That should make user space bugs more obvious. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
2016-02-24amdgpu: fix NULL pointer dereference at tonga_check_states_equalBradley Pankow1-2/+2
The event_data passed from pem_fini was not cleared upon initialization. This caused NULL checks to pass and cast_const_phw_tonga_power_state to attempt to dereference an invalid pointer. Clear the event_data in pem_init and pem_fini before calling pem_handle_event. Reviewed-by: Rex Zhu <[email protected]> Signed-off-by: Bradley Pankow <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-02-23drm: rcar-du: Add tri-planar memory formats supportLaurent Pinchart2-10/+52
Those formats are supported on Gen3 only. Signed-off-by: Laurent Pinchart <[email protected]>
2016-02-23drm: rcar-du: Add probe deferral debug messagesLaurent Pinchart1-1/+8
Print a message when the HDMI I2C slave encoder can't be found to help debugging probe deferral issues. Signed-off-by: Laurent Pinchart <[email protected]>
2016-02-23drm: rcar-du: lvds: Add R-Car Gen3 supportKoji Matsuoka4-48/+123
The LVDS encoder differs slightly in Gen3 SoCs in its PLL configuration. Add support for the Gen3 LVDS PLL parameters and startup procedure. Signed-off-by: Koji Matsuoka <[email protected]> Signed-off-by: Laurent Pinchart <[email protected]>
2016-02-23drm: rcar-du: lvds: Rename PLLEN bit to PLLONLaurent Pinchart2-2/+2
The bit is named PLLON in the datasheet, rename it. Signed-off-by: Laurent Pinchart <[email protected]>
2016-02-23drm: rcar-du: lvds: Fix PLL frequency-related configurationLaurent Pinchart1-3/+3
The frequency checks don't match the datasheet, fix them. Signed-off-by: Laurent Pinchart <[email protected]>
2016-02-23drm: rcar-du: lvds: Avoid duplication of clock clamp codeLaurent Pinchart4-10/+18
Replace the duplicate code by a single central function. Signed-off-by: Laurent Pinchart <[email protected]>
2016-02-23drm: rcar-du: Add R8A7795 device supportLaurent Pinchart8-39/+140
Document the R8A7795-specific DT bindings and support them in the driver. The HDMI and LVDS outputs are currently not supported. Signed-off-by: Koji Matsuoka <[email protected]> Signed-off-by: Laurent Pinchart <[email protected]>
2016-02-23drm: rcar-du: Output the DISP signal on the ODDF pinLaurent Pinchart2-1/+13
The ODDF signal, output by default on the ODDF pin, isn't used on any board supported in the kernel. As the Gen3 Salvator-X board uses the ODDF pin as a DISP signal, hardcode that configuration in the driver. Use of the ODDF signal will be implemented later through proper DT-based configuration of the DU pins. Signed-off-by: Laurent Pinchart <[email protected]>
2016-02-23drm: rcar-du: Output the DISP signal on the DISP pinLaurent Pinchart1-1/+1
The DE signal is currently configured to be identical to the DISP signal and is used for the same purpose. To make it clearer that the DISP pin outputs the DISP signal, select it explicitly. Signed-off-by: Laurent Pinchart <[email protected]>
2016-02-23drm: rcar-du: Support up to 4 CRTCsKoji Matsuoka3-2/+3
The Gen3 R8A7795 DU has 4 CRTCs, support them all. Signed-off-by: Koji Matsuoka <[email protected]> Signed-off-by: Laurent Pinchart <[email protected]>
2016-02-23drm: rcar-du: Drop LVDS double dependency on OFLaurent Pinchart1-1/+0
LVDS support depends on DRM_RCAR_DU which already depends on OF. Drop the explicit dependency. Signed-off-by: Laurent Pinchart <[email protected]>
2016-02-23drm: rcar-du: Enable compilation on ARM64Koji Matsuoka1-1/+2
The R8A7795 SoC is ARM64-based and include a DU. Enable driver compilation on ARM64. Signed-off-by: Koji Matsuoka <[email protected]> Signed-off-by: Laurent Pinchart <[email protected]>
2016-02-23drm: rcar-du: Fix compile warning on 64-bit platformsKoji Matsuoka1-4/+4
Use %tu instead of %u to print difference between pointers. Signed-off-by: Koji Matsuoka <[email protected]> Signed-off-by: Laurent Pinchart <[email protected]>
2016-02-23drm: rcar-du: Expose the VSP1 compositor through KMS planesLaurent Pinchart10-16/+539
On R-Car Gen3 SoCs the DU lost its ability to access memory directly and needs to work in conjunction with the VSP to do so. This commit handles the VSP internally to hide it from the user. Signed-off-by: Laurent Pinchart <[email protected]>
2016-02-22drm/i915: Add for_each_pipe_masked()Ville Syrjälä2-18/+12
for_each_pipe_masked() can be used to iterate over the pipes included in the user provided pipe mask. Removes a few lines of duplicated code. Signed-off-by: Ville Syrjälä <[email protected]> Link: http://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Imre Deak <[email protected]>
2016-02-22drm/i915: Make sure pipe interrupts are processed before turning off power ↵Ville Syrjälä3-0/+37
well on BDW+ Starting from BDW the DE_PIPE interrupts for pipe B and C belong to the relevant display power well. So we should make sure we've finished processing them before turning off the power well. The pipe interrupts shouldn't really happen at this point anymore since we've already shut down the planes/pipes/whatnot, but being a bit paranoid shouldn't hurt. Signed-off-by: Ville Syrjälä <[email protected]> Link: http://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Imre Deak <[email protected]>
2016-02-22drm/i915: synchronize_irq() before turning off disp2d power well on VLV/CHVVille Syrjälä1-0/+3
After we've told the irq code we don't want to handle display irqs anymore, we must make sure any display irq handling already kicked off has finished before we actually turn off the power well. I wouldn't expect PIPESTAT based interrupts to occur anymore since vblanks/page flips/gmbus/etc should all be quiescent at this point. But at least hotplug interrupts could still occur. Hotplug interrupts may also kick off the workqueue based hotplug processing, but that code should take the required power domain references itself, so there shouldn't be any need to synchronize with the hotplug processing from the power well code. Signed-off-by: Ville Syrjälä <[email protected]> Link: http://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Imre Deak <[email protected]>
2016-02-22drm/i915: Skip PIPESTAT reads from irq handler on VLV/CHV when power well is ↵Ville Syrjälä1-0/+6
down PIPESTAT registers live in the display power well on VLV/CHV, so we shouldn't access them when things are powered down. Let's check whether the display interrupts are on or off before accessing the PIPESTAT registers. Another option would be to read the PIPESTAT registers only when the IIR register indicates that there's a pending pipe event. But that would mean we might miss even more underrun reports than we do now, because the underrun status bit lives in PIPESTAT but doesn't actually generate an interrupt. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93738 Cc: Chris Wilson <[email protected]> Tested-by: Chris Wilson <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Link: http://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Imre Deak <[email protected]>
2016-02-22drm/i915/gen9: Verify and enforce dc6 state writesMika Kuoppala1-2/+39
It has been observed that sometimes disabling the dc6 fails and dc6 state pops back up, brief moment after disabling. This has to be dmc save/restore timing issue or other bug in the way dc states are handled. Try to work around this issue as we don't have firmware fix yet available. Verify that the value we wrote for the dmc sticks, and also enforce it by rewriting it, if it didn't. v2: Zero rereads on rewrite for extra paranoia (Imre) Testcase: kms_flip/basic-flip-vs-dpms References: https://bugs.freedesktop.org/show_bug.cgi?id=93768 Cc: Patrik Jakobsson <[email protected]> Cc: Rodrigo Vivi <[email protected]> Cc: Imre Deak <[email protected]> Signed-off-by: Mika Kuoppala <[email protected]> Reviewed-by: Imre Deak <[email protected]> Signed-off-by: Imre Deak <[email protected]> Link: http://patchwork.freedesktop.org/patch/msgid/[email protected] (cherry picked from commit 779cb5d3ddd72950ec726f86e38f7575c7fbdd4c) Signed-off-by: Jani Nikula <[email protected]>
2016-02-22drm/i915/gen9: Check for DC state mismatchPatrik Jakobsson3-0/+11
The DMC can incorrectly run off and allow DC states on it's own. We don't know the root-cause for this yet but this patch makes it more visible. Reviewed-by: Mika Kuoppala <[email protected]> Signed-off-by: Patrik Jakobsson <[email protected]> Signed-off-by: Imre Deak <[email protected]> Link: http://patchwork.freedesktop.org/patch/msgid/[email protected] (cherry picked from commit 832dba889e27487c3087149f1039acc3feb89003) Signed-off-by: Jani Nikula <[email protected]>
2016-02-22drm/radeon/pm: adjust display configuration after powerstateAlex Deucher1-2/+3
set_power_state defaults to no displays, so we need to update the display configuration after setting up the powerstate on the first call. In most cases this is not an issue since ends up getting called multiple times at any given modeset and the proper order is achieved in the display changed handling at the top of the function. Reviewed-by: Christian König <[email protected]> Acked-by: Jordan Lazare <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2016-02-22drm/amdgpu/pm: adjust display configuration after powerstateAlex Deucher1-2/+3
set_power_state defaults to no displays, so we need to update the display configuration after setting up the powerstate on the first call. In most cases this is not an issue since ends up getting called multiple times at any given modeset and the proper order is achieved in the display changed handling at the top of the function. Reviewed-by: Christian König <[email protected]> Acked-by: Jordan Lazare <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2016-02-22drm/amdgpu/pm: add some checks for PXAlex Deucher1-1/+20
I.e., doesn't make sense to change power states or check the temperature when the asic is powered off. Reviewed-by: Christian König <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-02-22drm/amdgpu: fix locking in force performance levelAlex Deucher1-2/+1
Looks like a copy paste typo when we added powerplay support. Reviewed-by: Christian König <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-02-22drm/amdgpu/gfx8: fix priv reg interrupt enableAlex Deucher1-1/+1
Looks like a copy/paste typo. Reviewed-by: Christian König <[email protected]> Noticed-by: David Panariti <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-02-22drm/i915/skl: Ensure HW is powered during DDB HW state readoutImre Deak1-1/+6
The assumption when adding the intel_display_power_is_enabled() checks was that if it returns success the power can't be turned off afterwards during the HW access, which is guaranteed by modeset locks. This isn't always true, so make sure we hold a dedicated reference for the time of the access. Spotted-by: Mika Kuoppala <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93441 CC: Chris Wilson <[email protected]> Signed-off-by: Imre Deak <[email protected]> Reviewed-by: Mika Kuoppala <[email protected]> Link: http://patchwork.freedesktop.org/patch/msgid/[email protected] (cherry picked from commit 4d800030238878c1a98d1d3a37a3d673eea661ce) Signed-off-by: Jani Nikula <[email protected]>
2016-02-22drm/i915/lvds: Ensure the HW is powered during HW state readoutImre Deak1-3/+11
The assumption when adding the intel_display_power_is_enabled() checks was that if it returns success the power can't be turned off afterwards during the HW access, which is guaranteed by modeset locks. This isn't always true, so make sure we hold a dedicated reference for the time of the access. Signed-off-by: Imre Deak <[email protected]> Reviewed-by: Daniel Vetter <[email protected]> Link: http://patchwork.freedesktop.org/patch/msgid/[email protected] (cherry picked from commit ecb2448218acf23c401434c26be256147833b221) Signed-off-by: Jani Nikula <[email protected]>
2016-02-22drm/i915/hdmi: Ensure the HW is powered during HW state readoutImre Deak1-3/+11
The assumption when adding the intel_display_power_is_enabled() checks was that if it returns success the power can't be turned off afterwards during the HW access, which is guaranteed by modeset locks. This isn't always true, so make sure we hold a dedicated reference for the time of the access. Signed-off-by: Imre Deak <[email protected]> Reviewed-by: Daniel Vetter <[email protected]> Link: http://patchwork.freedesktop.org/patch/msgid/[email protected] (cherry picked from commit 5b0921748c0b1d0362bbfa802dc25a5c23de7e76) Signed-off-by: Jani Nikula <[email protected]>
2016-02-22drm/i915/dsi: Ensure the HW is powered during HW state readoutImre Deak1-3/+10
The assumption when adding the intel_display_power_is_enabled() checks was that if it returns success the power can't be turned off afterwards during the HW access, which is guaranteed by modeset locks. This isn't always true, so make sure we hold a dedicated reference for the time of the access. Signed-off-by: Imre Deak <[email protected]> Reviewed-by: Daniel Vetter <[email protected]> Link: http://patchwork.freedesktop.org/patch/msgid/[email protected] (cherry picked from commit 3f3f42b887fbffc3353e44ef9f32456c19ae4280) Signed-off-by: Jani Nikula <[email protected]>
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