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2019-05-07Merge branch 'etnaviv/next' of https://git.pengutronix.de/git/lst/linux into ↵Dave Airlie4-19/+17
drm-next things are still slow in etnaviv land, so we don't have anything major to destage. Just a couple of non-critical fixes that I want to land in 5.2. Signed-off-by: Dave Airlie <[email protected]> From: Lucas Stach <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-05-06Merge branch 'core-stacktrace-for-linus' of ↵Linus Torvalds3-43/+18
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull stack trace updates from Ingo Molnar: "So Thomas looked at the stacktrace code recently and noticed a few weirdnesses, and we all know how such stories of crummy kernel code meeting German engineering perfection end: a 45-patch series to clean it all up! :-) Here's the changes in Thomas's words: 'Struct stack_trace is a sinkhole for input and output parameters which is largely pointless for most usage sites. In fact if embedded into other data structures it creates indirections and extra storage overhead for no benefit. Looking at all usage sites makes it clear that they just require an interface which is based on a storage array. That array is either on stack, global or embedded into some other data structure. Some of the stack depot usage sites are outright wrong, but fortunately the wrongness just causes more stack being used for nothing and does not have functional impact. Another oddity is the inconsistent termination of the stack trace with ULONG_MAX. It's pointless as the number of entries is what determines the length of the stored trace. In fact quite some call sites remove the ULONG_MAX marker afterwards with or without nasty comments about it. Not all architectures do that and those which do, do it inconsistenly either conditional on nr_entries == 0 or unconditionally. The following series cleans that up by: 1) Removing the ULONG_MAX termination in the architecture code 2) Removing the ULONG_MAX fixups at the call sites 3) Providing plain storage array based interfaces for stacktrace and stackdepot. 4) Cleaning up the mess at the callsites including some related cleanups. 5) Removing the struct stack_trace based interfaces This is not changing the struct stack_trace interfaces at the architecture level, but it removes the exposure to the generic code'" * 'core-stacktrace-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (45 commits) x86/stacktrace: Use common infrastructure stacktrace: Provide common infrastructure lib/stackdepot: Remove obsolete functions stacktrace: Remove obsolete functions livepatch: Simplify stack trace retrieval tracing: Remove the last struct stack_trace usage tracing: Simplify stack trace retrieval tracing: Make ftrace_trace_userstack() static and conditional tracing: Use percpu stack trace buffer more intelligently tracing: Simplify stacktrace retrieval in histograms lockdep: Simplify stack trace handling lockdep: Remove save argument from check_prev_add() lockdep: Remove unused trace argument from print_circular_bug() drm: Simplify stacktrace handling dm persistent data: Simplify stack trace handling dm bufio: Simplify stack trace retrieval btrfs: ref-verify: Simplify stack trace retrieval dma/debug: Simplify stracktrace retrieval fault-inject: Simplify stacktrace retrieval mm/page_owner: Simplify stack trace handling ...
2019-05-06Merge branch 'core-objtool-for-linus' of ↵Linus Torvalds1-2/+4
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull objtool updates from Ingo Molnar: "This is a series from Peter Zijlstra that adds x86 build-time uaccess validation of SMAP to objtool, which will detect and warn about the following uaccess API usage bugs and weirdnesses: - call to %s() with UACCESS enabled - return with UACCESS enabled - return with UACCESS disabled from a UACCESS-safe function - recursive UACCESS enable - redundant UACCESS disable - UACCESS-safe disables UACCESS As it turns out not leaking uaccess permissions outside the intended uaccess functionality is hard when the interfaces are complex and when such bugs are mostly dormant. As a bonus we now also check the DF flag. We had at least one high-profile bug in that area in the early days of Linux, and the checking is fairly simple. The checks performed and warnings emitted are: - call to %s() with DF set - return with DF set - return with modified stack frame - recursive STD - redundant CLD It's all x86-only for now, but later on this can also be used for PAN on ARM and objtool is fairly cross-platform in principle. While all warnings emitted by this new checking facility that got reported to us were fixed, there might be GCC version dependent warnings that were not reported yet - which we'll address, should they trigger. The warnings are non-fatal build warnings" * 'core-objtool-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (27 commits) mm/uaccess: Use 'unsigned long' to placate UBSAN warnings on older GCC versions x86/uaccess: Dont leak the AC flag into __put_user() argument evaluation sched/x86_64: Don't save flags on context switch objtool: Add Direction Flag validation objtool: Add UACCESS validation objtool: Fix sibling call detection objtool: Rewrite alt->skip_orig objtool: Add --backtrace support objtool: Rewrite add_ignores() objtool: Handle function aliases objtool: Set insn->func for alternatives x86/uaccess, kcov: Disable stack protector x86/uaccess, ftrace: Fix ftrace_likely_update() vs. SMAP x86/uaccess, ubsan: Fix UBSAN vs. SMAP x86/uaccess, kasan: Fix KASAN vs SMAP x86/smap: Ditch __stringify() x86/uaccess: Introduce user_access_{save,restore}() x86/uaccess, signal: Fix AC=1 bloat x86/uaccess: Always inline user_access_begin() x86/uaccess, xen: Suppress SMAP warnings ...
2019-05-06drm/amd/display: Use long for signed error code checks in commit planesNicholas Kazlauskas1-1/+2
[Why] The type of 'r' is uint32_t and the return codes for both: - reservation_object_wait_timeout_rcu - amdgpu_bo_reserve ...are signed. While it works for the latter since the check is done on != 0 it doesn't work for the former since we check <= 0. [How] Make 'r' a long in commit planes so we're not doing any unsigned/signed conversion here in the first place. v2: use long instead of int (Christian) Reported-by: Dan Carpenter <[email protected]> Signed-off-by: Nicholas Kazlauskas <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-05-06drm/amdgpu: Add IDH_QUERY_ALIVE event for SR-IOVTrigger Huang2-0/+4
SR-IOV host side will send IDH_QUERY_ALIVE to guest VM to check if this guest VM is still alive (not destroyed). The only thing guest KMD need to do is to send ACK back to host. Signed-off-by: Trigger Huang <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-05-06drm/amdgpu: Fix VM clean check methodTrigger Huang1-3/+33
amdgpu_vm_make_compute is used to turn a GFX VM into a compute VM, the prerequisite is this VM is clean. Let's check if some page tables are already filled , while not check if some mapping is already made. Signed-off-by: Trigger Huang <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-05-06drm/amdgpu: Rearm IRQ in Vega10 SR-IOV if IRQ lostTrigger Huang1-1/+36
In Multi-VFs stress test, sometimes we see IRQ lost when running benchmark, just rearm it. Signed-off-by: Trigger Huang <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-05-06drm/amdgpu: remove ATPX_DGPU_REQ_POWER_FOR_DISPLAYS check when hotplug-inAaron Liu1-2/+1
In amdgpu_atif_handler, when hotplug event received, remove ATPX_DGPU_REQ_POWER_FOR_DISPLAYS check. This bit's check will cause missing system resume. Signed-off-by: Aaron Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2019-05-05drm/i915/gvt: Add in context mmio 0x20D8 to gen9 mmio listColin Xu1-0/+1
Depends on GEN family and I915_PARAM_HAS_CONTEXT_ISOLATION, Mesa driver will decide whether constant buffer 0 address is relative or absolute, and load GPU initial state by lri to context mmio INSTPM (GEN8) or 0x20D8 (>=GEN9). Mesa Commit fa8a764b62 ("i965: Use absolute addressing for constant buffer 0 on Kernel 4.16+.") INSTPM is already added to gen8_engine_mmio_list, but 0x20D8 is missed in gen9_engine_mmio_list. From GVT point of view, different guest could have different context so should switch those mmio accordingly. v2: Update fixes commit ID. Fixes: 178657139307 ("drm/i915/gvt: vGPU context switch") Reviewed-by: Zhenyu Wang <[email protected]> Signed-off-by: Colin Xu <[email protected]> Signed-off-by: Zhenyu Wang <[email protected]> (cherry picked from commit 1e8b15a1988ed3c7429402017d589422628cdf47)
2019-05-03drm/panfrost: Show stored feature registersRobin Murphy1-7/+7
Re-reading the feature registers for the sake of displaying the raw values seems pointless, and in fact showing the copies that we've already read and stored is arguably more useful in terms of giving exposure to any potential bugs in that part of the process. Signed-off-by: Robin Murphy <[email protected]> Signed-off-by: Rob Herring <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/ce5e414adb008baeed9e2ceb9c88f28d5c74ea42.1556195258.git.robin.murphy@arm.com
2019-05-03drm/panfrost: Don't scream about deferred probeRobin Murphy1-2/+4
Probe deferral is far from "fatal". Signed-off-by: Robin Murphy <[email protected]> Signed-off-by: Rob Herring <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/b6ff1f18ac0612f29fd2e3336d6663b7e02db572.1556195258.git.robin.murphy@arm.com
2019-05-03drm/panfrost: Disable PM on probe failureRobin Murphy1-0/+1
Make sure to disable runtime PM again if probe fails after we've enabled it. Otherwise, any subsequent attempt to re-probe starts triggering "Unbalanced pm_runtime_enable!" assertions from the driver core. Signed-off-by: Robin Murphy <[email protected]> Signed-off-by: Rob Herring <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/2487391e7646cabbc52e9b4c20182e39d3f61859.1556195258.git.robin.murphy@arm.com
2019-05-03drm/panfrost: Set DMA masks earlierRobin Murphy2-5/+5
The DMA masks need to be set correctly before any DMA API activity kicks off, and the current point in panfrost_probe() is way too late in that regard. since panfrost_mmu_init() has already set up a live address space and DMA-mapped MMU pagetables. We can't set masks until we've queried the appropriate value from MMU_FEATURES, but as soon as reasonably possible after that should suffice. Signed-off-by: Robin Murphy <[email protected]> Signed-off-by: Rob Herring <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/64361b929a5c61d2ab9580262ecb3d369164cfcb.1556195258.git.robin.murphy@arm.com
2019-05-03drm/panfrost: Add sanity checks to submit IOCTLTomeu Vizoso1-11/+24
So userspace can get feedback on any error conditions, instead of going ahead and things breaking later. Signed-off-by: Tomeu Vizoso <[email protected]> Signed-off-by: Rob Herring <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-05-03Merge panfrost-fixes into drm-misc-next-fixesSean Paul7-2/+18
Merging some panfrost fixes as well as one rockchip fix that _just_ missed feature freeze. Signed-off-by: Sean Paul <[email protected]>
2019-05-03drm/etnaviv: initialize idle mask before querying the HW dbLucas Stach1-4/+2
If there is a match in the HW DB, the function is left early, before inititalizing the idle mask. Fix this by doing the init earlier, as only old GPUs, not present in the HW DB need a different idle mask. Signed-off-by: Lucas Stach <[email protected]> Reviewed-by: Philipp Zabel <[email protected]>
2019-05-03Merge branch 'drm-next-5.2' of git://people.freedesktop.org/~agd5f/linux ↵Dave Airlie46-473/+734
into drm-next - SR-IOV fixes - Raven flickering fix - Misc spelling fixes - Vega20 power fixes - Freesync improvements - DC fixes Signed-off-by: Dave Airlie <[email protected]> From: Alex Deucher <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-05-03Merge tag 'drm-intel-next-fixes-2019-05-02' of ↵Dave Airlie1-4/+3
git://anongit.freedesktop.org/drm/drm-intel into drm-next - Whitelist a register to avoid media driver from hanging Signed-off-by: Dave Airlie <[email protected]> From: Joonas Lahtinen <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-05-03Merge tag 'drm-misc-fixes-2019-05-02' of ↵Dave Airlie2-0/+16
git://anongit.freedesktop.org/drm/drm-misc into drm-fixes - One revert for QXL for a DRI3 breakage Signed-off-by: Dave Airlie <[email protected]> From: Maxime Ripard <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/20190502122529.hguztj3kncaixe3d@flea
2019-05-02drm_syncobj: switch to fdget()Al Viro1-7/+6
Signed-off-by: Al Viro <[email protected]>
2019-05-02amdgpu: switch to fdget()Al Viro1-12/+11
Signed-off-by: Al Viro <[email protected]>
2019-05-02don't open-code file_count()Al Viro1-1/+1
Signed-off-by: Al Viro <[email protected]>
2019-05-02drm: introduce a capability flag for syncobj timeline supportLionel Landwerlin2-5/+8
Unfortunately userspace users of this API cannot be publicly disclosed yet. This commit effectively disables timeline syncobj ioctls for all drivers. Each driver wishing to support this feature will need to expose DRIVER_SYNCOBJ_TIMELINE. v2: Add uAPI capability check (Christian) Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Christian König <[email protected]> (v1) Cc: Dave Airlie <[email protected]> Cc: Daniel Vetter <[email protected]> Cc: Christian König <[email protected]> Cc: Chunming Zhou <[email protected]> Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Signed-off-by: Dave Airlie <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-05-02drm: report consistent errors when checking syncobj capibilityLionel Landwerlin1-2/+2
We've been somewhat inconsistent when adding the new ioctl and returned ENODEV instead of EOPNOTSUPPORTED upon failing the syncobj capibility. Signed-off-by: Lionel Landwerlin <[email protected]> Fixes: ea569910cbab98 ("drm/syncobj: add transition iotcls between binary and timeline v2") Fixes: 01d6c357837918 ("drm/syncobj: add support for timeline point wait v8") Cc: Dave Airlie <[email protected]> Cc: Christian König <[email protected]> Cc: Chunming Zhou <[email protected]> Reviewed-by: Christian König <[email protected]> for the series. Reviewed-by: Chunming Zhou <[email protected]> Signed-off-by: Dave Airlie <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-05-02Merge tag 'drm-intel-next-fixes-2019-04-30' of ↵Dave Airlie1-3/+3
git://anongit.freedesktop.org/drm/drm-intel into drm-next - Fix to Icelake CSC losing blue channel Signed-off-by: Dave Airlie <[email protected]> From: Joonas Lahtinen <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-05-02Merge tag 'drm-misc-next-fixes-2019-05-01' of ↵Dave Airlie1-5/+5
git://anongit.freedesktop.org/drm/drm-misc into drm-next core: restore drm mmap_range size back to 1TB (Philip) sphinx: squash warning (Sean) Cc: Philip Yang <[email protected]> Cc: Sean Paul <[email protected]> Signed-off-by: Dave Airlie <[email protected]> From: Sean Paul <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/20190501190921.GA120430@art_vandelay
2019-05-01drm/nouveau/nouveau: forward error generated while resuming objects treeTobias Klausmann1-1/+11
On a failed resume we may experience unrecoverable errors. Plumb the error code through to actually let the driver fail. On a reverse-prime setup this helps the drm subsystem to at least recover the integrated gpu. This can especially happen with secboot timing out, leaving the hardware in a non-functioning state. Signed-off-by: Tobias Klausmann <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2019-05-01drm/nouveau/fb/ramgk104: fix spelling mistake "sucessfully" -> "successfully"Colin Ian King1-1/+1
There is a spelling mistake in a nvkm_debug message. Fix it. Signed-off-by: Colin Ian King <[email protected]> Reviewed-by: Mukesh Ojha <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2019-05-01drm/nouveau/i2c: Disable i2c bus access after ->fini()Lyude Paul6-2/+65
For a while, we've had the problem of i2c bus access not grabbing a runtime PM ref when it's being used in userspace by i2c-dev, resulting in nouveau spamming the kernel log with errors if anything attempts to access the i2c bus while the GPU is in runtime suspend. An example: [ 130.078386] nouveau 0000:01:00.0: i2c: aux 000d: begin idle timeout ffffffff Since the GPU is in runtime suspend, the MMIO region that the i2c bus is on isn't accessible. On x86, the standard behavior for accessing an unavailable MMIO region is to just return ~0. Except, that turned out to be a lie. While computers with a clean concious will return ~0 in this scenario, some machines will actually completely hang a CPU on certian bad MMIO accesses. This was witnessed with someone's Lenovo ThinkPad P50, where sensors-detect attempting to access the i2c bus while the GPU was suspended would result in a CPU hang: CPU: 5 PID: 12438 Comm: sensors-detect Not tainted 5.0.0-0.rc4.git3.1.fc30.x86_64 #1 Hardware name: LENOVO 20EQS64N17/20EQS64N17, BIOS N1EET74W (1.47 ) 11/21/2017 RIP: 0010:ioread32+0x2b/0x30 Code: 81 ff ff ff 03 00 77 20 48 81 ff 00 00 01 00 76 05 0f b7 d7 ed c3 48 c7 c6 e1 0c 36 96 e8 2d ff ff ff b8 ff ff ff ff c3 8b 07 <c3> 0f 1f 40 00 49 89 f0 48 81 fe ff ff 03 00 76 04 40 88 3e c3 48 RSP: 0018:ffffaac3c5007b48 EFLAGS: 00000292 ORIG_RAX: ffffffffffffff13 RAX: 0000000001111000 RBX: 0000000001111000 RCX: 0000043017a97186 RDX: 0000000000000aaa RSI: 0000000000000005 RDI: ffffaac3c400e4e4 RBP: ffff9e6443902c00 R08: ffffaac3c400e4e4 R09: ffffaac3c5007be7 R10: 0000000000000004 R11: 0000000000000001 R12: ffff9e6445dd0000 R13: 000000000000e4e4 R14: 00000000000003c4 R15: 0000000000000000 FS: 00007f253155a740(0000) GS:ffff9e644f600000(0000) knlGS:0000000000000000 CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 CR2: 00005630d1500358 CR3: 0000000417c44006 CR4: 00000000003606e0 DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000 DR3: 0000000000000000 DR6: 00000000fffe0ff0 DR7: 0000000000000400 Call Trace: g94_i2c_aux_xfer+0x326/0x850 [nouveau] nvkm_i2c_aux_i2c_xfer+0x9e/0x140 [nouveau] __i2c_transfer+0x14b/0x620 i2c_smbus_xfer_emulated+0x159/0x680 ? _raw_spin_unlock_irqrestore+0x1/0x60 ? rt_mutex_slowlock.constprop.0+0x13d/0x1e0 ? __lock_is_held+0x59/0xa0 __i2c_smbus_xfer+0x138/0x5a0 i2c_smbus_xfer+0x4f/0x80 i2cdev_ioctl_smbus+0x162/0x2d0 [i2c_dev] i2cdev_ioctl+0x1db/0x2c0 [i2c_dev] do_vfs_ioctl+0x408/0x750 ksys_ioctl+0x5e/0x90 __x64_sys_ioctl+0x16/0x20 do_syscall_64+0x60/0x1e0 entry_SYSCALL_64_after_hwframe+0x49/0xbe RIP: 0033:0x7f25317f546b Code: 0f 1e fa 48 8b 05 1d da 0c 00 64 c7 00 26 00 00 00 48 c7 c0 ff ff ff ff c3 66 0f 1f 44 00 00 f3 0f 1e fa b8 10 00 00 00 0f 05 <48> 3d 01 f0 ff ff 73 01 c3 48 8b 0d ed d9 0c 00 f7 d8 64 89 01 48 RSP: 002b:00007ffc88caab68 EFLAGS: 00000246 ORIG_RAX: 0000000000000010 RAX: ffffffffffffffda RBX: 00005630d0fe7260 RCX: 00007f25317f546b RDX: 00005630d1598e80 RSI: 0000000000000720 RDI: 0000000000000003 RBP: 00005630d155b968 R08: 0000000000000001 R09: 00005630d15a1da0 R10: 0000000000000070 R11: 0000000000000246 R12: 00005630d1598e80 R13: 00005630d12f3d28 R14: 0000000000000720 R15: 00005630d12f3ce0 watchdog: BUG: soft lockup - CPU#5 stuck for 23s! [sensors-detect:12438] Yikes! While I wanted to try to make it so that accessing an i2c bus on nouveau would wake up the GPU as needed, airlied pointed out that pretty much any usecase for userspace accessing an i2c bus on a GPU (mainly for the DDC brightness control that some displays have) is going to only be useful while there's at least one display enabled on the GPU anyway, and the GPU never sleeps while there's displays running. Since teaching the i2c bus to wake up the GPU on userspace accesses is a good deal more difficult than it might seem, mostly due to the fact that we have to use the i2c bus during runtime resume of the GPU, we instead opt for the easiest solution: don't let userspace access i2c busses on the GPU at all while it's in runtime suspend. Changes since v1: * Also disable i2c busses that run over DP AUX Signed-off-by: Lyude Paul <[email protected]> Cc: [email protected] Signed-off-by: Ben Skeggs <[email protected]>
2019-05-01drm/nouveau: Remove duplicate ACPI_VIDEO_NOTIFY_PROBE definitionBjorn Helgaas1-9/+0
Commit 3a6536c51d5d ("drm/nouveau: Intercept ACPI_VIDEO_NOTIFY_PROBE") added a definition of ACPI_VIDEO_NOTIFY_PROBE because <acpi/video.h> didn't supply one. Later, commit eff4a751cce5 ("ACPI / video: Move ACPI_VIDEO_NOTIFY_* defines to acpi/video.h") moved ACPI_VIDEO_NOTIFY_PROBE and other definitions to <acpi/video.h>, so the copy in nouveau_display.c is now unnecessary. Remove the unnecessary definition from nouveau_display.c. Signed-off-by: Bjorn Helgaas <[email protected]> CC: Hans de Goede <[email protected]> Acked-by: Hans de Goede <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2019-05-01drm/nouveau/mmu: qualify vmm during dtorJon Derrick1-1/+1
If the BAR initialization failed it may leave the vmm structure in an unitialized state, leading to a null-pointer-dereference when the vmm is dereferenced during teardown. Signed-off-by: Jon Derrick <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2019-05-01drm/nouveau/bar/gf100: ensure BAR is mappedJon Derrick1-0/+2
If the BAR is zero size, it indicates it was never successfully mapped. Ensure that the BAR is valid during initialization before attempting to use it. Signed-off-by: Jon Derrick <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2019-05-01drm/nouveau/bar/nv50: ensure BAR is mappedJon Derrick1-3/+9
If the BAR is zero size, it indicates it was never successfully mapped. Ensure that the BAR is valid during initialization before attempting to use it. Signed-off-by: Jon Derrick <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2019-05-01drm/nouveau/bar/nv50: check bar1 vmm return valueJon Derrick1-0/+2
Check bar1's new vmm creation return value for errors. Signed-off-by: Jon Derrick <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2019-04-30Revert "drm/qxl: drop prime import/export callbacks"Gerd Hoffmann2-0/+16
This reverts commit f4c34b1e2a37d5676180901fa6ff188bcb6371f8. Simliar to commit a0cecc23cfcb Revert "drm/virtio: drop prime import/export callbacks". We have to do the same with qxl, for the same reasons (it breaks DRI3). Drop the WARN_ON_ONCE(). Fixes: f4c34b1e2a37d5676 ("drm/qxl: drop prime import/export callbacks") Signed-off-by: Gerd Hoffmann <[email protected]> Link: http://patchwork.freedesktop.org/patch/msgid/[email protected] Acked-by: Daniel Vetter <[email protected]>
2019-04-30drm/i915/icl: Whitelist GEN9_SLICE_COMMON_ECO_CHICKEN1Tvrtko Ursulin1-4/+3
WaEnableStateCacheRedirectToCS context workaround configures the L3 cache to benefit 3d workloads but media has different requirements. Remove the workaround and whitelist the register to allow any userspace configure the behaviour to their liking. v2: * Remove the workaround apart from adding the whitelist. Signed-off-by: Tvrtko Ursulin <[email protected]> Cc: Lionel Landwerlin <[email protected]> Cc: [email protected] Cc: [email protected] Acked-by: Lionel Landwerlin <[email protected]> Acked-by: Anuj Phogat <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Fixes: f63c7b4880aa ("drm/i915/icl: WaEnableStateCacheRedirectToCS") Reviewed-by: Joonas Lahtinen <[email protected]> [tursulin: Anuj reported no GPU hangs or performance regressions with old Mesa on patched kernel.] (cherry picked from commit 0fc2273b9ab7f07cdef448e99525e481535e1ab0) Signed-off-by: Joonas Lahtinen <[email protected]>
2019-04-29drm/amdkfd: Use pci_dev_id() helperHeiner Kallweit1-2/+1
Use new helper pci_dev_id() to simplify the code. Signed-off-by: Heiner Kallweit <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]> Acked-by: Christian König <[email protected]>
2019-04-29drm/amdgpu: power down the Vega20 VCE engine on requestEvan Quan1-1/+12
Power down the engine also along with disabling its DPM functionality. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-04-29drm/amdgpu: expose VCE 4.0 powergate interfaceEvan Quan1-9/+6
SMU will use this interface to power down the VCE engine. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-04-29drm/amd/display: Compensate for pre-DCE12 BTR-VRR hw limitations. (v3)Mario Kleiner1-4/+44
Pre-DCE12 needs special treatment for BTR / low framerate compensation for more stable behaviour: According to comments in the code and some testing on DCE-8 and DCE-11, DCE-11 and earlier only apply VTOTAL_MIN/MAX programming with a lag of one frame, so the special BTR hw programming for intermediate fixed duration frames must be done inside the current frame at flip submission in atomic commit tail, ie. one vblank earlier, and the fixed refresh intermediate frame mode must be also terminated one vblank earlier on pre-DCE12 display engines. To achieve proper termination on < DCE-12 shift the point when the switch-back from fixed vblank duration to variable vblank duration happens from the start of VBLANK (vblank irq, as done on DCE-12+) to back-porch or end of VBLANK (handled by vupdate irq handler). We must leave the switch-back code inside VBLANK irq for DCE12+, as before. Doing this, we get much better behaviour of BTR for up-sweeps, ie. going from short to long frame durations (~high to low fps) and for constant framerate flips, as tested on DCE-8 and DCE-11. Behaviour is still not quite as good as on DCN-1 though. On down-sweeps, going from long to short frame durations (low fps to high fps) < DCE-12 is a little bit improved, although by far not as much as for up-sweeps and constant fps. v2: Fix some wrong locking, as pointed out by Nicholas. v3: Simplify if-condition in vupdate-irq - nit by Nicholas. Signed-off-by: Mario Kleiner <[email protected]> Reviewed-by: Nicholas Kazlauskas <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-04-29drm/amd/display: Fix and simplify apply_below_the_range()Mario Kleiner1-4/+2
The comparison of inserted_frame_duration_in_us against a duration calculated from max_refresh_in_uhz is both wrong in its math and not needed, as the min_duration_in_us value is already cached in in_out_vrr for reuse. No need to recalculate it wrongly at each invocation. Signed-off-by: Mario Kleiner <[email protected]> Reviewed-by: Nicholas Kazlauskas <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-04-29drm/amd/display: Expose DRM_FORMAT_RGB565 on overlay planesNicholas Kazlauskas1-0/+1
RGB565 support isn't restricted to just the primary plane in DC, so also expose support for it on overlays. Signed-off-by: Nicholas Kazlauskas <[email protected]> Acked-by: Alex Deucher <[email protected]> Reviewed-by: David Francis <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-04-29drm/amd/display: Do VRR transition before enable_crc_interruptsNicholas Kazlauskas1-11/+12
[Why] Originally we did the amdgpu_dm_handle_vrr_transition call before interrupts were enabled. After the interrupt toggling logic was moved around for support enabling CRTCs with no primary planes active this was no longer being called in the case where there wasn't a modeset. This fixes failures in igt@kms_vrr@* with error "Timed out: Waiting for vblank event". [How] Shift them back into the loop that always ran before interrupts were enabled. Pull out the logic that updated VRR state into the same loop since there's no reason these need to be split. In the case where we're going from VRR off, no planes to VRR on, some active planes we'll still be covered for having the VRR vupdate handler enabled - vblank will be re-enabled at this point, it will see that VRR is active and set the vupdate interrupt on there. Signed-off-by: Nicholas Kazlauskas <[email protected]> Reviewed-by: David Francis <[email protected]> Acked-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-04-29drm/amd/display: Refactor dp vendor parsing logic to a functionJohn Barberiz2-21/+27
Refactor dp vendor parsing int to a new function, and call it before get_active_converter_info(). Also, add a flag to skip parsing of Display ID 2.0. Some devices fail on readind DID2, but we shouldn't fail EDID read because of it. Add this flag to facilitate the logic. Signed-off-by: John Barberiz <[email protected]> Reviewed-by: Aric Cyr <[email protected]> Acked-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-04-29drm/amd/display: Add hubp_init entry to hubp vtableCharlene Liu4-1/+11
Different HW will need to init HUBP differently. For now, add a vtable entry, and hook a NO-OP for DCN1. In addition, future HW will need to access the HUBPREQ_DEBUG register for hubp_init. Add it to the reg list. Signed-off-by: Charlene Liu <[email protected]> Reviewed-by: Jun Lei <[email protected]> Acked-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-04-29drm/amd/display: remove deprecated pplib interfaceEric Yang3-45/+6
[Why] The new interface now replaces the old interface for all known configurations. Signed-off-by: Eric Yang <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-04-29drm/amd/display: Add power down display on boot flagThomas Lim3-1/+4
[Why] Due to the generic introduction of seamless boot, the display is no longer blanked upon boot. However, this causes corruption on some systems that does not lock the memory in the non-secure boot case, resulting in brief corruption on boot due to garbage being written into the frame buffer. [How] Add a flag, read during DC init, to determine whether display should be blanked on boot. Default to true. Signed-off-by: Thomas Lim <[email protected]> Reviewed-by: Aric Cyr <[email protected]> Acked-by: Anthony Koo <[email protected]> Acked-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-04-29drm/amd/display: Refactor watermark programmingYongqiang Sun4-29/+97
* Replace certain register writes with register sets that overwrites the the entire register, instead of only a field within the register. * Add program_watermarks() entry to hubbub vtable. Hook it up to existing functions that program watermarks. * Add additional watermark registers. Signed-off-by: Yongqiang Sun <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-04-29drm/amd/display: Allow commits with no planes activeNicholas Kazlauskas1-2/+20
[Why] Many userspace applications (and IGT) seem to expect that most drivers can keep a CRTC active and enabled if there are no primary or overlay planes. DC is setup to handle this but only in the case where there are absolutely no planes on the CRTC - no primary, cursor, or overlay. [How] Add a check to reject commits that have cursor planes enabled and nothing else on CRTCs since we can't handle that. The new helper does_crtc_have_active_cursor is used for this. In atomic commit tail, we need to let DC know that there are zero planes enabled when doing stream updates to let it disable and blank pipes as appropriate. Signed-off-by: Nicholas Kazlauskas <[email protected]> Reviewed-by: David Francis <[email protected]> Acked-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-04-29drm/amd/display: Split enabling CRTC interrupts into two passesNicholas Kazlauskas1-32/+63
[Why] When disabling all the pipes for a CRTC the page-flip interrupt also gets disabled on Raven. We can't re-enable the page-flip interrupt unless we give DC at least one active DC plane. We currently enable interrupts after the call to dc_commit_state since there's currently no valid sequence that should disable all the planes or re-enable planes for a CRTC without first going through dc_commit_state. If we were to allow for a CRTC to be enabled with no primary plane this would not be the case - the call to dc_commit_updates_for_stream would enable the planes when going from zero to at least one active plane, but manage_dm_interrupts would have been called too early. This results in a page-flip timeout on any subsequent commits since we think the page-flip are now enabled when they're actually disabled. We need to enable interrupts after the call to dc_commit_updates_for_stream. [How] Split enabling interrupts into two passes. One pass before dc_commit_updates_for_stream and one after it. Shifting all the interrupts to be strictly below the call doesn't currently work even though it should in theory. We end up queuing off the vblank event to be handle by the flip handler before it's actually enabled in some cases, particularly: old_crtc_state->active = false -> new_crtc_state->active = true The framebuffer states haven't changed and we can technically still do a "pageflip" in this case and send back the event. Signed-off-by: Nicholas Kazlauskas <[email protected]> Reviewed-by: David Francis <[email protected]> Acked-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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