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2019-10-09drm/i915/color: move check of gamma_enable to specific func/platformSwati Sharma1-3/+9
Moved common code to check gamma_enable to specific funcs per platform in bit_precision func. icl doesn't support that and chv has separate enable knob for CGM LUT. v2: -Simplified chv_gamma_precision() [Ville] Signed-off-by: Swati Sharma <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-10-09drm/i915/color: fix broken gamma state-checker during bootSwati Sharma1-3/+18
Premature gamma lut prepration and loading which was getting reflected in first modeset causing different colors on screen during boot. Issue: In BIOS, gamma is disabled by default. However, legacy read_luts() was setting crtc_state->base.gamma_lut and gamma_lut was programmed with junk values which led to visual artifacts (different colored screens instead of usual black during boot). Fix: Calling read_luts() only when gamma is enabled which will happen after first modeset. This fix is independent from the revert 1b8588741fdc ("Revert "drm/i915/color: Extract icl_read_luts()"") and should fix different colors on screen in legacy platforms too. v2: -Added gamma_enable checks inside read_luts() [Ville/Jani N] -Corrected gamma enable check for CHV [Ville] v3: -Added check in ilk_read_luts() [Ville] -Simplified gamma enable check for CHV [Ville] Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111809 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111885 Tested-by: Jani Saarinen <[email protected]> Signed-off-by: Swati Sharma <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-10-09drm/edid: Select DMT timing if EDID's display feature not support GTFLee Shawn C1-1/+2
Refer to EDID 1.3 spec, display FEATURE (byte 18h) bit #0 said "If this bit is set to 1, the display supports timings based on the GTF standard using default GTF parameter values". And EDID 1.4 spec shows "If bit 0 is set to 0, then the display is noncontinuous frequency (multi-mode) and is only specified to accept the video timing formats that are listed in BASE EDID and certain EXTENSION Blocks. When display feature did not support CVT or GFT2 and monitor's EDID version greater than or equal to "1.2". DRM driver would select GTF as default for standard timing calculation. It may generated some video timing that can't display properly by external monitor. For example. When driver retrieved "0xD1 0xFC" (FHD, 120Hz) and "0xD1 0xE8" (FHD, 100Hz) from "Standard Timings". GTF formula would generate video timing like below. It already over monitor's spec to cause black screen issue. "1920x1080" 120 368881 1920 2072 2288 2656 1080 1081 1084 1157 0x0 0x6 "1920x1080" 100 301992 1920 2072 2280 2640 1080 1081 1084 1144 0x0 0x6 v2: Just confirm GTF flag and omit the revision check. Cc: Jani Nikula <[email protected]> Cc: Maarten Lankhorst <[email protected]> Cc: Ville Syrjälä <[email protected]> Cc: Adam Jackson <[email protected]> Cc: Cooper Chiou <[email protected]> Signed-off-by: Lee Shawn C <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-10-09drm/i915/selftests: fix null pointer dereference on pointer dataColin Ian King1-1/+1
In the case where data fails to be allocated the error exit path is via label 'out' where data is dereferenced in a for-loop. Fix this by exiting via the label 'out_file' instead to avoid the null pointer dereference. Addresses-Coverity: ("Dereference after null check") Fixes: 50d16d44cce4 ("drm/i915/selftests: Exercise context switching in parallel") Signed-off-by: Colin Ian King <[email protected]> Reviewed-by: Chris Wilson <[email protected]> Signed-off-by: Chris Wilson <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-10-09drm/mediatek: add no_clk into ddp private dataCK Hu1-6/+9
Mutex has no clock in some SoC, so add no_clk in private data and get clock according to no_clk. Signed-off-by: CK Hu <[email protected]>
2019-10-09drm/mediatek: add mutex sof register offset into ddp private dataYongqiang Niu1-3/+10
mutex sof register offset will be private data of ddp Signed-off-by: Yongqiang Niu <[email protected]> Signed-off-by: CK Hu <[email protected]>
2019-10-09drm/mediatek: add mutex sof into ddp private dataYongqiang Niu1-8/+35
mutex sof will be ddp private data Signed-off-by: Yongqiang Niu <[email protected]> Signed-off-by: CK Hu <[email protected]>
2019-10-09drm/mediatek: add mutex mod register offset into ddp private dataYongqiang Niu1-8/+16
mutex mod register offset will be private data of ddp. Signed-off-by: Yongqiang Niu <[email protected]> Signed-off-by: CK Hu <[email protected]>
2019-10-09drm/mediatek: add mutex mod into ddp private dataYongqiang Niu1-11/+30
except mutex mod, mutex mod reg,mutex sof reg, and mutex sof id will be ddp private data Signed-off-by: Yongqiang Niu <[email protected]> Signed-off-by: CK Hu <[email protected]>
2019-10-09drm/mediatek: add ovl0/ovl_2l0 usecaseYongqiang Niu1-3/+34
This patch add ovl0/ovl_2l0 usecase in ovl->ovl_2l0 direct link usecase: 1. the crtc support layer number will 4+2 2. ovl_2l0 background color input select ovl0 when crtc init and disable it when crtc finish 3. config ovl_2l0 layer, if crtc config layer number is bigger than ovl0 support layers(max is 4) Signed-off-by: Yongqiang Niu <[email protected]> Signed-off-by: CK Hu <[email protected]>
2019-10-09drm/mediatek: distinguish ovl and ovl_2l by layer_nrYongqiang Niu1-3/+6
distinguish ovl and ovl_2l by layer_nr when get comp id Signed-off-by: Yongqiang Niu <[email protected]> Signed-off-by: CK Hu <[email protected]>
2019-10-09drm/mediatek: add background color input select function for ovl/ovl_2lYongqiang Niu1-0/+22
This patch add background color input select function for ovl/ovl_2l ovl include 4 DRAM layer and 1 background color layer ovl_2l include 4 DRAM layer and 1 background color layer DRAM layer frame buffer data from render hardware, GPU for example. backgournd color layer is embed in ovl/ovl_2l, we can only set it color, but not support DRAM frame buffer. for ovl0->ovl0_2l direct link usecase, we need set ovl0_2l background color intput select from ovl0 if render send DRAM buffer layer number <=4, all these layer read by ovl. layer0 is at the bottom of all layers. layer3 is at the top of all layers. if render send DRAM buffer layer numbfer >=4 && <=6 ovl0 read layer0~3 ovl0_2l read layer4~5 layer5 is at the top ot all these layers. the decision of how to setting ovl0/ovl0_2l read these layer data is controlled in mtk crtc, which will be another patch Signed-off-by: Yongqiang Niu <[email protected]> Signed-off-by: CK Hu <[email protected]>
2019-10-09drm/mediatek: add function to background color input select for ovl/ovl_2l ↵Yongqiang Niu1-0/+14
direct link This patch add function to background color input select for ovl/ovl_2l direct link for ovl/ovl_2l direct link usecase, we need set background color input select for these hardware. This is preparation patch for ovl/ovl_2l usecase. Signed-off-by: Yongqiang Niu <[email protected]> Signed-off-by: CK Hu <[email protected]>
2019-10-09drm/medaitek: add layer_nr for ovl private dataYongqiang Niu1-1/+6
This patch add layer_nr for ovl private data ovl_2l almost same with with ovl hardware, except the layer number for ovl_2l is 2 and ovl is 4. this patch is a preparation for ovl-2l and ovl share the same driver. Signed-off-by: Yongqiang Niu <[email protected]> Signed-off-by: CK Hu <[email protected]>
2019-10-09drm/mediatek: add gmc_bits for ovl private dataYongqiang Niu1-2/+21
This patch add gmc_bits for ovl private data GMC register was set RDMA ultra and pre-ultra threshold. 10bit GMC register define is different with other SOC, gmc_thrshd_l not used. Signed-off-by: Yongqiang Niu <[email protected]> Signed-off-by: CK Hu <[email protected]>
2019-10-09drm/mediatek: add component OVL_2L1Yongqiang Niu2-0/+2
This patch add component OVL_2L1 Signed-off-by: Yongqiang Niu <[email protected]> Signed-off-by: CK Hu <[email protected]>
2019-10-09drm/mediatek: add component OVL_2L0Yongqiang Niu3-0/+5
This patch add component OVL_2L0 Signed-off-by: Yongqiang Niu <[email protected]> Signed-off-by: CK Hu <[email protected]>
2019-10-09drm/mediatek: add component DITHERYongqiang Niu2-0/+34
This patch add component DITHER Signed-off-by: Yongqiang Niu <[email protected]> Signed-off-by: CK Hu <[email protected]>
2019-10-09drm/komeda: remove redundant assignment to pointer disable_doneColin Ian King1-1/+1
The pointer disable_done is being initialized with a value that is never read and is being re-assigned a little later on. The assignment is redundant and hence can be removed. Addresses-Coverity: ("Unused value") Signed-off-by: Colin Ian King <[email protected]> Reviewed-by: James Qian Wang (Arm Technology China) <[email protected]> Signed-off-by: james qian wang (Arm Technology China) <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-10-09drm/mediatek: add ddp component CCORRYongqiang Niu2-0/+34
This patch add ddp component CCORR Signed-off-by: Yongqiang Niu <[email protected]> Signed-off-by: CK Hu <[email protected]>
2019-10-09drm/i915/selftests: Hold request reference over waitsChris Wilson1-39/+34
Take a reference on the request before submitting it to the HW and then waiting on it for selftest_workarounds. Once submitted, the request may be freed by a background worker, unless we take an extra reference for ourselves. References: https://bugs.freedesktop.org/show_bug.cgi?id=111926 Signed-off-by: Chris Wilson <[email protected]> Reviewed-by: Mika Kuoppala <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-10-08drm/vkms: prime import supportOleg Vasilev3-0/+45
Bring dmabuf sharing through implementing prime_import_sg_table callback. This will help to validate userspace conformance in prime configurations without using any actual hardware (e.g. in the cloud). This enables kms_prime IGT testcase on vkms. V3: - Rodrigo: remove redundant vkms_gem_create_private V2: - Rodrigo: styleguide + return code check Cc: Rodrigo Siqueira <[email protected]> Cc: Haneen Mohammed <[email protected]> Cc: Daniel Vetter <[email protected]> Cc: Simon Ser <[email protected]> Tested-by: Rodrigo Siqueira <[email protected]> Reviewed-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Oleg Vasilev <[email protected]> Signed-off-by: Oleg Vasilev <[email protected]> Signed-off-by: Rodrigo Siqueira <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-10-08drm/drm_vblank: Change EINVAL by the correct errnoRodrigo Siqueira1-3/+3
For historical reasons, the function drm_wait_vblank_ioctl always return -EINVAL if something gets wrong. This scenario limits the flexibility for the userspace to make detailed verification of any problem and take some action. In particular, the validation of “if (!dev->irq_enabled)” in the drm_wait_vblank_ioctl is responsible for checking if the driver support vblank or not. If the driver does not support VBlank, the function drm_wait_vblank_ioctl returns EINVAL, which does not represent the real issue; this patch changes this behavior by return EOPNOTSUPP. Additionally, drm_crtc_get_sequence_ioctl and drm_crtc_queue_sequence_ioctl, also returns EINVAL if vblank is not supported; this patch also changes the return value to EOPNOTSUPP in these functions. Lastly, these functions are invoked by libdrm, which is used by many compositors; because of this, it is important to check if this change breaks any compositor. In this sense, the following projects were examined: * Drm-hwcomposer * Kwin * Sway * Wlroots * Wayland * Weston * Mutter * Xorg (67 different drivers) For each repository the verification happened in three steps: * Update the main branch * Look for any occurrence of "drmCrtcQueueSequence", "drmCrtcGetSequence", and "drmWaitVBlank" with the command git grep -n "STRING". * Look in the git history of the project with the command git log -S<STRING> None of the above projects validate the use of EINVAL when using drmWaitVBlank(), which make safe, at least for these projects, to change the return values. On the other hand, mesa and xserver project uses drmCrtcQueueSequence() and drmCrtcGetSequence(); this change is harmless for both projects. Change since V5 (Pekka Paalanen): - Check if the change also affects Mutter Change since V4 (Daniel): - Also return EOPNOTSUPP in drm_crtc_[get|queue]_sequence_ioctl Change since V3: - Return EINVAL for _DRM_VBLANK_SIGNAL (Daniel) Change since V2: Daniel Vetter and Chris Wilson - Replace ENOTTY by EOPNOTSUPP - Return EINVAL if the parameters are wrong Cc: Keith Packard <[email protected]> Cc: Maarten Lankhorst <[email protected]> Cc: Ville Syrjälä <[email protected]> Cc: Chris Wilson <[email protected]> Cc: Daniel Vetter <[email protected]> Cc: Pekka Paalanen <[email protected]> Signed-off-by: Rodrigo Siqueira <[email protected]> Reviewed-by: Daniel Vetter <[email protected]> Acked-by: Pekka Paalanen <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-10-08drm/i915/gt: Give engine->kernel_context distinct timeline lock classesChris Wilson1-0/+9
Assign a separate lockclass to the perma-pinned timelines of the kernel_context, such that we can use them from within the user timelines should we ever need to inject GPU operations to fixup faults during request construction. Signed-off-by: Chris Wilson <[email protected]> Cc: Tvrtko Ursulin <[email protected]> Cc: Matthew Auld <[email protected]> Reviewed-by: Matthew Auld <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-10-08drm/i915/region: support volatile objectsMatthew Auld9-21/+68
Volatile objects are marked as DONTNEED while pinned, therefore once unpinned the backing store can be discarded. This is limited to kernel internal objects. Signed-off-by: Matthew Auld <[email protected]> Signed-off-by: CQ Tang <[email protected]> Cc: Joonas Lahtinen <[email protected]> Cc: Abdiel Janulgue <[email protected]> Reviewed-by: Chris Wilson <[email protected]> Signed-off-by: Chris Wilson <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-10-08drm/i915/region: support contiguous allocationsMatthew Auld9-39/+239
Some kernel internal objects may need to be allocated as a contiguous block, also thinking ahead the various kernel io_mapping interfaces seem to expect it, although this is purely a limitation in the kernel API...so perhaps something to be improved. Signed-off-by: Matthew Auld <[email protected]> Cc: Joonas Lahtinen <[email protected]> Cc: Abdiel Janulgue <[email protected]> Cc: Michael J Ruhl <[email protected]> Reviewed-by: Chris Wilson <[email protected]> Signed-off-by: Chris Wilson <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-10-08drm/i915: introduce intel_memory_regionMatthew Auld13-0/+729
Support memory regions, as defined by a given (start, end), and allow creating GEM objects which are backed by said region. The immediate goal here is to have something to represent our device memory, but later on we also want to represent every memory domain with a region, so stolen, shmem, and of course device. At some point we are probably going to want use a common struct here, such that we are better aligned with say TTM. Signed-off-by: Matthew Auld <[email protected]> Signed-off-by: Abdiel Janulgue <[email protected]> Signed-off-by: Niranjana Vishwanathapura <[email protected]> Cc: Joonas Lahtinen <[email protected]> Reviewed-by: Chris Wilson <[email protected]> Signed-off-by: Chris Wilson <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-10-08drm_dp_cec: drop use of drmP.hSam Ravnborg1-2/+4
drmP.h is deprecated and will be deleted. Replace use with proper header. Divide header includes in blocks while touching these. Build tested with various archtectures and configs. Signed-off-by: Sam Ravnborg <[email protected]> Fixes: ae85b0df124f6928 ("drm_dp_cec: add connector info support.") Reviewed-by: Lyude Paul <[email protected]> Reviewed-by: Sean Paul <[email protected]> Acked-by: Hans Verkuil <[email protected]> Cc: Dariusz Marcinkiewicz <[email protected]> Cc: Ben Skeggs <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-10-08drm/i915/gt: Flush submission tasklet before waiting/retiringChris Wilson3-14/+34
A common bane of ours is arbitrary delays in ksoftirqd processing our submission tasklet. Give the submission tasklet a kick before we wait to avoid those delays eating into a tight timeout. Signed-off-by: Chris Wilson <[email protected]> Reviewed-by: Stuart Summers <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-10-08drm/i915/perf: drop list of streamsLionel Landwerlin2-21/+1
At some point in time there was the idea that we could have multiple stream from the same piece of HW but that never materialized and given the hard time we already have making everything work with the submission side, there is no real point having this list of 1 element around. Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Chris Wilson <[email protected]> Signed-off-by: Chris Wilson <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-10-08drm/i915/selftests: Assign the intel_runtime_pm pointer for mock_uncoreChris Wilson4-3/+8
Couple up our mock_uncore to know about the fake global device and its runtime powermanagement. Signed-off-by: Chris Wilson <[email protected]> Cc: Matthew Auld <[email protected]> Reviewed-by: Matthew Auld <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-10-08drm/arm/mali-dp: Add display QoS interface configuration for Mali DP500Wen He4-0/+28
Configure the display Quality of service (QoS) levels priority if the optional property node "arm,malidp-aqros-value" is defined in DTS file. QoS signaling using AQROS and AWQOS AXI interface signals, the AQROS is driven from the "RQOS" register, so needed to program the RQOS register to avoid the high resolutions flicker issue on the LS1028A platform. Signed-off-by: Wen He <[email protected]> Signed-off-by: Liviu Dudau <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-10-08drm: damage_helper: Fix race checking plane->state->fbSean Paul1-1/+7
Since the dirtyfb ioctl doesn't give us any hints as to which plane is scanning out the fb it's marking as damaged, we need to loop through planes to find it. Currently we just reach into plane state and check, but that can race with another commit changing the fb out from under us. This patch locks the plane before checking the fb and will release the lock if the plane is not displaying the dirty fb. Fixes: b9fc5e01d1ce ("drm: Add helper to implement legacy dirtyfb") Cc: Rob Clark <[email protected]> Cc: Deepak Rawat <[email protected]> Cc: Daniel Vetter <[email protected]> Cc: Thomas Hellstrom <[email protected]> Cc: Maarten Lankhorst <[email protected]> Cc: Maxime Ripard <[email protected]> Cc: Sean Paul <[email protected]> Cc: David Airlie <[email protected]> Cc: Daniel Vetter <[email protected]> Cc: [email protected] Cc: <[email protected]> # v5.0+ Reported-by: Daniel Vetter <[email protected]> Reviewed-by: Daniel Vetter <[email protected]> Signed-off-by: Sean Paul <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-10-08drm/i915/selftests: Assign the mock_engine->uncore shortcutChris Wilson1-0/+1
Set up the engine->uncore shortcut on mock_engine creation. Signed-off-by: Chris Wilson <[email protected]> Reviewed-by: Tvrtko Ursulin <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-10-08drm/i915/execlists: Assign virtual_engine->uncore from first siblingChris Wilson1-0/+1
Copy across the engine->uncore shortcut to the virtual_engine from its first physical engine, similar to the handling of the engine->gt backpointer. Signed-off-by: Chris Wilson <[email protected]> Reviewed-by: Tvrtko Ursulin <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-10-08drm/i915/tgl: Add DC3CO counter in i915_dmc_infoAnshuman Gupta2-0/+9
Adding DC3CO counter in i915_dmc_info debugfs will be useful for DC3CO validation. DMC firmware uses DMC_DEBUG3 register as DC3CO counter register on TGL, as per B.Specs DMC_DEBUG3 is general purpose register. v1: comment modification for DMC_DBUG3. using GEN >= 12 check instead of IS_TIGERLAKE() to print DMC_DEBUG3 counter value. Cc: Jani Nikula <[email protected]> Cc: Imre Deak <[email protected]> Cc: Animesh Manna <[email protected]> Reviewed-by: Imre Deak <[email protected]> Signed-off-by: Anshuman Gupta <[email protected]> Signed-off-by: Imre Deak <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-10-08drm/i915/tgl: Switch between dc3co and dc5 based on display idlenessAnshuman Gupta4-1/+163
DC3CO is useful power state, when DMC detects PSR2 idle frame while an active video playback, playing 30fps video on 60hz panel is the classic example of this use case. B.Specs:49196 has a restriction to enable DC3CO only for Video Playback. It will be worthy to enable DC3CO after completion of each pageflip and switch back to DC5 when display is idle because driver doesn't differentiate between video playback and a normal pageflip. We will use Frontbuffer flush call tgl_dc3co_flush() to enable DC3CO state only for ORIGIN_FLIP flush call, because DC3CO state has primarily targeted for VPB use case. We are not interested here for frontbuffer invalidates calls because that triggers PSR2 exit, which will explicitly disable DC3CO. DC5 and DC6 saves more power, but can't be entered during video playback because there are not enough idle frames in a row to meet most PSR2 panel deep sleep entry requirement typically 4 frames. As PSR2 existing implementation is using minimum 6 idle frames for deep sleep, it is safer to enable DC5/6 after 6 idle frames (By scheduling a delayed work of 6 idle frames, once DC3CO has been enabled after a pageflip). After manually waiting for 6 idle frames DC5/6 will be enabled and PSR2 deep sleep idle frames will be restored to 6 idle frames, at this point DMC will triggers DC5/6 once PSR2 enters to deep sleep after 6 idle frames. In future when we will enable S/W PSR2 tracking, we can change the PSR2 required deep sleep idle frames to 1 so DMC can trigger the DC5/6 immediately after S/W manual waiting of 6 idle frames get complete. v2: calculated s/w state to switch over dc3co when there is an update. [Imre] Used cancel_delayed_work_sync() in order to avoid any race with already scheduled delayed work. [Imre] v3: Cancel_delayed_work_sync() may blocked the commit work. hence dropping it, dc5_idle_thread() checks the valid wakeref before putting the reference count, which avoids any chances of dropping a zero wakeref. [Imre (IRC)] v4: Used frontbuffer flush mechanism. [Imre] v5: Used psr.pipe to extract frontbuffer busy bits. [Imre] Used cancel_delayed_work_sync() in encoder disable path. [Imre] Used mod_delayed_work() instead of cancelling and scheduling a delayed work. [Imre] Used psr.lock in tgl_dc5_idle_thread() to enable psr2 deep sleep. [Imre] Removed DC5_REQ_IDLE_FRAMES macro. [Imre] v6: Used dc3co_exitline check instead of TGL and dc3co allowed_dc_mask checks, used delayed_work_pending with the psr lock and removed the psr2_deep_slp_disabled flag. [Imre] v7: Code refactoring, moved most of functional code to inte_psr.c [Imre] Using frontbuffer_bits on psr.pipe check instead of busy_frontbuffer_bits. [Imre] Calculating dc3co_exit_delay in intel_psr_enable_locked. [Imre] Cc: Jani Nikula <[email protected]> Cc: Imre Deak <[email protected]> Cc: Animesh Manna <[email protected]> Reviewed-by: Imre Deak <[email protected]> Signed-off-by: Anshuman Gupta <[email protected]> Signed-off-by: Imre Deak <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-10-08drm/i915/tgl: Do modeset to enable and configure DC3CO exitlineAnshuman Gupta3-2/+93
DC3CO enabling B.Specs sequence requires to enable end configure exit scanlines to TRANS_EXITLINE register, programming this register has to be part of modeset sequence as this can't be change when transcoder or port is enabled. When system boots with only eDP panel there may not be real modeset as BIOS has already programmed the necessary registers, therefore it needs to force a modeset to enable and configure DC3CO exitline. v1: Computing dc3co_exitline crtc state from a DP encoder compute config. [Imre] Enabling and disabling DC3CO PSR2 transcoder exitline from encoder pre_enable and post_disable hooks. [Imre] Computing dc3co_exitline instead of has_dc3co_exitline bool. [Imre] v2: Code refactoring for symmetry and to avoid exported function. [Imre] Removing IS_TIGERLAKE check from compute_config, adding PIPE_A restriction and clearing dc3co_exitline state if crtc is not active or it is not PSR2 capable in dc3co exitline compute_config. [Imre] Using GEN >= 12 check in dc3co exitline get_config. [Imre] Cc: Jani Nikula <[email protected]> Cc: Imre Deak <[email protected]> Cc: Animesh Manna <[email protected]> Reviewed-by: Imre Deak <[email protected]> Signed-off-by: Anshuman Gupta <[email protected]> Signed-off-by: Imre Deak <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-10-08drm/i915/tgl: Enable DC3CO state in "DC Off" power wellAnshuman Gupta3-9/+73
Add target_dc_state and used by set_target_dc_state API in order to enable DC3CO state with existing DC states. target_dc_state will enable/disable the desired DC state in DC_STATE_EN reg when "DC Off" power well gets disable/enable. v2: commit log improvement. v3: Used intel_wait_for_register to wait for DC3CO exit. [Imre] Used gen9_set_dc_state() to allow/disallow DC3CO. [Imre] Moved transcoder psr2 exit line enablement from tgl_allow_dc3co() to a appropriate place haswell_crtc_enable(). [Imre] Changed the DC3CO power well enabled call back logic as recommended in review comments. [Imre] v4: Used wait_for_us() instead of intel_wait_for_reg(). [Imre (IRC)] v5: using udelay() instead of waiting for DC3CO exit status. v6: Fixed minor unwanted change. v7: Removed DC3CO powerwell and POWER_DOMAIN_VIDEO. v8: Uniform checks by using only target_dc_state instead of allowed_dc_mask in "DC off" power well callback. [Imre] Adding "DC off" power well id to older platforms. [Imre] Removed psr2_deep_sleep flag from tgl_set_target_dc_state. [Imre] v9: Used switch case for target DC state in gen9_dc_off_power_well_disable(), checking DC3CO state against allowed DC mask, using WARN_ON() in tgl_set_target_dc_state(). [Imre] v10: Code refactoring and using sanitize_target_dc_state(). [Imre] Cc: Jani Nikula <[email protected]> Cc: Imre Deak <[email protected]> Cc: Animesh Manna <[email protected]> Reviewed-by: Imre Deak <[email protected]> Signed-off-by: Anshuman Gupta <[email protected]> Signed-off-by: Imre Deak <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-10-08drm/i915/tgl: Add DC3CO mask to allowed_dc_mask and gen9_dc_maskAnshuman Gupta2-7/+25
Enable dc3co state in enable_dc module param and add dc3co enable mask to allowed_dc_mask and gen9_dc_mask. v1: Adding enable_dc=3,4 options to enable DC3CO with DC5 and DC6 independently. [Animesh] v2: Using a switch statement for cleaner code. [Animesh] Cc: Jani Nikula <[email protected]> Cc: Imre Deak <[email protected]> Cc: Animesh Manna <[email protected]> Reviewed-by: Animesh Manna <[email protected]> Reviewed-by: Imre Deak <[email protected]> Signed-off-by: Anshuman Gupta <[email protected]> Signed-off-by: Imre Deak <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-10-08drm/i915/tgl: Add DC3CO required register and bitsAnshuman Gupta1-0/+8
Adding following definition to i915_reg.h 1. DC_STATE_EN register DC3CO bit fields and masks. DC3CO enable bit will be used by driver to make DC3CO ready for DMC f/w and status bit will be used as DC3CO entry status. 2. Transcoder EXITLINE register and its bit fields and mask. Transcoder EXITLINE enable bit represents PSR2 idle frame reset should be applied at exit line and exitlines mask represent required number of scanlines at which DC3CO exit happens. B.Specs:49196 v1: Use of REG_BIT and using extra space for EXITLINE_ macro definition. [Animesh] v2: Grouping EXITLINE reg bits with EXITLINE(trans) define, no functional change. [Ville] Cc: Jani Nikula <[email protected]> Cc: Imre Deak <[email protected]> Cc: Animesh Manna <[email protected]> Reviewed-by: Animesh Manna <[email protected]> Reviewed-by: Imre Deak <[email protected]> Signed-off-by: Anshuman Gupta <[email protected]> Signed-off-by: Imre Deak <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-10-08drm/i915/perf: Set the exclusive stream under perf->lockChris Wilson1-11/+1
The BKL struct_mutex is no more, the only serialisation we required for setting the exclusive stream is already managed by ce->pin_mutex in gen8_configure_all_contexts(). As such, we can manipulate i915_perf.exclusive_stream underneath our own (already held) perf->lock. Signed-off-by: Chris Wilson <[email protected]> Cc: Umesh Nerlige Ramappa <[email protected]> Cc: Lionel Landwerlin <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-10-08drm/i915/perf: Wean ourselves off dev_privChris Wilson3-428/+422
Use the local uncore accessors for the GT rather than using the [not-so] magic global dev_priv mmio routines. In the process, we also teach the perf stream to use backpointers to the i915_perf rather than digging it out of dev_priv. v2: Rebase onto i915_perf_types.h Signed-off-by: Chris Wilson <[email protected]> Cc: Umesh Nerlige Ramappa <[email protected]> Cc: Lionel Landwerlin <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> #v1 Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-10-08drm/i915: Fix Kconfig indentationKrzysztof Kozlowski2-78/+78
Adjust indentation from spaces to tab (+optional two spaces) as in coding style with command like: $ sed -e 's/^ /\t/' -i */Kconfig Signed-off-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-10-08drm/sun4i: dsi: Fix video start delay computationJagan Teki1-1/+1
The LCD timing definitions between Linux DRM vs Allwinner are different, below diagram shows this clear differences. Active Front Sync Back Region Porch Porch <-----------------------><----------------><--------------><--------------> //////////////////////| ////////////////////// | ////////////////////// |.................. ................ ________________ <----- [hv]display -----> <------------- [hv]sync_start ------------> <--------------------- [hv]sync_end ----------------------> <-------------------------------- [hv]total ------------------------------> <----- lcd_[xy] --------> <- lcd_[hv]spw -> <---------- lcd_[hv]bp ---------> <-------------------------------- lcd_[hv]t ------------------------------> The DSI driver misinterpreted the vbp term from the BSP code to refer only to the backporch, when in fact it was backporch + sync. Thus the driver incorrectly used the vertical front porch plus sync in its calculation of the DRQ set bit value, when it should not have included the sync timing. Including additional sync timings leads to flip_done timed out as: WARNING: CPU: 0 PID: 31 at drivers/gpu/drm/drm_atomic_helper.c:1429 drm_atomic_helper_wait_for_vblanks.part.1+0x298/0x2a0 [CRTC:46:crtc-0] vblank wait timed out Modules linked in: CPU: 0 PID: 31 Comm: kworker/0:1 Not tainted 5.1.0-next-20190514-00029-g09e5b0ed0a58 #18 Hardware name: Allwinner sun8i Family Workqueue: events deferred_probe_work_func [<c010ed54>] (unwind_backtrace) from [<c010b76c>] (show_stack+0x10/0x14) [<c010b76c>] (show_stack) from [<c0688c70>] (dump_stack+0x84/0x98) [<c0688c70>] (dump_stack) from [<c011d9e4>] (__warn+0xfc/0x114) [<c011d9e4>] (__warn) from [<c011da40>] (warn_slowpath_fmt+0x44/0x68) [<c011da40>] (warn_slowpath_fmt) from [<c040cd50>] (drm_atomic_helper_wait_for_vblanks.part.1+0x298/0x2a0) [<c040cd50>] (drm_atomic_helper_wait_for_vblanks.part.1) from [<c040e694>] (drm_atomic_helper_commit_tail_rpm+0x5c/0x6c) [<c040e694>] (drm_atomic_helper_commit_tail_rpm) from [<c040e4dc>] (commit_tail+0x40/0x6c) [<c040e4dc>] (commit_tail) from [<c040e5cc>] (drm_atomic_helper_commit+0xbc/0x128) [<c040e5cc>] (drm_atomic_helper_commit) from [<c0411b64>] (restore_fbdev_mode_atomic+0x1cc/0x1dc) [<c0411b64>] (restore_fbdev_mode_atomic) from [<c04156f8>] (drm_fb_helper_restore_fbdev_mode_unlocked+0x54/0xa0) [<c04156f8>] (drm_fb_helper_restore_fbdev_mode_unlocked) from [<c0415774>] (drm_fb_helper_set_par+0x30/0x54) [<c0415774>] (drm_fb_helper_set_par) from [<c03ad450>] (fbcon_init+0x560/0x5ac) [<c03ad450>] (fbcon_init) from [<c03eb8a0>] (visual_init+0xbc/0x104) [<c03eb8a0>] (visual_init) from [<c03ed1b8>] (do_bind_con_driver+0x1b0/0x390) [<c03ed1b8>] (do_bind_con_driver) from [<c03ed780>] (do_take_over_console+0x13c/0x1c4) [<c03ed780>] (do_take_over_console) from [<c03ad800>] (do_fbcon_takeover+0x74/0xcc) [<c03ad800>] (do_fbcon_takeover) from [<c013c9c8>] (notifier_call_chain+0x44/0x84) [<c013c9c8>] (notifier_call_chain) from [<c013cd20>] (__blocking_notifier_call_chain+0x48/0x60) [<c013cd20>] (__blocking_notifier_call_chain) from [<c013cd50>] (blocking_notifier_call_chain+0x18/0x20) [<c013cd50>] (blocking_notifier_call_chain) from [<c03a6e44>] (register_framebuffer+0x1e0/0x2f8) [<c03a6e44>] (register_framebuffer) from [<c04153c0>] (__drm_fb_helper_initial_config_and_unlock+0x2fc/0x50c) [<c04153c0>] (__drm_fb_helper_initial_config_and_unlock) from [<c04158c8>] (drm_fbdev_client_hotplug+0xe8/0x1b8) [<c04158c8>] (drm_fbdev_client_hotplug) from [<c0415a20>] (drm_fbdev_generic_setup+0x88/0x118) [<c0415a20>] (drm_fbdev_generic_setup) from [<c043f060>] (sun4i_drv_bind+0x128/0x160) [<c043f060>] (sun4i_drv_bind) from [<c044b598>] (try_to_bring_up_master+0x164/0x1a0) [<c044b598>] (try_to_bring_up_master) from [<c044b668>] (__component_add+0x94/0x140) [<c044b668>] (__component_add) from [<c0445e1c>] (sun6i_dsi_probe+0x144/0x234) [<c0445e1c>] (sun6i_dsi_probe) from [<c0452ef4>] (platform_drv_probe+0x48/0x9c) [<c0452ef4>] (platform_drv_probe) from [<c04512cc>] (really_probe+0x1dc/0x2c8) [<c04512cc>] (really_probe) from [<c0451518>] (driver_probe_device+0x60/0x160) [<c0451518>] (driver_probe_device) from [<c044f7a4>] (bus_for_each_drv+0x74/0xb8) [<c044f7a4>] (bus_for_each_drv) from [<c045107c>] (__device_attach+0xd0/0x13c) [<c045107c>] (__device_attach) from [<c0450474>] (bus_probe_device+0x84/0x8c) [<c0450474>] (bus_probe_device) from [<c0450900>] (deferred_probe_work_func+0x64/0x90) [<c0450900>] (deferred_probe_work_func) from [<c0135970>] (process_one_work+0x204/0x420) [<c0135970>] (process_one_work) from [<c013690c>] (worker_thread+0x274/0x5a0) [<c013690c>] (worker_thread) from [<c013b3d8>] (kthread+0x11c/0x14c) [<c013b3d8>] (kthread) from [<c01010e8>] (ret_from_fork+0x14/0x2c) Exception stack(0xde539fb0 to 0xde539ff8) 9fa0: 00000000 00000000 00000000 00000000 9fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 9fe0: 00000000 00000000 00000000 00000000 00000013 00000000 ---[ end trace 495200a78b24980e ]--- random: fast init done [drm:drm_atomic_helper_wait_for_dependencies] *ERROR* [CRTC:46:crtc-0] flip_done timed out [drm:drm_atomic_helper_wait_for_dependencies] *ERROR* [CONNECTOR:48:DSI-1] flip_done timed out [drm:drm_atomic_helper_wait_for_dependencies] *ERROR* [PLANE:30:plane-0] flip_done timed out With the terms(as described in above diagram) fixed, the panel displays correctly without any timeouts. Tested-by: Merlijn Wajer <[email protected]> Signed-off-by: Jagan Teki <[email protected]> Signed-off-by: Icenowy Zheng <[email protected]> Signed-off-by: Maxime Ripard <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-10-08drm/panel: tpo-td043mtea1: Fix SPI aliasLaurent Pinchart1-1/+8
The panel-tpo-td043mtea1 driver incorrectly includes the OF vendor prefix in its SPI alias. Fix it, and move the manual alias to an SPI module device table. Fixes: dc2e1e5b2799 ("drm/panel: Add driver for the Toppoly TD043MTEA1 panel") Reported-by: H. Nikolaus Schaller <[email protected]> Signed-off-by: Laurent Pinchart <[email protected]> Signed-off-by: Tomi Valkeinen <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Acked-by: Sam Ravnborg <[email protected]> Reviewed-by: Sebastian Reichel <[email protected]> Tested-by: H. Nikolaus Schaller <[email protected]>
2019-10-08drm/panel: tpo-td028ttec1: Fix SPI aliasLaurent Pinchart1-2/+1
The panel-tpo-td028ttec1 driver incorrectly includes the OF vendor prefix in its SPI alias. Fix it. Fixes: 415b8dd08711 ("drm/panel: Add driver for the Toppoly TD028TTEC1 panel") Reported-by: H. Nikolaus Schaller <[email protected]> Signed-off-by: Laurent Pinchart <[email protected]> Signed-off-by: Tomi Valkeinen <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Acked-by: Sam Ravnborg <[email protected]> Reviewed-by: Sebastian Reichel <[email protected]> Tested-by: H. Nikolaus Schaller <[email protected]> Tested-by: Andreas Kemnade <[email protected]>
2019-10-08drm/panel: sony-acx565akm: Fix SPI aliasLaurent Pinchart1-1/+8
The panel-sony-acx565akm driver incorrectly includes the OF vendor prefix in its SPI alias. Fix it, and move the manual alias to an SPI module device table. Fixes: 1c8fc3f0c5d2 ("drm/panel: Add driver for the Sony ACX565AKM panel") Reported-by: H. Nikolaus Schaller <[email protected]> Signed-off-by: Laurent Pinchart <[email protected]> Signed-off-by: Tomi Valkeinen <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Acked-by: Sam Ravnborg <[email protected]> Reviewed-by: Sebastian Reichel <[email protected]>
2019-10-08drm/panel: nec-nl8048hl11: Fix SPI aliasLaurent Pinchart1-1/+8
The panel-nec-nl8048hl11 driver incorrectly includes the OF vendor prefix in its SPI alias. Fix it, and move the manual alias to an SPI module device table. Fixes: df439abe6501 ("drm/panel: Add driver for the NEC NL8048HL11 panel") Reported-by: H. Nikolaus Schaller <[email protected]> Signed-off-by: Laurent Pinchart <[email protected]> Signed-off-by: Tomi Valkeinen <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Acked-by: Sam Ravnborg <[email protected]> Reviewed-by: Sebastian Reichel <[email protected]>
2019-10-08drm/panel: lg-lb035q02: Fix SPI aliasLaurent Pinchart1-1/+8
The panel-lg-lb035q02 driver incorrectly includes the OF vendor prefix in its SPI alias. Fix it, and move the manual alias to an SPI module device table. Fixes: f5b0c6542476 ("drm/panel: Add driver for the LG Philips LB035Q02 panel") Reported-by: H. Nikolaus Schaller <[email protected]> Signed-off-by: Laurent Pinchart <[email protected]> Signed-off-by: Tomi Valkeinen <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Acked-by: Sam Ravnborg <[email protected]> Reviewed-by: Sebastian Reichel <[email protected]>
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