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path: root/drivers/gpu
AgeCommit message (Expand)AuthorFilesLines
2022-03-21drm/i915: Split plane data_rate into data_rate+data_rate_yVille Syrjälä5-38/+42
2022-03-21drm/i915: Tweak plane ddb allocation trackingVille Syrjälä6-91/+74
2022-03-21drm/i915/display/adlp: More voltage swing table updatesJosé Roberto de Souza1-4/+18
2022-03-21drm/i915/sdvo: prefer __packed over __attribute__((packed))Jani Nikula1-1/+1
2022-03-18drm/i915: Rename QGV request/response bitsVille Syrjälä2-10/+17
2022-03-18drm/i915: Unconfuses QGV vs. PSF point masksVille Syrjälä2-19/+19
2022-03-18drm/i915: Fix PSF GV point mask when SAGV is not possibleVille Syrjälä1-1/+2
2022-03-18drm/i915: Rename pre-icl SAGV enable/disable functionsVille Syrjälä1-18/+14
2022-03-18drm/i915: Reject excessive SAGV block timeVille Syrjälä1-0/+6
2022-03-18drm/i915: Probe whether SAGV works on pre-iclVille Syrjälä1-0/+14
2022-03-18drm/i915: Rework SAGV block time probingVille Syrjälä1-15/+21
2022-03-18drm/i915: Treat SAGV block time 0 as SAGV disabledVille Syrjälä1-4/+6
2022-03-17drm/i915: include uapi/drm/i915_drm.h directly where neededJani Nikula5-3/+7
2022-03-17drm/i915: move i915_gem_object_needs_bit17_swizzle() to i915_gem_tiling.[ch]Jani Nikula5-10/+13
2022-03-16drm/i915: Reject unsupported TMDS rates on ICL+Ville Syrjälä1-0/+9
2022-03-16drm/i915: Deal with bigjoiner vs. DRRSVille Syrjälä1-1/+15
2022-03-16drm/i915: Do DRRS disable/enable during pre/post_plane_update()Ville Syrjälä4-50/+10
2022-03-16drm/i915: Schedule DRRS work from intel_drrs_enable()Ville Syrjälä1-2/+8
2022-03-16drm/i915: Don't cancel/schedule drrs work if the pipe wasn't affectedVille Syrjälä1-9/+8
2022-03-16drm/i915: Determine DRRS frontbuffer_bits ahead of timeVille Syrjälä2-1/+11
2022-03-16drm/i915: Fix DRRS frontbuffer_bits handlingVille Syrjälä1-2/+4
2022-03-16drm/i915: Add missing tab to DRRS debugfsVille Syrjälä1-1/+1
2022-03-16drm/i915: Put the downclock_mode check back into can_enable_drrs()Ville Syrjälä1-3/+5
2022-03-16drm/i915: Use drm_mode_copy()Ville Syrjälä1-5/+10
2022-03-15drm/i915/display: Do not re-enable PSR after it was marked as not reliableJosé Roberto de Souza1-0/+4
2022-03-15drm/i915/display: Fix HPD short pulse handling for eDPJosé Roberto de Souza3-5/+5
2022-03-15drm/i915: Convert fixed_mode/downclock_mode into a listVille Syrjälä5-46/+50
2022-03-15drm/i915: Implement static DRRSVille Syrjälä2-3/+30
2022-03-15drm/i915: Enable eDP DRRS on ilk/snb port AVille Syrjälä2-7/+4
2022-03-15drm/i915: Move DRRS enable/disable higher upVille Syrjälä2-3/+4
2022-03-15drm/i915: Stash DRRS state under intel_crtcVille Syrjälä8-224/+141
2022-03-15drm/i915: Eliminate the intel_dp dependency from DRRSVille Syrjälä6-93/+50
2022-03-15drm/i915: Introduce intel_drrs_type_str()Ville Syrjälä3-14/+26
2022-03-15drm/i915: Introduce intel_panel_drrs_type()Ville Syrjälä3-7/+15
2022-03-15drm/i915: Introduce intel_panel_preferred_fixed_mode()Ville Syrjälä4-2/+11
2022-03-15drm/i915: Introduce intel_panel_get_modes()Ville Syrjälä6-52/+24
2022-03-15drm/i915: Introduce intel_panel_{fixed,downclock}_mode()Ville Syrjälä8-23/+55
2022-03-15drm/i915: Nuke dev_priv->drrs.typeVille Syrjälä3-8/+5
2022-03-15drm/i915: Simplify intel_panel_info()Ville Syrjälä1-15/+9
2022-03-15drm/i915/lvds: Pass fixed_mode to compute_is_dual_link_lvds()Ville Syrjälä1-3/+4
2022-03-15drm/i915/sdvo: Pass the requesed mode to intel_sdvo_create_preferred_input_ti...Ville Syrjälä1-11/+7
2022-03-15drm/i915/dsi: Pass fixed_mode to *_dsi_add_properties()Ville Syrjälä2-9/+11
2022-03-14drm/i915/display/adlp: Update eDP voltage swing tableJosé Roberto de Souza1-2/+16
2022-03-10drm/i915: Rename PIPECONF refresh select bitsVille Syrjälä2-4/+4
2022-03-10drm/i915: Clean up DRRS refresh rate enumVille Syrjälä3-48/+28
2022-03-10drm/i915: Polish drrs type enumVille Syrjälä4-17/+17
2022-03-10drm/i915: Program MSA timing delay on ilk/snb/ivbVille Syrjälä4-2/+12
2022-03-10drm/i915: Read DRRS MSA timing delay from VBTVille Syrjälä2-2/+6
2022-03-10drm/i915: Pimp DRRS debugsVille Syrjälä1-5/+13
2022-03-10drm/i915: Constify intel_drrs_init() argsVille Syrjälä2-2/+2