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2018-02-19drm/amd/powerplay: export thermal range through temp sysfsAlex Deucher1-2/+9
Populate the hwmon temp range as part of thermal controller setup. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amd/powerplay: new hw manager interface for retrieving device specific ↵Evan Quan1-0/+2
thermal range Added a new callback for asic specific backends to specify the temperature ranges. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amd/powerplay: new cgs interface setting dpm thermal rangeEvan Quan2-0/+20
This will be used by powerplay to update the dpm temp range structure used to interface with hwmon. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amd/powerplay: correct PP_TemperatureRange member type since negative ↵Evan Quan3-6/+6
values are part of the valid range Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amd/powerplay: removed hwmgr_handle_task unused parameter and given a ↵Evan Quan6-20/+18
better name for other parameter Signed-off-by: Evan Quan <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amd/powerplay: remove unused parameter of phm_start_thermal_controller (v2)Evan Quan3-14/+6
Unused. v2: squash in warning fix (Harry) Signed-off-by: Evan Quan <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/radeon: use raw buffer printk specifierDmitry Rozhkov1-2/+2
printk format strings accepting a single subsequent argument are shorter thus easier to read. Instead of having format strings accepting 3 different arguments pointing to first 3 bytes of the same buffer rewrite the format string to accept only one argument - the buffer - with "%3ph" specifier. Signed-off-by: Dmitry Rozhkov <[email protected]> Suggested-by: Andy Shevchenko <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amd/powerplay: drop unneeded newlineJulia Lawall5-8/+12
PP_ASSERT_WITH_CODE prints a newline at the end of the message string, so the message string does not need to include a newline explicitly. Done using Coccinelle. Signed-off-by: Julia Lawall <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-16Merge tag 'topic/hdcp-2018-02-13' of ↵Dave Airlie15-43/+1742
git://anongit.freedesktop.org/drm/drm-misc into drm-next Add HDCP support to i915 drm driver. * tag 'topic/hdcp-2018-02-13' of git://anongit.freedesktop.org/drm/drm-misc: (26 commits) drm/i915: fix misalignment in HDCP register def drm/i915: Reauthenticate HDCP on failure drm/i915: Detect panel's hdcp capability drm/i915: Optimize HDCP key load drm/i915: Retry HDCP bksv read drm/i915: Connector info in HDCP debug msgs drm/i915: Stop encryption for repeater with no sink drm/i915: Handle failure from 2nd stage HDCP auth drm/i915: Downgrade hdcp logs from INFO to DEBUG_KMS drm/i915: Restore HDCP DRM_INFO when with no downstream drm/i915: Check for downstream topology errors drm/i915: Start repeater auth on READY/CP_IRQ drm/i915: II stage HDCP auth for repeater only drm/i915: Extending HDCP for HSW, BDW and BXT+ drm/i915/dp: Fix compilation of intel_dp_hdcp_check_link drm/i915: Only disable HDCP when it's active drm/i915: Don't allow HDCP on PORT E/F drm/i915: Implement HDCP for DisplayPort drm/i915: Implement HDCP for HDMI drm/i915: Add function to output Aksv over GMBUS ...
2018-02-16Merge tag 'drm-misc-next-2018-02-13' of ↵Dave Airlie104-728/+2954
git://anongit.freedesktop.org/drm/drm-misc into drm-next drm-misc-next for 4.17: UAPI Changes: - drm/vc4: Expose performance counters to userspace (Boris) Cross-subsystem Changes: - MAINTAINERS: Linus to maintain panel-arm-versatile in -misc (Linus) Core Changes: - Only use swiotlb when necessary (Chunming) Driver Changes: - drm/panel: Add support for ARM Versatile panels (Linus) - pl111: Improvements around versatile panel support (Linus) ---------------------------------------- Tagged on 2018-02-06: drm-misc-next for 4.17: UAPI Changes: - Validate mode flags + type (Ville) - Deprecate unused mode flags PIXMUX, BCAST (Ville) - Deprecate unused mode types BUILTIN, CRTC_C, CLOCK_C, DEFAULT (Ville) Cross-subsystem Changes: - MAINTAINERS: s/Daniel/Maarten/ for drm-misc (Daniel) Core Changes: - gem: Export gem functions for drivers to use (Samuel) - bridge: Introduce bridge timings in drm_bridge (Linus) - dma-buf: Allow exclusive fence to be bundled in fence array when calling reservation_object_get_fences_rcu (Christian) - dp: Add training pattern 4 and HBR3 support to dp helpers (Manasi) - fourcc: Add alpha bit to formats to avoid driver format LUTs (Maxime) - mode: Various cleanups + add new device-wide .mode_valid hook (Ville) - atomic: Fix state leak when non-blocking commits fail (Leo) NOTE: IIRC, this was cross-picked to -fixes so it might fall out - crc: Allow polling on the data fd (Maarten) Driver Changes: - bridge/vga-dac: Add THS8134* support (Linus) - tinydrm: Various MIPI DBI improvements/cleanups (Noralf) - bridge/dw-mipi-dsi: Cleanups + use create_packet helper (Brian) - drm/sun4i: Add Display Engine frontend support (Maxime) - drm/sun4i: Add zpos support + increase num planes from 2 to 4 (Maxime) - various: Use drm_mode_get_hv_timing() to fill plane clip rectangle (Ville) - stm: Add 8-bit clut support, add dsi phy v1.31 support, +fixes (Phillipe) Cc: Boris Brezillon <[email protected]> Cc: Chunming Zhou <[email protected]> Cc: Samuel Li <[email protected]> Cc: Linus Walleij <[email protected]> Cc: Noralf Trønnes <[email protected]> Cc: Brian Norris <[email protected]> Cc: Maxime Ripard <[email protected]> Cc: Ville Syrjala <[email protected]> Cc: Christian König <[email protected]> Cc: Manasi Navare <[email protected]> Cc: Philippe Cornu <[email protected]> Cc: Leo (Sunpeng) Li <[email protected]> Cc: Daniel Vetter <[email protected]> Cc: Maarten Lankhorst <[email protected]> * tag 'drm-misc-next-2018-02-13' of git://anongit.freedesktop.org/drm/drm-misc: (115 commits) drm/radeon: only enable swiotlb path when need v2 drm/amdgpu: only enable swiotlb alloc when need v2 drm: add func to get max iomem address v2 drm/vc4: Expose performance counters to userspace drm: Print the pid when debug logging an ioctl error. drm/stm: ltdc: remove non-alpha color formats on layer 2 for older hw drm/stm: ltdc: add non-alpha color formats drm/bridge/synopsys: dsi: Add 1.31 version support drm/bridge/synopsys: dsi: Add read feature drm/pl111: Support multiple endpoints on the CLCD drm/pl111: Support variants with broken VBLANK drm/pl111: Support variants with broken clock divider drm/pl111: Handle the Versatile RGB/BGR565 mode drm/pl111: Properly detect the ARM PL110 variants drm/panel: Add support for ARM Versatile panels drm/panel: Device tree bindings for ARM Versatile panels drm/bridge: Rename argument from crtc to bridge drm/crc: Add support for polling on the data fd. drm/sun4i: Use drm_mode_get_hv_timing() to populate plane clip rectangle drm/rcar-du: Use drm_mode_get_hv_timing() to populate plane clip rectangle ...
2018-02-16Merge tag 'drm-intel-next-2018-02-07' of ↵Dave Airlie63-1240/+2880
git://anongit.freedesktop.org/drm/drm-intel into drm-next UAPI Changes: - Userspace whitelist register GEN9_SLICE_COMMON_ECO_CHICKEN1 for GLK (Kenneth) - Non-existent PMU counters are not placed to sysfs (Tvrtko) - Add a note to deprecate I915_SET_COLORKEY_NONE and ignore it (Ville) * Intel DDX never ended using it, and implementation was wonky Core Changes: - Moved away from struct timeval into ktime_t in prep for 2038 (Arnd) * Merged the i915 portion through drm-tip, no core dependencies Driver Changes: - Base support for Icelake and Icelake PCH (Anusha, Rodrigo, Mahesh, Paulo, James, Kelvin) - Add AUX-F port support for Cannonlake (Rodrigo) - New DMC firmware for 1.07 Cannonlake (Anusha) * Go to linux-firmware.git to get it - Reject non-cursor planes nearly (3 px) out of screen on GLK/CNL (Imre) - Y/Yf modifiers restored for SKL+ sprites (Ville) - Compressed framebuffer support for sprites (Ville) - Tune down overly aggressive shrinking (Chris) - Shrink kmem caches when GPU is idle (Chris) - EDID bit-banging fallback for HDMI EDID (Stefan) - Don't boost the GPU when the waited request is already running (Chris) - Avoid GLK/BXT CDCLK frequency locking timeouts (Imre) - Limit DP link rate according to VBT on CNL+ (Jani) - Skip post-reset request emission if the engine is not idle (Chris) - Report any link training error on a fixed eDP panel as errors (Manasi) - DSI panel fixes for Bay Trail (Hans) - Selftest additions and improvements (Chris, Matt) - DMA fence test additions and accompanying fixes (Chris) - Power domain vs. register access fix (Maarten) - Squelch warnings for people with teensy framebuffers (stride < 512) (Maarten) - Increase Render/Media power gating hysteresis for Gen9+ (Chris) - HDMI vswing display workaround for Gen9+ (Ville) - GuC code cleanup and lockdep fixes (Sagar, Michal Wa.) - Continuously run hangcheck for simplicity (Chris) - Execlist debugging improvements (Chris) - GuC debugging improvements (Sujaritha, Michal Wa., Sagar) - Command parser boundary checks (Michal Srb) - Add a workaround for 3DSTATE_SAMPLE_PATTERN on CNL (Rafael) - Fix PMU enabling race condition (Tvrtko) - Usual smaller testing and debugging improvements * tag 'drm-intel-next-2018-02-07' of git://anongit.freedesktop.org/drm/drm-intel: (158 commits) drm/i915: Update DRIVER_DATE to 20180207 drm/i915/pmu: Fix PMU enable vs execlists tasklet race drm/i915/cnl: WaPipeControlBefore3DStateSamplePattern drm/i915/cmdparser: Do not check past the cmd length. drm/i915/cmdparser: Check reg_table_count before derefencing. drm/i915: Deprecate I915_SET_COLORKEY_NONE drm/i915: Skip post-reset request emission if the engine is not idle drm/i915/execlists: Move the reset bits to a more natural home drm/i915/selftests: Use a sacrificial context for hang testing drm/i915/selftests: Flush old resets between engines drm/i915/breadcrumbs: Drop request reference for the signaler thread drm/i915: Remove unbannable context spam from reset drm/i915/execlists: Remove the startup spam drm/i915: Show the GPU state when declaring wedged drm/i915: Always update the no_fbc_reason when disabling drm/i915: Add some newlines to intel_engine_dump() headers drm/i915: Report if an unbannable context is involved in a GPU hang drm/i915: Remove spurious DRM_ERROR for cancelled interrupts drm/i915/execlists: Flush GTIIR on clearing CS interrupts during reset drm/i915: reduce indent in pch detection ...
2018-02-13drm/radeon: only enable swiotlb path when need v2Chunming Zhou3-3/+6
swiotlb expands our card accessing range, but its path always is slower than ttm pool allocation. So add condition to use it. v2: move a bit later Signed-off-by: Chunming Zhou <[email protected]> Reviewed-by: Monk Liu <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-02-13drm/amdgpu: only enable swiotlb alloc when need v2Chunming Zhou6-3/+13
get the max io mapping address of system memory to see if it is over our card accessing range. v2: move checking later Signed-off-by: Chunming Zhou <[email protected]> Reviewed-by: Monk Liu <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-02-13drm: add func to get max iomem address v2Chunming Zhou1-0/+13
it will be used to check if the driver needs swiotlb v2: Don't use inline, instead, move function to drm_memory.c (Michel Daenzer <[email protected]>) Signed-off-by: Chunming Zhou <[email protected]> Reviewed-by: Monk Liu <[email protected]> Reviewed-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-02-11vfs: do bulk POLL* -> EPOLL* replacementLinus Torvalds3-7/+7
This is the mindless scripted replacement of kernel use of POLL* variables as described by Al, done by this script: for V in IN OUT PRI ERR RDNORM RDBAND WRNORM WRBAND HUP RDHUP NVAL MSG; do L=`git grep -l -w POLL$V | grep -v '^t' | grep -v /um/ | grep -v '^sa' | grep -v '/poll.h$'|grep -v '^D'` for f in $L; do sed -i "-es/^\([^\"]*\)\(\<POLL$V\>\)/\\1E\\2/" $f; done done with de-mangling cleanups yet to come. NOTE! On almost all architectures, the EPOLL* constants have the same values as the POLL* constants do. But they keyword here is "almost". For various bad reasons they aren't the same, and epoll() doesn't actually work quite correctly in some cases due to this on Sparc et al. The next patch from Al will sort out the final differences, and we should be all done. Scripted-by: Al Viro <[email protected]> Signed-off-by: Linus Torvalds <[email protected]>
2018-02-10drm/vc4: Expose performance counters to userspaceBoris Brezillon8-72/+398
The V3D engine has various hardware counters which might be interesting to userspace performance analysis tools. Expose new ioctls to create/destroy a performance monitor object and query the counter values of this perfmance monitor. Note that a perfomance monitor is given an ID that is only valid on the file descriptor it has been allocated from. A performance monitor can be attached to a CL submission and the driver will enable HW counters for this request and update the performance monitor values at the end of the job. Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Signed-off-by: Eric Anholt <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-02-10drm: Print the pid when debug logging an ioctl error.Eric Anholt1-1/+1
When we debug print what ioctl we're calling into, we include the pid. If you have multiple processes rendering simulataneously, the error return also needs the pid so you can see which of the ioctl calls was the one to fail. Signed-off-by: Eric Anholt <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Daniel Vetter <[email protected]>
2018-02-08Merge tag 'drm-for-v4.16-part2-fixes' of ↵Linus Torvalds90-1788/+3168
git://people.freedesktop.org/~airlied/linux Pull more drm updates from Dave Airlie: "Ben missed sending his nouveau tree, but he really didn't have much stuff in it: - GP108 acceleration support is enabled by "secure boot" support - some clockgating work on Kepler, and bunch of fixes - the bulk of the diff is regenerated firmware files, the change to them really isn't that large. Otherwise this contains regular Intel and AMDGPU fixes" * tag 'drm-for-v4.16-part2-fixes' of git://people.freedesktop.org/~airlied/linux: (59 commits) drm/i915/bios: add DP max link rate to VBT child device struct drm/i915/cnp: Properly handle VBT ddc pin out of bounds. drm/i915/cnp: Ignore VBT request for know invalid DDC pin. drm/i915/cmdparser: Do not check past the cmd length. drm/i915/cmdparser: Check reg_table_count before derefencing. drm/i915/bxt, glk: Increase PCODE timeouts during CDCLK freq changing drm/i915/gvt: Use KVM r/w to access guest opregion drm/i915/gvt: Fix aperture read/write emulation when enable x-no-mmap=on drm/i915/gvt: only reset execlist state of one engine during VM engine reset drm/i915/gvt: refine intel_vgpu_submission_ops as per engine ops drm/amdgpu: re-enable CGCG on CZ and disable on ST drm/nouveau/clk: fix gcc-7 -Wint-in-bool-context warning drm/nouveau/mmu: Fix trailing semicolon drm/nouveau: Introduce NvPmEnableGating option drm/nouveau: Add support for SLCG for Kepler2 drm/nouveau: Add support for BLCG on Kepler2 drm/nouveau: Add support for BLCG on Kepler1 drm/nouveau: Add support for basic clockgating on Kepler1 drm/nouveau/kms/nv50: fix handling of gamma since atomic conversion drm/nouveau/kms/nv50: use INTERPOLATE_257_UNITY_RANGE LUT on newer chipsets ...
2018-02-08drm/stm: ltdc: remove non-alpha color formats on layer 2 for older hwPhilippe CORNU2-0/+21
Hw older versions support non-alpha color formats derived from native alpha color formats only on the primary layer. For instance, RG16 native format without alpha works fine on 2nd layer but XR24 (derived color format from AR24) does not work on 2nd layer. Signed-off-by: Philippe Cornu <[email protected]> Reviewed-by: Yannick Fertré <[email protected]> Signed-off-by: Benjamin Gaignard <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-02-08drm/stm: ltdc: add non-alpha color formatsPhilippe CORNU1-2/+31
ltdc supports natively some color formats with alpha (like ARGB8888, ARGB1555, ARGB4444...). Related non-alpha formats are supported too (ARGB8888->XRGB8888, ARGB4444->XRGB4444...) by adjusting ltdc blending factors. Note: Wayland/Weston requests by default the non-alpha XRGB8888 color format. Signed-off-by: Philippe Cornu <[email protected]> Reviewed-by: Yannick Fertré <[email protected]> Signed-off-by: Benjamin Gaignard <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-02-08drm/bridge/synopsys: dsi: Add 1.31 version supportPhilippe Cornu1-3/+20
Add support for the Synopsys DesignWare MIPI DSI version 1.31 Two registers need to be updated/added for supporting 1.31: * PHY_TMR_CFG 0x9c (updated) 1.30 [31:24] phy_hs2lp_time [23:16] phy_lp2hs_time [14: 0] max_rd_time 1.31 [25:16] phy_hs2lp_time [ 9: 0] phy_lp2hs_time * PHY_TMR_RD_CFG 0xf4 (new) 1.31 [14: 0] max_rd_time Signed-off-by: Philippe Cornu <[email protected]> Reviewed-by: Andrzej Hajda <[email protected]> Signed-off-by: Andrzej Hajda <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-02-08drm/bridge/synopsys: dsi: Add read featurePhilippe Cornu1-13/+45
This patch adds the DCS/GENERIC DSI read feature. Signed-off-by: Philippe Cornu <[email protected]> Reviewed-by: Andrzej Hajda <[email protected]> Reviewed-by: Brian Norris <[email protected]> Signed-off-by: Andrzej Hajda <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-02-08Merge tag 'drm-intel-next-fixes-2018-02-07' of ↵Dave Airlie17-136/+193
git://anongit.freedesktop.org/drm/drm-intel into drm-next Fix for pcode timeouts on BXT and GLK, cmdparser fixes and fixes for new vbt version on CFL and CNL. GVT contains vGPU reset enhancement, which refines vGPU reset flow and the support of virtual aperture read/write when x-no-mmap=on is set in KVM, which is required by a test case from Redhat and also another fix for virtual OpRegion. * tag 'drm-intel-next-fixes-2018-02-07' of git://anongit.freedesktop.org/drm/drm-intel: drm/i915/bios: add DP max link rate to VBT child device struct drm/i915/cnp: Properly handle VBT ddc pin out of bounds. drm/i915/cnp: Ignore VBT request for know invalid DDC pin. drm/i915/cmdparser: Do not check past the cmd length. drm/i915/cmdparser: Check reg_table_count before derefencing. drm/i915/bxt, glk: Increase PCODE timeouts during CDCLK freq changing drm/i915/gvt: Use KVM r/w to access guest opregion drm/i915/gvt: Fix aperture read/write emulation when enable x-no-mmap=on drm/i915/gvt: only reset execlist state of one engine during VM engine reset drm/i915/gvt: refine intel_vgpu_submission_ops as per engine ops
2018-02-07drm/i915/bios: add DP max link rate to VBT child device structJani Nikula2-3/+7
Update VBT defs to reflect revision 216. While at it, default the expected child device struct size to sizeof the size rather than a hardcoded value. v2: Fix bit order (David) Cc: Rodrigo Vivi <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Reviewed-by: Rodrigo Vivi <[email protected]> Signed-off-by: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] (cherry picked from commit c4fb60b9aba9f939d3f8575df23fd8d5958ec6ed) Signed-off-by: Rodrigo Vivi <[email protected]>
2018-02-08Merge branch 'drm-next-4.16' of git://people.freedesktop.org/~agd5f/linux ↵Dave Airlie7-28/+26
into drm-next A few more misc fixes for 4.16. * 'drm-next-4.16' of git://people.freedesktop.org/~agd5f/linux: drm/amdgpu: re-enable CGCG on CZ and disable on ST drm/amdgpu: disable coarse grain clockgating for ST drm/radeon: adjust tested variable drm/amdgpu: remove WARN_ON when VM isn't found v2 drm/amdgpu: fix locking in vega10_ih_prescreen_iv drm/amdgpu: fix another potential cause of VM faults drm/amdgpu: use queue 0 for kiq ring drm/ttm: Fix 'buf' pointer update in ttm_bo_vm_access_kmap() (v2) drm/ttm: fix missing parameter change for ttm_bo_cleanup_refs
2018-02-07drm/pl111: Support multiple endpoints on the CLCDLinus Walleij1-6/+56
The Versatile PL110 implementations use multiple endpoints: from the PL111 port, the lines are routed through a PLD, and from there forked so the same lines go to a VGA DAC and an external TFT panel connector. This is discrete wireing so there is no way to turn of one output, i.e. this is really two endpoints, not two ports. We model this with multiple endpoints, so we need to loop over the available endpoints, check for panel or bridge on each and accumulate the result before continuing. The code already will give the panel preference over the bridge, if present, so the output will be sent to the panel if both a panel and a bridge is present on two endpoints of the same port. If they all return -EPROBE_DEFER we return -EPROBE_DEFER as well. If just one endpoint is present on the port, the behaviour is the same as before. Reviewed-by: Eric Anholt <[email protected]> Signed-off-by: Linus Walleij <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-02-07drm/pl111: Support variants with broken VBLANKLinus Walleij4-10/+18
The early Integrator CLCD synthesized in the Integrator CP and IM-PD1 FPGAs are broken: their vertical and next base interrupts are not functional. Support these variants by simply disabling the use of the vblank interrupt on these variants. Reviewed-by: Eric Anholt <[email protected]> Signed-off-by: Linus Walleij <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-02-07drm/pl111: Support variants with broken clock dividerLinus Walleij3-0/+12
The early Integrator CLCD synthesized in the Integrator CP and IM-PD1 FPGAs are broken: their clock dividers do not work properly. Support disabling the clock divider and drive the clock directly from the parent under these circumstances. Reviewed-by: Eric Anholt <[email protected]> Signed-off-by: Linus Walleij <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-02-07drm/pl111: Handle the Versatile RGB/BGR565 modeLinus Walleij1-2/+13
The ARM Versatile series can do RGB/BGR565 with an external "PLD" (Programmable Logical Device). However the CLCD does not have control bits for this, so it needs to be set into the ordinary 16BPP mode, then the RGB/BGR565 handling of the pixel data is handled by configuring the PLD through the external register. Reviewed-by: Eric Anholt <[email protected]> Signed-off-by: Linus Walleij <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-02-07drm/pl111: Properly detect the ARM PL110 variantsLinus Walleij3-46/+78
With a bit of refactoring we can contain the variant data for the strange PL110 versions that is feature-incomplete PL110 for the ARM Integrator/CP and somewhere inbetween PL110 and PL111 for the ARM Versatile AB and Versatile PB. We also accomodate for the custom duct-taped RGB565/BGR565 support in the Versatile variant. Reviewed-by: Eric Anholt <[email protected]> Signed-off-by: Linus Walleij <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-02-07drm/panel: Add support for ARM Versatile panelsLinus Walleij3-0/+388
The ARM reference designs "Versatile AB" and "Versatile PB" contain panel connectors with autodetection of the connected panel type. This adds a small driver utilizing the MFD syscon look-up to read the autodetection register and set up the corresponding panel appropriately. In the source file there is a bit of elaboration of the panel types and interfaces on these boards. This was tested with the PL111 DRM driver on the ARM Versatile AB with the IB2 daughterboard. Reviewed-by: Eric Anholt <[email protected]> Signed-off-by: Linus Walleij <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-02-07drm/i915: Update DRIVER_DATE to 20180207Joonas Lahtinen1-2/+2
Signed-off-by: Joonas Lahtinen <[email protected]>
2018-02-06drm/i915/cnp: Properly handle VBT ddc pin out of bounds.Rodrigo Vivi1-2/+3
If the table result is out of bounds on the array map there is something really wrong with VBT pin so we don't return that vbt_pin, but only return 0 instead. This basically reverts commit 'a8e6f3888b05 ("drm/i915/cnp: Ignore VBT request for know invalid DDC pin.")' Also this properly fixes commit 9c3b2689d01f ("drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin.") v2: Do in a way that we don't break other platforms. (Jani) v3: Keep debug message (Jani) v4: Don't mess with 0 mapping was noticed by Jani and addressed with a simple solution suggested by Lucas that makes this even simpler. Fixes: a8e6f3888b05 ("drm/i915/cnp: Ignore VBT request for know invalid DDC pin.") Fixes: 9c3b2689d01f ("drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin.") Cc: Radhakrishna Sripada <[email protected]> Cc: Jani Nikula <[email protected]> Cc: Kai Heng Feng <[email protected]> Cc: Lucas De Marchi <[email protected]> Suggested-by: Lucas De Marchi <[email protected]> Signed-off-by: Rodrigo Vivi <[email protected]> Reviewed-by: Lucas De Marchi <[email protected]> Tested-by: Kai-Heng Feng <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] (cherry picked from commit 3393ce1ed8fc43dbdb83952facaf04e644ca1d54) Signed-off-by: Rodrigo Vivi <[email protected]>
2018-02-06drm/i915/cnp: Ignore VBT request for know invalid DDC pin.Rodrigo Vivi1-3/+8
Let's ignore VBT request if the pin is clearly wrong. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104139 Cc: Kai Heng Feng <[email protected]> Signed-off-by: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Radhakrishna Sripada <[email protected]> (cherry picked from commit a8e6f3888b05c1e7b685800a3371ce050720368f) Signed-off-by: Rodrigo Vivi <[email protected]>
2018-02-06drm/i915/cmdparser: Do not check past the cmd length.Michal Srb1-0/+6
The command MEDIA_VFE_STATE checks bits at offset +2 dwords. However, it is possible to have MEDIA_VFE_STATE command with length = 0 + LENGTH_BIAS = 2. In that case check_cmd will read bits from the following command, or even past the end of the buffer. If the offset ends up outside of the command length, reject the command. Fixes: 351e3db2b363 ("drm/i915: Implement command buffer parsing logic") Signed-off-by: Michal Srb <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Chris Wilson <[email protected]> Signed-off-by: Chris Wilson <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] (cherry picked from commit 3aec7f871c65eb5f76b4125fda432593c834a6f2) Signed-off-by: Rodrigo Vivi <[email protected]>
2018-02-06drm/i915/cmdparser: Check reg_table_count before derefencing.Michal Srb1-2/+2
The find_reg function was assuming that there is always at least one table in reg_tables. It is not always true. In case of VCS or VECS, the reg_tables is NULL and reg_table_count is 0, implying that no register-accessing commands are allowed. However, the command tables include commands such as MI_STORE_REGISTER_MEM. When trying to check such command, the find_reg would dereference NULL pointer. Now it will just return NULL meaning that the register was not found and the command will be rejected. Fixes: 76ff480ec963 ("drm/i915/cmdparser: Use binary search for faster register lookup") Signed-off-by: Michal Srb <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Cc: Chris Wilson <[email protected]> Cc: Matthew Auld <[email protected]> Reviewed-by: Chris Wilson <[email protected]> Signed-off-by: Chris Wilson <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] register lookup") (cherry picked from commit 2f265fad9756a40c09e3f4dcc62d5d7fa73a9fb2) Signed-off-by: Rodrigo Vivi <[email protected]>
2018-02-06drm/i915/bxt, glk: Increase PCODE timeouts during CDCLK freq changingImre Deak3-9/+25
Currently we see sporadic timeouts during CDCLK changing both on BXT and GLK as reported by the Bugzilla: ticket. It's easy to reproduce this by changing the frequency in a tight loop after blanking the display. The upper bound for the completion time is 800us based on my tests, so increase it from the current 500us to 2ms; with that I couldn't trigger the problem either on BXT or GLK. Note that timeouts happened during both the change notification and the voltage level setting PCODE request. (For the latter one BSpec doesn't require us to wait for completion before further HW programming.) This issue is similar to commit 2c7d0602c815 ("drm/i915/gen9: Fix PCODE polling during CDCLK change notification") but there the PCODE request does complete (as shown by the mbox busy flag), only the reply we get from PCODE indicates a failure. So there we keep resending the request until a success reply, here we just have to increase the timeout for the one PCODE request we send. v2: - s/snb_pcode_request/sandybridge_pcode_write_timeout/ (Ville) Cc: Chris Wilson <[email protected]> Cc: Ville Syrjälä <[email protected]> Cc: <[email protected]> # v4.4+ Acked-by: Chris Wilson <[email protected]> (v1) Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103326 Reviewed-by: Ville Syrjälä <[email protected]> Signed-off-by: Imre Deak <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] (cherry picked from commit e76019a81921e87a4d9e7b3d86102bc708a6c227) Signed-off-by: Rodrigo Vivi <[email protected]>
2018-02-06drm/i915/gvt: Use KVM r/w to access guest opregionTina Zhang2-29/+70
For KVMGT, the guest opregion, which is handled by VFIO, is actually a piece of guest memory which won't be accessed by devices. So, its mfn shouldn't be obtained through VFIO interface. This patch uses KVM r/w interface to access the data in guest opregion. Fix the guest opregion accessing issue when host "intel_iommu=on". v3: - Remove mapped flag for KVM/VFIO usage, as it's useless for KVM. v2: - Set the gpa correctly when invoking KVM r/w operations. (Zhenyu) Signed-off-by: Tina Zhang <[email protected]> Cc: Yan Zhao <[email protected]> Cc: Xiong Zhang <[email protected]> Signed-off-by: Zhi Wang <[email protected]> Signed-off-by: Rodrigo Vivi <[email protected]>
2018-02-06drm/i915/gvt: Fix aperture read/write emulation when enable x-no-mmap=onChangbin Du4-59/+35
When add 'x-no-mmap=on' for vfio-pci option, aperture access in guest is emulated. But the vgpu_aperture_rw() function take wrong offset when do memcpy, since vgpu->gm.aperture_va is not the base of entire aperture. This mistake cause GPU command in guest get lost and so the seqno is not updated in engine HWSP. This patch fix this, and it also move the emulation code to kvmgt. Because only vfio need to emulate it. Put aperture rw to MMIO emulation path breaks assumptions in xengt. v2: Remove PAGE_ALIGN for size (zhenyu) Fixes: f090a00df9ec ("drm/i915/gvt: Add emulation for BAR2 (aperture) with normal file RW approach") Signed-off-by: Changbin Du <[email protected]> Signed-off-by: Zhi Wang <[email protected]> Signed-off-by: Rodrigo Vivi <[email protected]>
2018-02-06drm/i915/gvt: only reset execlist state of one engine during VM engine resetWeinan Li3-14/+20
Only reset vgpu execlist state of the exact engine which gets reset request from VM. After read context status from HWSP enabled, KMD will use the saved CSB read pointer but not always read from MMIO. When one engine reset happen, only the read pointer of this engine will be reset, in GVT-g host side also need to align with this policy, otherwise VM may get wrong CSB status after one engine reset compeleted. v2: Split refine and fix patch, code refine(Zhenyu) v3: Move active flag of vgpu scheduler into sched_data(Zhenyu) Cc: Fred Gao <[email protected]> Cc: Zhi Wang <[email protected]> Cc: Zhenyu Wang <[email protected]> Signed-off-by: Weinan Li <[email protected]> Signed-off-by: Zhenyu Wang <[email protected]> Signed-off-by: Zhi Wang <[email protected]> Signed-off-by: Rodrigo Vivi <[email protected]>
2018-02-06drm/i915/gvt: refine intel_vgpu_submission_ops as per engine opsWeinan Li6-18/+20
Using per engine ops will be more flexible, here refine sub-ops(init, clean) as per engine operation align with reset operation. This change also will be used in next fix patch for VM engine reset. Cc: Fred Gao <[email protected]> Cc: Zhi Wang <[email protected]> Signed-off-by: Weinan Li <[email protected]> Signed-off-by: Zhenyu Wang <[email protected]> Signed-off-by: Zhi Wang <[email protected]> Signed-off-by: Rodrigo Vivi <[email protected]>
2018-02-06Merge tag 'pci-v4.16-changes' of ↵Linus Torvalds9-27/+60
git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci Pull PCI updates from Bjorn Helgaas: - skip AER driver error recovery callbacks for correctable errors reported via ACPI APEI, as we already do for errors reported via the native path (Tyler Baicar) - fix DPC shared interrupt handling (Alex Williamson) - print full DPC interrupt number (Keith Busch) - enable DPC only if AER is available (Keith Busch) - simplify DPC code (Bjorn Helgaas) - calculate ASPM L1 substate parameter instead of hardcoding it (Bjorn Helgaas) - enable Latency Tolerance Reporting for ASPM L1 substates (Bjorn Helgaas) - move ASPM internal interfaces out of public header (Bjorn Helgaas) - allow hot-removal of VGA devices (Mika Westerberg) - speed up unplug and shutdown by assuming Thunderbolt controllers don't support Command Completed events (Lukas Wunner) - add AtomicOps support for GPU and Infiniband drivers (Felix Kuehling, Jay Cornwall) - expose "ari_enabled" in sysfs to help NIC naming (Stuart Hayes) - clean up PCI DMA interface usage (Christoph Hellwig) - remove PCI pool API (replaced with DMA pool) (Romain Perier) - deprecate pci_get_bus_and_slot(), which assumed PCI domain 0 (Sinan Kaya) - move DT PCI code from drivers/of/ to drivers/pci/ (Rob Herring) - add PCI-specific wrappers for dev_info(), etc (Frederick Lawler) - remove warnings on sysfs mmap failure (Bjorn Helgaas) - quiet ROM validation messages (Alex Deucher) - remove redundant memory alloc failure messages (Markus Elfring) - fill in types for compile-time VGA and other I/O port resources (Bjorn Helgaas) - make "pci=pcie_scan_all" work for Root Ports as well as Downstream Ports to help AmigaOne X1000 (Bjorn Helgaas) - add SPDX tags to all PCI files (Bjorn Helgaas) - quirk Marvell 9128 DMA aliases (Alex Williamson) - quirk broken INTx disable on Ceton InfiniTV4 (Bjorn Helgaas) - fix CONFIG_PCI=n build by adding dummy pci_irqd_intx_xlate() (Niklas Cassel) - use DMA API to get MSI address for DesignWare IP (Niklas Cassel) - fix endpoint-mode DMA mask configuration (Kishon Vijay Abraham I) - fix ARTPEC-6 incorrect IS_ERR() usage (Wei Yongjun) - add support for ARTPEC-7 SoC (Niklas Cassel) - add endpoint-mode support for ARTPEC (Niklas Cassel) - add Cadence PCIe host and endpoint controller driver (Cyrille Pitchen) - handle multiple INTx status bits being set in dra7xx (Vignesh R) - translate dra7xx hwirq range to fix INTD handling (Vignesh R) - remove deprecated Exynos PHY initialization code (Jaehoon Chung) - fix MSI erratum workaround for HiSilicon Hip06/Hip07 (Dongdong Liu) - fix NULL pointer dereference in iProc BCMA driver (Ray Jui) - fix Keystone interrupt-controller-node lookup (Johan Hovold) - constify qcom driver structures (Julia Lawall) - rework Tegra config space mapping to increase space available for endpoints (Vidya Sagar) - simplify Tegra driver by using bus->sysdata (Manikanta Maddireddy) - remove PCI_REASSIGN_ALL_BUS usage on Tegra (Manikanta Maddireddy) - add support for Global Fabric Manager Server (GFMS) event to Microsemi Switchtec switch driver (Logan Gunthorpe) - add IDs for Switchtec PSX 24xG3 and PSX 48xG3 (Kelvin Cao) * tag 'pci-v4.16-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (140 commits) PCI: cadence: Add EndPoint Controller driver for Cadence PCIe controller dt-bindings: PCI: cadence: Add DT bindings for Cadence PCIe endpoint controller PCI: endpoint: Fix EPF device name to support multi-function devices PCI: endpoint: Add the function number as argument to EPC ops PCI: cadence: Add host driver for Cadence PCIe controller dt-bindings: PCI: cadence: Add DT bindings for Cadence PCIe host controller PCI: Add vendor ID for Cadence PCI: Add generic function to probe PCI host controllers PCI: generic: fix missing call of pci_free_resource_list() PCI: OF: Add generic function to parse and allocate PCI resources PCI: Regroup all PCI related entries into drivers/pci/Makefile PCI/DPC: Reformat DPC register definitions PCI/DPC: Add and use DPC Status register field definitions PCI/DPC: Squash dpc_rp_pio_get_info() into dpc_process_rp_pio_error() PCI/DPC: Remove unnecessary RP PIO register structs PCI/DPC: Push dpc->rp_pio_status assignment into dpc_rp_pio_get_info() PCI/DPC: Squash dpc_rp_pio_print_error() into dpc_rp_pio_get_info() PCI/DPC: Make RP PIO log size check more generic PCI/DPC: Rename local "status" to "dpc_status" PCI/DPC: Squash dpc_rp_pio_print_tlp_header() into dpc_rp_pio_print_error() ...
2018-02-06drm/i915/pmu: Fix PMU enable vs execlists tasklet raceTvrtko Ursulin2-78/+34
Commit 99e48bf98dd0 ("drm/i915: Lock out execlist tasklet while peeking inside for busy-stats") added a tasklet_disable call in busy stats enabling, but we failed to understand that the PMU enable callback runs as an hard IRQ (IPI). Consequence of this is that the PMU enable callback can interrupt the execlists tasklet, and will then deadlock when it calls intel_engine_stats_enable->tasklet_disable. To fix this, I realized it is possible to move the engine stats enablement and disablement to PMU event init and destroy hooks. This allows for much simpler implementation since those hooks run in normal context (can sleep). v2: Extract engine_event_destroy. (Chris Wilson) Signed-off-by: Tvrtko Ursulin <[email protected]> Fixes: 99e48bf98dd0 ("drm/i915: Lock out execlist tasklet while peeking inside for busy-stats") Testcase: igt/perf_pmu/enable-race-* Cc: Chris Wilson <[email protected]> Cc: Tvrtko Ursulin <[email protected]> Cc: Jani Nikula <[email protected]> Cc: Joonas Lahtinen <[email protected]> Cc: Rodrigo Vivi <[email protected]> Cc: [email protected] Reviewed-by: Chris Wilson <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-02-06drm/i915/cnl: WaPipeControlBefore3DStateSamplePatternRafael Antognolli1-1/+37
This workaround should prevent a bug that can be hit on a context restore. To avoid the issue, we must emit a PIPE_CONTROL with CS stall (0x7a000004 0x00100000 0x00000000 0x00000000) followed by 12DW's of NOOP(0x0) in the indirect context batch buffer, to ensure the engine is idle prior to programming 3DSTATE_SAMPLE_PATTERN. It's also not clear whether we should add those extra dwords because of the workaround itself, or if that's just padding for the WA BB (and next commands could come right after the PIPE_CONTROL). We keep them for now. References: HSD#1939868 v2: More descriptive changelog and comments. v3: Explain that PIPE_CONTROL is actually 6 dwords, and that we advance 10 more dwords because of that. Signed-off-by: Rafael Antognolli <[email protected]> Cc: Chris Wilson <[email protected]> Acked-by: Chris Wilson <[email protected]> Signed-off-by: Chris Wilson <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-02-06drm/amdgpu: re-enable CGCG on CZ and disable on STShirish S1-1/+1
The CGCG feature on Stoney is causing GFX related issues such as freezes and blank outs. Signed-off-by: Shirish S <[email protected]> Reviewed-by: Arindam Nath <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-05drm/i915/cmdparser: Do not check past the cmd length.Michal Srb1-0/+6
The command MEDIA_VFE_STATE checks bits at offset +2 dwords. However, it is possible to have MEDIA_VFE_STATE command with length = 0 + LENGTH_BIAS = 2. In that case check_cmd will read bits from the following command, or even past the end of the buffer. If the offset ends up outside of the command length, reject the command. Fixes: 351e3db2b363 ("drm/i915: Implement command buffer parsing logic") Signed-off-by: Michal Srb <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Chris Wilson <[email protected]> Signed-off-by: Chris Wilson <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-02-05drm/i915/cmdparser: Check reg_table_count before derefencing.Michal Srb1-2/+2
The find_reg function was assuming that there is always at least one table in reg_tables. It is not always true. In case of VCS or VECS, the reg_tables is NULL and reg_table_count is 0, implying that no register-accessing commands are allowed. However, the command tables include commands such as MI_STORE_REGISTER_MEM. When trying to check such command, the find_reg would dereference NULL pointer. Now it will just return NULL meaning that the register was not found and the command will be rejected. Fixes: 76ff480ec963 ("drm/i915/cmdparser: Use binary search for faster register lookup") Signed-off-by: Michal Srb <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Cc: Chris Wilson <[email protected]> Cc: Matthew Auld <[email protected]> Reviewed-by: Chris Wilson <[email protected]> Signed-off-by: Chris Wilson <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] register lookup")
2018-02-06Merge branch 'linux-4.16' of git://github.com/skeggsb/linux into drm-nextDave Airlie44-1491/+2723
- initial kepler clock gating support - atomic gamma handling fixes - support for gp108 "secure boot" (enables acceleration, finally) * 'linux-4.16' of git://github.com/skeggsb/linux: drm/nouveau/clk: fix gcc-7 -Wint-in-bool-context warning drm/nouveau/mmu: Fix trailing semicolon drm/nouveau: Introduce NvPmEnableGating option drm/nouveau: Add support for SLCG for Kepler2 drm/nouveau: Add support for BLCG on Kepler2 drm/nouveau: Add support for BLCG on Kepler1 drm/nouveau: Add support for basic clockgating on Kepler1 drm/nouveau/kms/nv50: fix handling of gamma since atomic conversion drm/nouveau/kms/nv50: use INTERPOLATE_257_UNITY_RANGE LUT on newer chipsets drm/nouveau/kms/nv50: use "low res" lut for indexed mode drm/nouveau/kms/nv50: prepare for double-buffered LUTs drm/nouveau/bo: add helper functions for handling pinned+mapped buffers drm/nouveau/fbcon: add module parameter to select bits-per-pixel drm/nouveau/secboot/gp108: implement on top of acr_r370 drm/nouveau/secboot/r370: implement support for booting LS SEC2 ucode drm/nouveau/secboot/r370: move a bunch of r375 stuff to a new implementation drm/nouveau: nouveau: use correct string length drm/nouveau/drm/nouveau/mmu: fix odd_ptr_err.cocci warnings drm/nouveau/pmu/fuc: don't use movw directly anymore
2018-02-05drm/i915: Deprecate I915_SET_COLORKEY_NONEVille Syrjälä3-4/+6
Deprecate the silly I915_SET_COLORKEY_NONE flag. The obvious way to disable colorkey is to just set flags to 0, which is exactly what the intel ddx has been doing all along. Currently when userspace sets the flags to 0, we end up in a funny state where colorkey is disabled, but various colorkey vs. scaling checks still consider colorkey to be enabled, and thus we don't allow plane scaling to kick in. In case there is some other userspace out there that actually uses this flag (unlikely as this is an i915 specific uapi) we'll keep on accepting it. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Chris Wilson <[email protected]>
2018-02-05drm/i915: fix misalignment in HDCP register defRamalingam C1-29/+29
This patch aligns all definitions of hdcp registers and their bits. v2: No changes. Added reviewed-by tag. v3: No change. Signed-off-by: Ramalingam C <[email protected]> Reviewed-by: Sean Paul <[email protected]> Signed-off-by: Sean Paul <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]