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2017-12-06drm/amd/display: dal 3.1.20Tony Cheng1-1/+1
Signed-off-by: Tony Cheng <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/display: Set OPP default values in init_hwAndrew Jiang2-11/+12
On S3 resume, we do not reconstruct OPP, but we do need to reinitialize some of its values to the default ones. Therefore, move those lines out of the OPP constructor and into init_hw. Also reset the hubp power gated flag, since nothing is power gated at init_hw. Signed-off-by: Andrew Jiang <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/display: dal 3.1.19Tony Cheng1-1/+1
Signed-off-by: Tony Cheng <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/display: DMCU and ABM maintenance and refactorAnthony Koo4-28/+36
Remove some globals that should really be per block state. Signed-off-by: Anthony Koo <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/display: Only program watermark for full update.Yongqiang Sun3-30/+23
For scaling and position change, it isn't necessary to program watermark and check P-State as well. Signed-off-by: Yongqiang Sun <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/display: dal 3.1.18Tony Cheng1-1/+1
Signed-off-by: Tony Cheng <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/display: Set full update flag in dcn_validate_bandwidthAndrew Jiang1-0/+2
Doing bandwidth validation implies that this is a full update. Set the flag inside the function in case whatever is calling dcn_validate_bandwidth doesn't set it. Signed-off-by: Andrew Jiang <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/display: Do not program front-end twiceLeo (Sunpeng) Li3-3/+32
The sequence of front-end > back-end > front-end programming will program the front-end more than once. Add a mode_changed flag, and use it to determine whether the front-end should be programmed before, or after back-end. Signed-off-by: Leo (Sunpeng) Li <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/display: Trigger full update on plane changeLeo (Sunpeng) Li1-0/+5
With the optimized DCN10 frontend programming code, things are programmed only when requested. For now, trigger a full update on all plane changes. Signed-off-by: Leo (Sunpeng) Li <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/display: Rename output_bpc to opp_input_bpcDmytro Laktyushkin3-14/+2
Signed-off-by: Dmytro Laktyushkin <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/display: fix refclk conversion from khz int to mhz floatDmytro Laktyushkin1-1/+1
Signed-off-by: Dmytro Laktyushkin <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/display: fix mpo validation failureDmytro Laktyushkin1-84/+36
There was an error in translation of mode support check. "N/A" is a failure condition while "" was a special case. This change will differentiate between the two by using a define. Signed-off-by: Dmytro Laktyushkin <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/display: move csc matrix to hw_sharedYue Hin Lau2-26/+26
Signed-off-by: Yue Hin Lau <[email protected]> Reviewed-by: Eric Bernstein <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/display: dal 3.1.17Tony Cheng1-1/+1
Signed-off-by: Tony Cheng <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/display: update output csc matrix valuesYue Hin Lau2-22/+16
Signed-off-by: Yue Hin Lau <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/display: Only update output transfer function for full type.Yongqiang Sun1-7/+16
dcn10_translate_regamma_to_hw_format costs 750us to run, it cannot be called within isr, check update flag before calling, only do it for full update. Signed-off-by: Yongqiang Sun <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/display: performance profiling instrumentationTony Cheng3-0/+15
Signed-off-by: Tony Cheng <[email protected]> Reviewed-by: Yongqiang Sun <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/display: Remove unnecessary dc_link vtableHarry Wentland2-109/+0
None of this needs to be a function table or dynamic in any way. Signed-off-by: Harry Wentland <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/display: fix opp header register defineYue Hin Lau1-11/+14
Signed-off-by: Yue Hin Lau <[email protected]> Reviewed-by: Eric Bernstein <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/display: Update dchub and dpp as per update flags.Yongqiang Sun1-74/+117
Check update flags and update dchub and dpp as per flags, reduce reg access from 347 to 200, duration time reduce to 170us. Signed-off-by: Yongqiang Sun <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/display: Move update_plane_addr to apply_ctx_for_surface for dce.Yongqiang Sun2-2/+5
Move update_plane_addr to apply_ctx_for_surface, address update will just be called once, not twice for updat type is full and medium. This will reduce some reg access and duration time. Signed-off-by: Yongqiang Sun <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/display: call set_mpc_output_csc from hwsequencerYue Hin Lau3-67/+156
Signed-off-by: Yue Hin Lau <[email protected]> Reviewed-by: Eric Bernstein <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/display: Fix description of module parameter dc_logMichel Dänzer1-1/+1
It was incorrectly referencing the dc parameter, resulting in an empty description of the dc_log parameter. Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amdgpu: Downgrade DRM_ERROR to DRM_DEBUG in amdgpu_queue_mgr_mapMichel Dänzer1-5/+5
Prevent buggy userspace from spamming dmesg. Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amdgpu: expose the VA above the hole to userspaceChristian König1-2/+10
Let userspace know how much area we have above the 48bit VA hole on Vega10. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amdgpu: use dev_dbg instead of dev_err in the VA IOCTLChristian König1-3/+3
Userspace buggy userspace can spam the logs. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amdgpu: fix VA hole handling on Vega10 v3Christian König4-6/+32
Similar to the CPU address space the VA on Vega10 has a hole in it. v2: use dev_dbg instead of dev_err v3: add some more comments to explain how the hw works Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> CC: [email protected] Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amdgpu: use the new TTM bytes moved counter v2Christian König2-13/+6
Instead of the global statistics use the per context bytes moved counter. v2: rebased Signed-off-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Tested-by: Dieter Nützel <[email protected]> Tested-by: Michel Dänzer <[email protected]> Acked-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amdgpu: forward operation context to ttm_bo_mem_spaceChristian König1-18/+12
This way we can finally use some more stats. Signed-off-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Tested-by: Dieter Nützel <[email protected]> Tested-by: Michel Dänzer <[email protected]> Acked-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/ttm: add number of bytes moved to the operation contextChristian König1-0/+1
Add some statistics how many bytes we have moved. Signed-off-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Tested-by: Dieter Nützel <[email protected]> Tested-by: Michel Dänzer <[email protected]> Acked-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/ttm: add context to driver move callback as wellChristian König6-43/+47
Instead of passing the parameters manually. Signed-off-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Tested-by: Dieter Nützel <[email protected]> Tested-by: Michel Dänzer <[email protected]> Acked-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/ttm: use the operation context inside TTMChristian König1-38/+29
Instead of passing down the parameters manually to every function. Signed-off-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Tested-by: Dieter Nützel <[email protected]> Tested-by: Michel Dänzer <[email protected]> Acked-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/ttm: use an operation context for ttm_bo_mem_space v2Christian König5-24/+28
Instead of specifying interruptible and no_wait_gpu manually. v2: rebase Signed-off-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Tested-by: Dieter Nützel <[email protected]> Tested-by: Michel Dänzer <[email protected]> Acked-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/ttm: use an operation ctx for ttm_bo_init_reservedChristian König2-8/+7
Instead of specifying if sleeping should be interruptible. Signed-off-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Tested-by: Dieter Nützel <[email protected]> Tested-by: Michel Dänzer <[email protected]> Acked-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/ttm: add operation ctx to ttm_bo_validate v2Christian König26-72/+115
Give moving a BO into place an operation context to work with. v2: rebased Signed-off-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Tested-by: Dieter Nützel <[email protected]> Tested-by: Michel Dänzer <[email protected]> Acked-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/ttm: add page order in page poolRoger He1-11/+27
to indicate page order for each element in the pool Reviewed-by: Christian König <[email protected]> Signed-off-by: Roger He <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/ttm: use NUM_PAGES_TO_ALLOC alwaysRoger He1-2/+1
Reviewed-by: Christian König <[email protected]> Signed-off-by: Roger He <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/powerplay: Followup fixes to mc_reg_addressErnst Sjöstrand3-23/+11
This is a followup to: drm/amd/powerplay: Fix buffer overflows with mc_reg_address Rework *_set_mc_special_registers for the other architectures to use the same logic as the first patch. This allows the last entry of the array to be filled without an error message for example. This doesn't fix any known problems, perhaps avoided by luck. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Ernst Sjöstrand <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/powerplay: Fix buffer overflows with mc_reg_addressErnst Sjöstrand2-14/+6
Smatch warned about the following lines: ci_set_mc_special_registers() error: buffer overflow 'table->mc_reg_address' 16 <= 16 tonga_set_mc_special_registers() error: buffer overflow 'table->mc_reg_address' 16 <= 16 Change the logic to check before access instead of after incrementing. It's fine if j reaches max after we're done. This allows the last entry of the array to be filled without an error message for example. Changed some whitespace to clarify grouping. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Ernst Sjöstrand <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/amdgpu: Fix missing null check in atombios_i2c.cErnst Sjöstrand1-2/+9
Reported by smatch: amdgpu_atombios_i2c_process_i2c_ch() error: we previously assumed 'buf' could be null Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Ernst Sjöstrand <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/powerplay: Fix missing newlines at end of fileErnst Sjöstrand3-3/+3
Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Ernst Sjöstrand <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/powerplay: Minor fixes in processpptables.c (v2)Ernst Sjöstrand1-3/+3
Reported by smatch: init_overdrive_limits() error: uninitialized symbol 'result'. get_clock_voltage_dependency_table() warn: inconsistent indenting v2: set result to 0 (Alex) Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Ernst Sjöstrand <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amdgpu: fix VCE buffer placement restrictions v2Christian König1-2/+99
Turned out that VCE still has a placement restriction that BOs can't cross a 4GB boundary. Fix this by adding a command submission parser prepass to correctly place the buffers. v2: add function description Signed-off-by: Christian König <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amdgpu: align GTT start to 4GB v2Christian König1-1/+4
For VCE to work properly the start of the GTT space must be aligned to a 4GB boundary. v2: add comment why we do this Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amdgpu: remove VRAM size reduction v2Christian König4-46/+1
Remove some outdated comments and all code which tries to reduce the VRAM size mapped into the MC. This is superfluous and misleading since we never actually program the size. v2: handle gmc_v6_0.c as well Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm: amd: Fix line continuation formatsJoe Perches6-43/+22
Line continuations with excess spacing causes unexpected output. Miscellanea: o Added missing '\n' to a few of the coalesced pr_<level> formats Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Joe Perches <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/display/dc/dce110/dce110_mem_input_v: use swap macro in ↵Gustavo A. R. Silva1-20/+8
program_size_and_rotation Make use of the swap macro instead of _manually_ swapping values and remove unnecessary variable swap. This makes the code easier to read and maintain. This code was detected with the help of Coccinelle. Signed-off-by: Gustavo A. R. Silva <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amd/display/dc/core/dc_resource: use swap macro in rect_swap_helperGustavo A. R. Silva1-9/+2
Make use of the swap macro instead of _manually_ swapping values and remove unnecessary variable temp. This makes the code easier to read and maintain. This code was detected with the help of Coccinelle. Signed-off-by: Gustavo A. R. Silva <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amdgpu/gmc9: make some ECC messages debug onlyAlex Deucher1-2/+2
To avoid spamming the logs on non-ECC boards. Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-12-06drm/amdgpu: always make gart.table_addr 64bitChristian König1-1/+1
Fixing warning/compile errors on 32bit kernels. Signed-off-by: Christian König <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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