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2018-05-18drm/nouveau/ibus/gv100: initial supportBen Skeggs1-0/+1
Appears to be compatible with GM200. Signed-off-by: Ben Skeggs <[email protected]>
2018-05-18drm/nouveau/top/gv100: initial supportBen Skeggs2-1/+3
Signed-off-by: Ben Skeggs <[email protected]>
2018-05-18drm/nouveau/devinit/gv100: initial supportBen Skeggs6-1/+85
Signed-off-by: Ben Skeggs <[email protected]>
2018-05-18drm/nouveau/bios/pll: limits table 5.0Ben Skeggs1-1/+18
Signed-off-by: Ben Skeggs <[email protected]>
2018-05-18drm/nouveau/bios/gv100: initial supportBen Skeggs2-1/+5
No real surprises here so far. Signed-off-by: Ben Skeggs <[email protected]>
2018-05-18drm/nouveau/pci/gv100: initial supportBen Skeggs1-0/+1
Appears to be compatible with GP100. Signed-off-by: Ben Skeggs <[email protected]>
2018-05-18drm/nouveau/core: recognise gv100Ben Skeggs5-0/+11
Signed-off-by: Ben Skeggs <[email protected]>
2018-05-18drm/nouveau/core: increase maximum number of copy engines to 9Ben Skeggs3-3/+15
Signed-off-by: Ben Skeggs <[email protected]>
2018-05-18drm/nouveau/kms/nv50-: initial overlay supportBen Skeggs16-15/+364
Signed-off-by: Ben Skeggs <[email protected]>
2018-05-18drm/nouveau/kms/gk104-: add support for [XA]2R10G10B10 formatsBen Skeggs6-3/+57
Signed-off-by: Ben Skeggs <[email protected]>
2018-05-18drm/nouveau/kms/gk104-: support additional cursor sizesBen Skeggs7-16/+65
Signed-off-by: Ben Skeggs <[email protected]>
2018-05-18drm/nouveau/kms/nv50-: separate blocklinear vs linear pitchBen Skeggs8-17/+28
Will be required to support Volta. Signed-off-by: Ben Skeggs <[email protected]>
2018-05-18drm/nouveau/kms/nv50-: handle degamma LUT from window channelsBen Skeggs17-171/+462
Required to eventually support DRM colour management APIs, and to support Volta. Signed-off-by: Ben Skeggs <[email protected]>
2018-05-18drm/nouveau/kms/nv50-: plane updates don't always require image_set()Ben Skeggs2-32/+32
When only the position of a window changes, there's no need to submit an image update as well. Will be required to support the overlays, and Volta windows. Signed-off-by: Ben Skeggs <[email protected]>
2018-05-18drm/nouveau/kms/nv50-: store window visibility in stateBen Skeggs2-8/+21
Window visibility is going to become a little more complicated with the upcoming LUT changes, so store the calculated value to avoid needing to recalculate the armed state again. Signed-off-by: Ben Skeggs <[email protected]>
2018-05-18drm/nouveau/kms/nv50-: simplify swap interval handlingBen Skeggs2-9/+3
This is just cleaning up some left-overs from when we needed a custom legacy page flip implementation. Signed-off-by: Ben Skeggs <[email protected]>
2018-05-18drm/nouveau/kms/nv50-: decouple window state changes, and update method ↵Ben Skeggs2-4/+16
submisssion This will be required to support Volta. Signed-off-by: Ben Skeggs <[email protected]>
2018-05-18drm/nouveau/kms/nv50-: simplify tracking of channel interlocksBen Skeggs20-86/+224
Instead of windows returning their core channel interlock mask if they know core has been modified, it's recorded unconditionally and used if required when update methods are emitted. This will be required to support Volta. Signed-off-by: Ben Skeggs <[email protected]>
2018-05-18drm/nouveau/kms/nv50-: determine MST support from DP Info TableBen Skeggs3-3/+12
GV100 doesn't support MST, use the information provided in VBIOS tables to detect its presence instead. Signed-off-by: Ben Skeggs <[email protected]>
2018-05-18drm/nouveau/kms/nv50-: extend window image data for stereo/planar formatsBen Skeggs6-18/+18
Signed-off-by: Ben Skeggs <[email protected]>
2018-05-18drm/nouveau/kms/nv50-: move drm format->hw conversion into common codeBen Skeggs3-18/+27
This will be required to support additional HW features. Signed-off-by: Ben Skeggs <[email protected]>
2018-05-18drm/nouveau/kms/nv50-: unify set/clr masksBen Skeggs4-44/+20
This is a simplification that'll be used to improve interlock handling. Signed-off-by: Ben Skeggs <[email protected]>
2018-05-18drm/nouveau/kms/nv50-: allow specification of valid heads for a windowBen Skeggs5-6/+6
This will be required to support Volta, where window ID != head. Signed-off-by: Ben Skeggs <[email protected]>
2018-05-18drm/nouveau/kms/nv50-: split base implementation by hardware classBen Skeggs9-79/+242
Signed-off-by: Ben Skeggs <[email protected]>
2018-05-18drm/nouveau/kms/nv50-: split core implementation by hardware classBen Skeggs19-333/+903
Signed-off-by: Ben Skeggs <[email protected]>
2018-05-18drm/nouveau/kms/nv50-: split each resource type into their own source filesBen Skeggs28-2483/+2967
There should be no code changes here, just shuffling stuff around. Signed-off-by: Ben Skeggs <[email protected]>
2018-05-18drm/nouveau/kms/nv50: abstract OR interfaces so the code can be splitBen Skeggs1-78/+102
Signed-off-by: Ben Skeggs <[email protected]>
2018-05-18drm/nouveau/kms/nv50: handle SetControlOutputResource from headBen Skeggs2-61/+57
Removes duplicated code from OR-specific functions. Signed-off-by: Ben Skeggs <[email protected]>
2018-05-18drm/nouveau/kms/nv50-: abstract head interfaces so the code can be splitBen Skeggs1-14/+50
Signed-off-by: Ben Skeggs <[email protected]>
2018-05-18drm/nouveau/kms/nv50: modify core allocation so the code can be splitBen Skeggs1-81/+134
Signed-off-by: Ben Skeggs <[email protected]>
2018-05-18drm/nouveau/kms/nv50-: modify base allocation so the code can be splitBen Skeggs1-133/+105
Signed-off-by: Ben Skeggs <[email protected]>
2018-05-18drm/nouveau/kms/nv50-: modify cursor allocation so the code can be splitBen Skeggs1-65/+71
Signed-off-by: Ben Skeggs <[email protected]>
2018-05-18drm/nouveau/kms/nv50-: modify overlay allocation so the code can be splitBen Skeggs1-98/+179
Signed-off-by: Ben Skeggs <[email protected]>
2018-05-18drm/nouveau/kms/nv50-: move fb ctxdma tracking into windowsBen Skeggs1-79/+84
Signed-off-by: Ben Skeggs <[email protected]>
2018-05-18drm/nouveau/kms/nv50-: fix i2c-over-aux on anx9805Ben Skeggs1-2/+1
We don't support address-only transactions there. Signed-off-by: Ben Skeggs <[email protected]>
2018-05-18drm/nouveau/kms/nv50-: move code underneath dispnv50/Ben Skeggs3-5/+4
The code is about to be split up, and this matches dispnv04. Signed-off-by: Ben Skeggs <[email protected]>
2018-05-18drm/nouveau/kms: move display class instantiation to libraryBen Skeggs8-61/+129
This function is useful outside of DRM code. Signed-off-by: Ben Skeggs <[email protected]>
2018-05-18drm/nouveau/drm/nv50-: remove allocation of sw classBen Skeggs2-22/+19
Hasn't been required for a long time. Signed-off-by: Ben Skeggs <[email protected]>
2018-05-18drm/nouveau: no need to create ctxdma for push buffers on fermi and upBen Skeggs1-2/+5
Signed-off-by: Ben Skeggs <[email protected]>
2018-05-18drm/nouveau: remove fence wait code from deferred client work handlerBen Skeggs1-16/+14
Fences attached to deferred client work items now originate from channels belonging to the client, meaning we can be certain they've been signalled before we destroy a client. This closes a race that could happen if the dma_fence_wait_timeout() call didn't succeed. When the fence was later signalled, a use-after-free was possible. Signed-off-by: Ben Skeggs <[email protected]>
2018-05-18drm/nouveau/gem: tie deferred unmapping of buffers to VMA fence completionBen Skeggs1-15/+2
As VMAs are per-client, unlike buffers, this allows us to avoid referencing foreign fences (those that belong to another client/driver) from the client deferred work handler, and prevent some not-fun race conditions that can be triggered when a fence stalls. Signed-off-by: Ben Skeggs <[email protected]>
2018-05-18drm/nouveau/gem: attach fences to VMAs to track GPU usageBen Skeggs3-1/+16
An upcoming patch will use these to fix issues related to the deferred unmapping of GEM objects. Signed-off-by: Ben Skeggs <[email protected]>
2018-05-18drm/nouveau/gem: lookup VMAs for buffers referenced by pushbuf ioctlBen Skeggs3-15/+19
We previously only did this for push buffers, but an upcoming patch will need to attach fences to all VMAs to resolve another issue. Signed-off-by: Ben Skeggs <[email protected]>
2018-05-18drm/nouveau/gr/gp102-: setup stencil zbcBen Skeggs14-16/+162
Signed-off-by: Ben Skeggs <[email protected]>
2018-05-18drm/nouveau/gr/gp100-: use correct registers for zbc colour/depth setupBen Skeggs20-15/+88
These were missed the first time around due to the driver version I traced using the older registers still. Signed-off-by: Ben Skeggs <[email protected]>
2018-05-18drm/nouveau/gr/gp100-: fix attrib cb setupBen Skeggs7-17/+32
Signed-off-by: Ben Skeggs <[email protected]>
2018-05-18drm/nouveau/gr/gp100-: fix pagepool setupBen Skeggs1-1/+1
Signed-off-by: Ben Skeggs <[email protected]>
2018-05-18drm/nouveau/gr/gf100-gm10x: update register listsBen Skeggs19-36/+96
There are differences on GM200 and newer too, but we can't fix them there as they come from firmware packages. A request has been made to NVIDIA to release updated firmware. Signed-off-by: Ben Skeggs <[email protected]>
2018-05-18drm/nouveau/gr/gf100-: swap bundle and pagepoolBen Skeggs1-1/+1
Makes it easier to diff against RM traces. Signed-off-by: Ben Skeggs <[email protected]>
2018-05-18drm/nouveau/gr/gf100-: calculate and use sm mapping tableBen Skeggs23-56/+79
There's a number of places that require this data, so let's separate out the calculations to ensure they remain consistent. This is incorrect for GM200 and newer, but will produce the same results as we did before. Signed-off-by: Ben Skeggs <[email protected]>
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