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2022-09-29drm/amdgpu: add rlc_sr_cntl_list to firmware arrayHawking Zhang1-0/+8
To allow upload the list via psp Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Likun Gao <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-29drm/amdgpu: Remove fence_process in count_emittedJiadong.Zhu1-1/+0
The function amdgpu_fence_count_emitted used in work_hander should not call amdgpu_fence_process which must be used in irq handler. Reviewed-by: Christian König <[email protected]> Signed-off-by: Jiadong.Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-29drm/amdgpu: Correct the position in patch_cond_execJiadong.Zhu1-1/+1
The current position calulated in gfx_v9_0_ring_emit_patch_cond_exec underflows when the wptr is divisible by ring->buf_mask + 1. Reviewed-by: Christian König <[email protected]> Signed-off-by: Jiadong.Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-29drm/amd/display: Refactor LTTPR mode selectionMichael Strauss6-153/+206
[WHY] Previously, LTTPR mode was decided during detection which makes link training inflexible as mode can't be dynamically changed. [HOW] -Remove lttpr_mode from link struct, and move to link training settings -Defer choosing LTTPR mode until link training Other DP changes included: -Only use fixed vs/pe link training sequence for 8b/10b encoding -Restrict fixed vs aux timeout workaround to Yellow Carp family Reviewed-by: Wenjing Liu <[email protected]> Signed-off-by: Michael Strauss <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-29drm/amd/display: 3.2.205Aric Cyr1-1/+1
This version brings along following fixes: - LTTPR mode can be be dynamically changed - fixes divide by zero error - features able to use same interface to update cursor info - fixes for llvm compilation issues - Fixes DIO FIFO underflow and other FIFO errors - Partially valid EDIDs handled properly - Phatom pipes are skipped when checking pending flip - Fixed audio on audio on display after unplugging Acked-by: Jasdeep Dhillon <[email protected]> Signed-off-by: Aric Cyr <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-29drm/amd/display: fix a divide by zero errorAurabindo Pillai1-1/+1
[Why&How] Incorrect variable was being checked for zero condition. Reviewed-by: Alvin Lee <[email protected]> Acked-by: Jasdeep Dhillon <[email protected]> Signed-off-by: Aurabindo Pillai <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-29drm/amd/display: Only use ODM2:1 policy for high pixel rate displaysAlvin Lee2-0/+2
We only gain a benefit of using the ODM2:1 dynamic policy if it allow us to decrease DISPCLK to use the VMIN freq. If the display config can already achieve VMIN DISPCLK freq without ODM2:1, don't apply the policy. Signed-off-by: Alvin Lee <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-29drm/amd/display: Fix various dynamic ODM transitions on DCN32Dillon Varone10-39/+190
[Why&How] Several transitions were fixed that will allow Dynamic ODM and MPO transitions to be supported on DCN32. 1) Due to resource limitations, in certain scenarios that require an MPO plane to be split, the features cannot be combined with the current policy. This is due to unsafe transitions being required (OPP instance per MPCC being switched on active pipe is not supported by DCN), to support the split plane with ODM active as it moves across the viewport. Dynamic ODM will now be disabled when MPO is required. 2) When exiting MPO and re-entering ODM, DC assigns an inactive pipe for the next ODM pipe, which under previous power gating policy would result in programming a gated DSC HW block. New policy dynamically gates/un-gates DSC blocks when Dynamic ODM is active to support transitions on DCN32 only. 3) Entry and exit from 3 plane MPO and Dynamic ODM requires a minimal transition so that all pipes which require their MPCC OPP instance to be changed have a full frame to be disabled before reprogramming. To solve this, the Dynamic ODM policy now utilizes minimal state transitions when entering or exiting 3 plane scenarios. 4) Various fixes to DCN32 pipe merge/split algorithm to support Dynamic ODM and MPO transitions. In summary, this commit fixes various transitions to support ODM->MPO and MPO->ODM. Reviewed-by: Martin Leung <[email protected]> Reviewed-by: Jun Lei <[email protected]> Acked-by: Jasdeep Dhillon <[email protected]> Signed-off-by: Dillon Varone <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-29drm/amd/display: polling vid stream status in hpo dp blankWenjing Liu1-3/+3
[why] vid stream control is double bufferred, if we don't wait for video stream enable set to 0, we may get temporary image corruption showing on the stream when setting PIXEL_TO_SYMBOL_FIFO_ENABLE to 0. Reviewed-by: Ariel Bernstein <[email protected]> Acked-by: Jasdeep Dhillon <[email protected]> Signed-off-by: Wenjing Liu <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-29drm/amd/display: Fix CAB allocation calculationAlvin Lee1-2/+2
[Description] Accidentally added when should have subtracted in calculation Reviewed-by: Jun Lei <[email protected]> Acked-by: Jasdeep Dhillon <[email protected]> Signed-off-by: Alvin Lee <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-29drm/amd/display: Update MALL SS NumWays calculationAlvin Lee2-110/+98
[Description] Update MALL SS NumWays calculation according to programming guide. Reviewed-by: Jun Lei <[email protected]> Acked-by: Jasdeep Dhillon <[email protected]> Signed-off-by: Alvin Lee <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-29drm/amd/display: skip phantom pipes when checking for pending flipAurabindo Pillai1-1/+1
[Why&How] Phantom pipes are not programmed fully to hardware and hence we should not expect a flip completion. Reviewed-by: Alvin Lee <[email protected]> Acked-by: Jasdeep Dhillon <[email protected]> Signed-off-by: Aurabindo Pillai <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-29drm/amd/display: fill in clock values when DPM is not enabledSamson Tam4-0/+57
[Why] For individual feature testing, PMFW may not report all clock values back. Driver will default them to 0 but this will cause the BB table to be skipped and default to one state with max clocks. [How] Add helper function to scan through initial clock values and populate them with default clock limits so that BB table can be built. Add dpm_enabled flag to check when DPM is not enabled and to trigger helper function. Reviewed-by: Jun Lei <[email protected]> Acked-by: Jasdeep Dhillon <[email protected]> Signed-off-by: Samson Tam <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-29drm/amd/display: Cursor Info Update refactorMax Tseng2-0/+6
Dc: cursor info update: phase 1: [Why] Different feature might need to update cursor info, but With different approaches. To unify this diversity problem, all features should use The same interface to update cursor. Reviewed-by: Reza Amini <[email protected]> Acked-by: Jasdeep Dhillon <[email protected]> Signed-off-by: Max Tseng <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-29drm/amd/display: Avoid unnecessary pixel rate divider programmingTaimur Hassan1-0/+53
[Why] Programming pixel rate divider when FIFO is enabled can cause FIFO error. [How] Skip divider programming when divider values are the same to prevent FIFO error. Reviewed-by: Alvin Lee <[email protected]> Acked-by: Jasdeep Dhillon <[email protected]> Signed-off-by: Taimur Hassan <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-29drm/amd/display: Remove assert for odm transition caseEric Bernstein1-3/+7
Remove assert that will hit during odm transition case, since this is a valid case. Signed-off-by: Eric Bernstein <[email protected]> Reviewed-by: Rodrigo Siqueira <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-29drm/amd/display: Add ABM control to panel_config struct.Ian Chen1-0/+6
Reviewed-by: Josip Pavic <[email protected]> Acked-by: Jasdeep Dhillon <[email protected]> Signed-off-by: Ian Chen <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-29drm/amd/display: Disable MALL when TMZ surfaceAlvin Lee4-11/+19
[Description] - Don't use MALL buffering of any kind when the surface is TMZ - Workaround for a HW bug Reviewed-by: Jun Lei <[email protected]> Acked-by: Jasdeep Dhillon <[email protected]> Signed-off-by: Alvin Lee <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-29drm/amd/display: Fix typo in get_pixel_rate_divTaimur Hassan1-1/+1
[Why & How] Some FIFO errors still occur due to reading wrong pixel rate divider. Fix typo to prevent FIFO error. Reviewed-by: Nicholas Kazlauskas <[email protected]> Acked-by: Jasdeep Dhillon <[email protected]> Signed-off-by: Taimur Hassan <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-29drm/amd/display: add debug keys for override bios settings.Charlene Liu2-3/+21
[why] adding debug keys used for compliance test. Reviewed-by: Chris Park <[email protected]> Acked-by: Jasdeep Dhillon <[email protected]> Signed-off-by: Charlene Liu <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-29drm/amd/display: Fix audio on display after unplugging anotherAric Cyr1-4/+2
Revert "dc: skip audio setup when audio stream is enabled" This reverts commit 65fbfb02c2734cacffec5e3f492e1b4f1dabcf98 [why] We have minimal pipe split transition method to avoid pipe allocation outage.However, this method will invoke audio setup which cause audio output stuck once pipe reallocate. [how] skip audio setup for pipelines which audio stream has been enabled Reviewed-by: Martin Leung <[email protected]> Acked-by: Jasdeep Dhillon <[email protected]> Signed-off-by: Aric Cyr <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-29drm/amd/display: add missing null checkWenjing Liu1-1/+1
[why] There is a coding error for a missing null check for stream pointer when iterating through pipe_ctx. Reviewed-by: Martin Leung <[email protected]> Acked-by: Jasdeep Dhillon <[email protected]> Signed-off-by: Wenjing Liu <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-29drm/amd/display: Add explicit FIFO disable for DP blankNicholas Kazlauskas1-1/+11
[Why] We rely on DMCUB to do this when disabling the link but it should actually come before we disable the DP VID stream. If we don't then the FIFO can end up with underflow that persists the next time it's enabled. [How] Add a DCN314 specific blank sequence that will disable the DIG FIFO first. Reviewed-by: Syed Hassan <[email protected]> Acked-by: Jasdeep Dhillon <[email protected]> Signed-off-by: Nicholas Kazlauskas <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-29drm/amd/display: Wrap OTG disable workaround with FIFO controlNicholas Kazlauskas1-1/+10
[Why] The DIO FIFO will underflow if we turn off the OTG before we turn off the FIFO. Since this happens as part of the OTG workaround and we don't reset the FIFO afterwards we see the error persist. [How] Add disable FIFO before the disable CRTC and enable FIFO after enabling the CRTC. Reviewed-by: Syed Hassan <[email protected]> Acked-by: Jasdeep Dhillon <[email protected]> Signed-off-by: Nicholas Kazlauskas <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-29drm/amd/display: Add debug option for exiting idle optimizations on cursor ↵Brandon Syu4-2/+6
updates [Description] - Have option to exit idle opt on cursor updates for debug and optimizations purposes Reviewed-by: Aric Cyr <[email protected]> Acked-by: Jasdeep Dhillon <[email protected]> Signed-off-by: Brandon Syu<[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-29drm/amd/display: Change EDID fallback conditionIlya Bakoulin1-1/+1
[Why] Partially valid EDIDs on MST sinks are treated the same way as broken EDIDs or read failures and result in a fallback EDID being used instead. [How] If edid_status is EDID_PARTIAL_VALID, prefer to use the valid EDID blocks instead of using a fallback EDID. Reviewed-by: Martin Leung <[email protected]> Acked-by: Jasdeep Dhillon <[email protected]> Signed-off-by: Ilya Bakoulin <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-29drm/amd/display: Do DIO FIFO enable after DP video stream enableNicholas Kazlauskas1-5/+8
[Why] Avoids a race condition where DIO FIFO can underflow due to no incoming data available. [How] Shift the FIFO enable below stream enable. Make sure fullness level is written before the DIO reset takes place and that we're not doing it twice. Reviewed-by: Syed Hassan <[email protected]> Acked-by: Jasdeep Dhillon <[email protected]> Signed-off-by: Nicholas Kazlauskas <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-29drm/amd/display: Remove interface for periodic interrupt 1Aric Cyr5-50/+18
[why] Only a single VLINE interrupt is available so interface should not expose the second one which is used by DMU firmware. [how] Remove references to periodic_interrupt1 and VLINE1 from DC interfaces. Reviewed-by: Jaehyun Chung <[email protected]> Acked-by: Jasdeep Dhillon <[email protected]> Signed-off-by: Aric Cyr <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-29drm/amd/display: Update DCN32 to use new SR latenciesAlvin Lee1-2/+2
[Description] Update to new SR latencies for DCN32 Reviewed-by: Nevenko Stupar <[email protected]> Reviewed-by: Jun Lei <[email protected]> Acked-by: Jasdeep Dhillon <[email protected]> Signed-off-by: Alvin Lee <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-29drm/amd/display: Avoid avoid unnecessary pixel rate divider programmingTaimur Hassan1-0/+47
[Why] Programming pixel rate divider when FIFO is enabled can cause FIFO error. [How] Skip divider programming when divider values are the same to prevent FIFO error. Reviewed-by: Nicholas Kazlauskas <[email protected]> Acked-by: Jasdeep Dhillon <[email protected]> Signed-off-by: Taimur Hassan <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-29drm/amdkfd: fix dropped interrupt in kfd_int_process_v11Graham Sider1-3/+3
Shader wave interrupts were getting dropped in event_interrupt_wq_v11 if the PRIV bit was set to 1. This would often lead to a hang. Until debugger logic is upstreamed, expand comment to stop early return. Signed-off-by: Graham Sider <[email protected]> Reviewed-by: Harish Kasiviswanathan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-29drm/amdgpu: pass queue size and is_aql_queue to MESGraham Sider4-1/+10
Update mes_v11_api_def.h add_queue API with is_aql_queue parameter. Also re-use gds_size for the queue size (unused for KFD). MES requires the queue size in order to compute the actual wptr offset within the queue RB since it increases monotonically for AQL queues. v2: Make is_aql_queue assign clearer Signed-off-by: Graham Sider <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-29drm/amdkfd: fix MQD init for GFX11 in init_mqdGraham Sider1-0/+4
Set remaining compute_static_thread_mgmt_se* accordingly. Signed-off-by: Graham Sider <[email protected]> Acked-by: Alex Deucher <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-29drm/amdgpu: Enable SA software trap.David Belanger3-385/+413
Enables support for software trap for MES >= 4. Adapted from implementation from Jay Cornwall. v2: Add IP version check in conditions. v3: Remove debugger code changes. Signed-off-by: Jay Cornwall <[email protected]> Signed-off-by: David Belanger <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-29drm/amd/amdgpu: Add missing XGMI hive registers for mmhub 9.4.1Tom St Denis2-0/+12
These are used by umr to sort the hive nodes since the kernel initializes the nodes in order of bus enumeration not XGMI hive enumeration. Signed-off-by: Tom St Denis <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-29drm/amdgpu/vcn: update vcn4 fw shared data structureRuijing Dong2-1/+11
update VF_RB_SETUP_FLAG, add SMU_DPM_INTERFACE_FLAG, and corresponding change in VCN4. Reviewed-by: Leo Liu <[email protected]> Signed-off-by: Ruijing Dong <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-29drm/amdgpu/sdma6: use common function to init sdma fwLikun Gao1-71/+2
Use common function to init sdma v6 firmware ucode. Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-29drm/amdgpu: support sdma struct v2 fw initLikun Gao1-16/+60
Support SDMA firmware init on common function for sdma v2 struct. Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-29drm/amdgpu/sdma5: use common function to init sdma fwLikun Gao2-107/+11
Use common function to init sdma v5 firmware ucode. Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-29drm/amdgpu/sdma4: use common function to init sdma fwLikun Gao1-88/+19
Use common function to init sdma v4 firmware ucode. Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-29drm/amdgpu: add function to init SDMA microcodeLikun Gao2-0/+93
Add an common function to init SDMA related microcode. Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-29drm/amdgpu/gfx11: use common function to init cp fwLikun Gao1-139/+16
Use common function to init gfx v11 CP firmware ucode. Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-29drm/amdgpu/gfx10: use common function to init CP fwLikun Gao1-78/+8
Use common function to init gfx v10 CP firmware ucode. Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-29drm/amdgpu/gfx9: use common function to init cp fwLikun Gao1-88/+10
Use common function to init gfx v9 CP firmware ucode. Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-29drm/amdgpu: add function to init CP microcodeLikun Gao2-0/+142
Add an common function to init CP related microcode. Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-29drm/amd/pm: use adverse selection for dpm features unsupported by driverEvan Quan1-61/+24
It's vbios and pmfw instead of driver who decide whether some dpm features is supported or not. Driver just de-selects those features which are not permitted on user's request. Thus, we use adverse selects model. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-29drm/amd/pm: enable gfxoff feature for SMU 13.0.0Evan Quan1-3/+5
The feature is ready with latest 78.58.0 PMFW. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-29drm/amdgpu: avoid gfx register accessing during gfxoffEvan Quan1-0/+4
Make sure gfxoff is disabled before gfx register accessing. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-29drivers/amd/pm: check the return value of amdgpu_bo_kmapLi Zhong1-1/+4
amdgpu_bo_kmap() returns error when fails to map buffer object. Add the error check and propagate the error. Reviewed-by: Evan Quan <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Li Zhong <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-29drm/amdgpu: Use simplified API for p2p dist calcLijo Lazar2-4/+4
Use the simpified API that calculates distance between two devices. Signed-off-by: Lijo Lazar <[email protected]> Reviewed-by: Christian König <[email protected]> Reviewed-by: Guchun Chen <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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