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2020-09-17drm/amd/pm: move NAVI1X power mode switching workaround to post_initEvan Quan2-15/+19
Since that should be the correct place to put ASIC specific workarounds. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-09-17drm/amd/pm: apply no power source workaround if dc reported by gpioEvan Quan1-10/+12
If dc reported by gpio is supported, the power source switching will be performed by pmfw automatically. Thus the power source setting workaround for Navi1x will be not needed. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-09-17drm/amd/pm: process pending AC/DC switch interruptEvan Quan1-10/+30
Process any pending interrupt that occured before driver register for interrupt from GPIO/SMU. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-09-17drm/amd/pm: add Raven2 watermark WmType settingEvan Quan2-1/+13
Which tells it's a normal pstate change or memory retraining. Signed-off-by: Evan Quan <[email protected]> Tested-by: Changfeng Zhu <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-09-17drm/amd/pm: add Renoir watermark WmType settingEvan Quan1-0/+4
Which tells it's a normal pstate change or memory retraining. Signed-off-by: Evan Quan <[email protected]> Tested-by: Changfeng Zhu <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-09-17drm/amd/pm: drop unnecessary wrappers around watermark settingEvan Quan6-206/+78
The convertion to "struct dm_pp_clock_range_for_mcif_wm_set_soc15" is totally unnecessary and can be dropped. Signed-off-by: Evan Quan <[email protected]> Tested-by: Changfeng Zhu <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-09-17drm/amd/pm: drop dead codeEvan Quan1-3/+0
Raven never goes to swsmu path. So "adev->smu.ppt_funcs" will be always false. Signed-off-by: Evan Quan <[email protected]> Tested-by: Changfeng Zhu <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-09-17drm/amd/pm: minor cleanupsEvan Quan1-17/+5
Drop unneeded "ret". Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Acked-by: Nirmoy Das <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-09-17drm/amd/pm: drop unnecessary table existence and dpm enablement checkEvan Quan4-32/+5
Either this was already performed in parent API. Or the table is confirmed to exist. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Acked-by: Nirmoy Das <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-09-17drm/amd/pm: drop unnecessary smu_baco->mutex lock protections(V2)Evan Quan4-12/+1
As these operations are performed in hardware setup and there is actually no race conditions during this period considering: 1. the hardware setup is serial and cannot be in parallel 2. all other operations can be performed only after hardware setup complete. V2: rich the commit log description Signed-off-by: Evan Quan <[email protected]> Acked-by: Nirmoy Das <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-09-17drm/amd/pm: drop unnecessary feature->mutex lock protections(V2)Evan Quan2-6/+0
As these operations are performed in hardware setup and there is actually no race conditions during this period considering: 1. the hardware setup is serial and cannot be in parallel 2. all other operations can be performed only after hardware setup complete. V2: rich the commit log description Signed-off-by: Evan Quan <[email protected]> Acked-by: Nirmoy Das <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-09-17drm/amd/pm: make namings and comments more readableEvan Quan1-4/+4
And to fit more accurately what the cod does. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-09-17drm/amd/pm: correct the requirement for umc cdr workaroundEvan Quan1-10/+9
The workaround can be applied only with UCLK DPM enabled. And expand the workaround to more Navi10 SKUs and also Navi14. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-09-17drm/amd/pm: apply the CDR workarounds only with some specific UMC firmwares(V2)Evan Quan3-9/+49
And different workaround will be applied based on hybrid cdr bit. V2: add pmfw version guard to make sure the new workaround applied only with pmfw >= 42.53.0 Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-09-17drm/amd/pm: implement a new umc cdr workaroundEvan Quan4-1/+234
By uploading dummy pstate tables. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-09-17drm/amd/pm: allocate a new buffer for pstate dummy readingEvan Quan2-0/+46
This dummy reading buffer will be used for the new Navi1x UMC CDR workaround. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-09-17drm/amd/pm: revise the umc hybrid cdr workaroundEvan Quan1-27/+34
Drop the unused message(SMU_MSG_DAL_DISABLE_DUMMY_PSTATE_CHANGE). And do not apply this workaround when the max uclk frequency is greater than 750Mhz. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-09-17drm/amd/pm: put Navi1X umc cdr workaround in post_smu_initEvan Quan4-12/+14
That's where the uclk dpm get enabled and then the uclk cdr workaround can be applied. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-09-17drm/amd/pm: postpone SOCCLK/UCLK enablement after DAL initialization(V2)Evan Quan3-24/+46
This is needed for Navi1X only. And it may help for display missing or hang issue seen on some high resolution monitors. V2: no UCLK DPM enablement for Navi10 A0 secure SKU Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-09-17drm/amd/pm: wrapper for postponing some setup job after DAL initializatioa(V2)Evan Quan3-0/+8
So that ASIC specific actions can be added. V2: better namings Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-09-15drm/amdgpu/dc: Require primary plane to be enabled whenever the CRTC isMichel Dänzer1-22/+10
Don't check drm_crtc_state::active for this either, per its documentation in include/drm/drm_crtc.h: * Hence drivers must not consult @active in their various * &drm_mode_config_funcs.atomic_check callback to reject an atomic * commit. atomic_remove_fb disables the CRTC as needed for disabling the primary plane. This prevents at least the following problems if the primary plane gets disabled (e.g. due to destroying the FB assigned to the primary plane, as happens e.g. with mutter in Wayland mode): * The legacy cursor ioctl returned EINVAL for a non-0 cursor FB ID (which enables the cursor plane). * If the cursor plane was enabled, changing the legacy DPMS property value from off to on returned EINVAL. v2: * Minor changes to code comment and commit log, per review feedback. GitLab: https://gitlab.gnome.org/GNOME/mutter/-/issues/1108 GitLab: https://gitlab.gnome.org/GNOME/mutter/-/issues/1165 GitLab: https://gitlab.gnome.org/GNOME/mutter/-/issues/1344 Suggested-by: Daniel Vetter <[email protected]> Acked-by: Daniel Vetter <[email protected]> Reviewed-by: Nicholas Kazlauskas <[email protected]> Signed-off-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-09-15drm/amdgpu/gmc9: remove mmhub client duplicated caseAlex Deucher1-1/+0
Copy paste typo. Reported-by: kernel test robot <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-09-15drm/amdgpu: Fail to load on RAVEN if SME is activeAlex Deucher1-0/+10
Due to hardware bugs, scatter/gather display on raven requires a 1:1 IOMMU mapping, however, SME (System Memory Encryption) requires an indirect IOMMU mapping because the encryption bit is beyond the DMA mask of the chip. As such, the two are incompatible. Acked-by: Joerg Roedel <[email protected]> Reviewed-by: Christian König <[email protected]> Acked-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-09-15drm/amd/display: Create trigger_hotplug entryYueHaibing1-0/+1
Add trigger_hotplug debugfs entry. Fixes: 6f77b2ac6280 ("drm/amd/display: Add connector HPD trigger debugfs entry") Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: YueHaibing <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-09-15drm/amd/display: Fix possible memleak in dp_trigger_hotplug()YueHaibing1-1/+3
If parse_write_buffer_into_params() fails, we should free wr_buf before return. Fixes: 6f77b2ac6280 ("drm/amd/display: Add connector HPD trigger debugfs entry") Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: YueHaibing <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-09-15drm/amd/display: optimize code runtime a bitBernard Zhao1-9/+5
In fnction is_cr_done & is_ch_eq_done, when done = false happened once, no need to circle left ln_count. This change is to make the code run a bit fast. Signed-off-by: Bernard Zhao <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-09-15drm/amd/amdgpu: fix comparison pointer to bool warning in sdma_v4_0.cZheng Bin1-2/+2
Fixes coccicheck warning: drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c:1003:4-9: WARNING: Comparison to bool drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c:1083:5-11: WARNING: Comparison to bool Acked-by: Christian König <[email protected]> Signed-off-by: Zheng Bin <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-09-15drm/amd/amdgpu: fix comparison pointer to bool warning in amdgpu_atpx_handler.cZheng Bin1-2/+2
Fixes coccicheck warning: drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c:619:15-49: WARNING: Comparison to bool drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c:629:15-49: WARNING: Comparison to bool Acked-by: Christian König <[email protected]> Signed-off-by: Zheng Bin <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-09-15drm/amd/amdgpu: fix comparison pointer to bool warning in uvd_v6_0.cZheng Bin1-2/+2
Fixes coccicheck warning: drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c:1243:14-25: WARNING: Comparison to bool Acked-by: Christian König <[email protected]> Signed-off-by: Zheng Bin <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-09-15drm/amd/amdgpu: fix comparison pointer to bool warning in si.cZheng Bin1-1/+1
Fixes coccicheck warning: drivers/gpu/drm/amd/amdgpu/si.c:1342:5-10: WARNING: Comparison to bool Acked-by: Christian König <[email protected]> Signed-off-by: Zheng Bin <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-09-15drm/amd/amdgpu: fix comparison pointer to bool warning in sdma_v5_2.cZheng Bin1-1/+1
Fixes coccicheck warning: drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c:562:5-11: WARNING: Comparison to bool Acked-by: Christian König <[email protected]> Signed-off-by: Zheng Bin <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-09-15drm/amd/amdgpu: fix comparison pointer to bool warning in sdma_v5_0.cZheng Bin1-1/+1
Fixes coccicheck warning: drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c:619:5-11: WARNING: Comparison to bool Acked-by: Christian König <[email protected]> Signed-off-by: Zheng Bin <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-09-15drm/amd/amdgpu: fix comparison pointer to bool warning in gfx_v10_0.cZheng Bin1-1/+1
Fixes coccicheck warning: drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c:3563:5-31: WARNING: Comparison to bool Acked-by: Christian König <[email protected]> Signed-off-by: Zheng Bin <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-09-15drm/amd/amdgpu: fix comparison pointer to bool warning in gfx_v9_0.cZheng Bin1-1/+1
Fixes coccicheck warning: drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c:2805:5-11: WARNING: Comparison to bool Acked-by: Christian König <[email protected]> Signed-off-by: Zheng Bin <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-09-15drm/radeon: Add sclk frequency as hwmon sensorSandeep Raghuraman1-1/+28
This patch adds support for reporting sclk values for Radeon GPUs, where supported. Signed-off-by: Sandeep Raghuraman <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-09-15drm/scheduler: fix sched_fence.c kernel-doc warningsTian Tao1-1/+1
Fix kernel-doc warnings. drivers/gpu/drm/scheduler/sched_fence.c:110: warning: Function parameter or member 'f' not described in 'drm_sched_fence_release_scheduled' drivers/gpu/drm/scheduler/sched_fence.c:110: warning: Excess function parameter 'fence' description in 'drm_sched_fence_release_scheduled' Reviewed-by: Christian König <[email protected]> Signed-off-by: Tian Tao <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-09-15drm: amd/display: fix spelling of "function"Randy Dunlap8-8/+8
Fix spellos of "function" in drivers/gpu/drm/amd/display/. Signed-off-by: Randy Dunlap <[email protected]> Cc: Harry Wentland <[email protected]> Cc: Leo Li <[email protected]> Cc: [email protected] Cc: [email protected] Signed-off-by: Alex Deucher <[email protected]>
2020-09-15drm/amd/display: Remove duplicate includeChen Zhou1-1/+0
Remove duplicate header which is included twice. Signed-off-by: Chen Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-09-15drm/amdgpu: stop resetting xgmi perfmons on disableJonathan Kim2-11/+16
Disabling perf events does not specify reset in ABI so stop doing it in hardware. Signed-off-by: Jonathan Kim <[email protected]> Reviewed-by: Harish Kasiviswanathan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-09-15drm/radeon: revert "Prefer lower feedback dividers"Christian König1-1/+1
Turns out this breaks a lot of different hardware. This reverts commit fc8c70526bd30733ea8667adb8b8ffebea30a8ed. Signed-off-by: Christian König <[email protected]> Acked-by: Nirmoy Das <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-09-15drm/amdgpu: More accurate description of a function paramOak Zeng2-3/+3
Add more accurate description of the pe parameter of function amdgpu_vm_sdma_udpate and amdgpu_vm_cpu_update Signed-off-by: Oak Zeng <[email protected]> Reviewed-by: Christian Konig <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-09-15drm/amdgpu: Add comment to function amdgpu_ttm_alloc_gartOak Zeng1-1/+6
Add comments to refect what function does Signed-off-by: Oak Zeng <[email protected]> Reviewed-by: Christian Konig <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-09-15drm/amdgpu: Include sienna_cichlid in USBC PD FW support.Andrey Grodzovsky1-1/+1
Create sysfs interface also for sienna_cichlid. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Andrey Grodzovsky <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-09-15drm/amd/display: update clock when non-seamless boot stream existLewis Huang1-2/+2
[Why] Seamless boot skip porgram clock when set path mode. It cause driverprogram clock after unblank stream. [How] update clock when non-seamless boot stream exist Signed-off-by: Lewis Huang <[email protected]> Acked-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-09-15drm/amd/display: update dcn30_optc header with missing declarationsDmytro Laktyushkin2-3/+6
Signed-off-by: Dmytro Laktyushkin <[email protected]> Acked-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-09-15drm/amd/display: get socBB from VBIOSJun Lei4-1/+96
[why] Some SOC BB paramters may vary per SKU, and it does not make sense for driver to hardcode these values [how] Parse the values from VBIOS if available, and use them if valid Signed-off-by: Jun Lei <[email protected]> Acked-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-09-15drm/amd/display: Further fix of psr eDP p-state warningFangzhi Zuo1-1/+1
[Why] psr doesn't get fully disabled before hitting hubbub1_wm_change_req_wa. [How] Pass TRUE to "wait" parameter to get psr fully disabled. Follow-Up fix to: dc: PSR eDP p-state warning occurs intermittently after unplug DP Signed-off-by: Fangzhi Zuo <[email protected]> Acked-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-09-15drm/amd/display: update nv1x stutter latenciesJun Lei1-2/+2
[why] Recent characterization shows increased stutter latencies on some SKUs, leading to underflow. [how] Update SOC params to account for this worst case latency. Signed-off-by: Jun Lei <[email protected]> Acked-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-09-15drm/amd/display: fix compile warning in dmlRoman Li1-1/+1
[Why] gcc version 5.4.0 fails compilation with: ‘PixelPTEReqHeightPTEs’ may be used uninitialized in this function [-Werror=maybe-uninitialized] [How] Initialized variable explicitly with 0 Signed-off-by: Roman Li <[email protected]> Acked-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-09-15drm/amd/display: remove dc context from transfer functionJosip Pavic5-17/+1
[Why] The ctx field of dc_transfer_func is not always populated and therefore isn't reliable. [How] Remove dc context from dc_transfer_func Signed-off-by: Josip Pavic <[email protected]> Acked-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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