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2018-06-20drm/i915/selftests: Avoid ERR_PTR dereferenceChris Wilson1-2/+2
Along the early error path for igt_switch_to_kernel_context we may try to dereference an invalid error pointer. Instead, return early rather than dump the GEM trace since we haven't yet emitted anything of interest. Reported-by: Dan Carpenter <[email protected]> Fixes: 09a4c02e58c1 ("drm/i915: Look for an active kernel context before switching") Signed-off-by: Chris Wilson <[email protected]> Cc: Mika Kuoppala <[email protected]> Cc: Joonas Lahtinen <[email protected]> Reviewed-by: Joonas Lahtinen <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-06-20Merge tag 'drm-misc-fixes-2018-06-12' of ↵Dave Airlie1-2/+5
git://anongit.freedesktop.org/drm/drm-misc into drm-fixes Only a small qxl fix that was queued for v4.17. Signed-off-by: Dave Airlie <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-06-20Merge tag 'drm-misc-next-fixes-2018-06-15' of ↵Dave Airlie1-7/+7
git://anongit.freedesktop.org/drm/drm-misc into drm-fixes Single fix for v4.18: - Fix possible race conditions while unplugging DRM device. Signed-off-by: Dave Airlie <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-06-20Merge branch 'linux-4.18' of git://github.com/skeggsb/linux into drm-fixesDave Airlie2-6/+9
Single nouveau regression fix. Signed-off-by: Dave Airlie <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/CACAvsv5VDDKaYKJShyVAGK0MJAHMZOJ02FKQ_aW5DnBCNVgRUw@mail.gmail.com
2018-06-19Merge tag 'gvt-next-2018-06-19' of https://github.com/intel/gvt-linux into ↵Rodrigo Vivi21-203/+612
drm-intel-next-queued gvt-next-2018-06-19 - fine-grained per vgpu locking (Colin) - fine-grained vgpu scheduler locking (Colin) - deliver windows guest cursor hotspot info (Tina) - GVT-g BXT support (Colin) - other misc and checker fixes (Chris, Xinyun) Signed-off-by: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-06-19drm/amdgpu: Make amdgpu_vram_mgr_bo_invisible_size always accurateMichel Dänzer1-2/+18
Even BOs with AMDGPU_GEM_CREATE_NO_CPU_ACCESS may end up at least partially in CPU visible VRAM, in particular when all VRAM is visible. v2: * Don't take VRAM mgr spinlock, not needed (Christian König) * Make loop logic simpler and clearer. Cc: [email protected] Signed-off-by: Michel Dänzer <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-06-19drm/amdgpu: Refactor amdgpu_vram_mgr_bo_invisible_size helperMichel Dänzer3-4/+19
Preparation for the following fix, no functional change intended. Cc: [email protected] Signed-off-by: Michel Dänzer <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-06-19drm/amdgpu: Update pin_size values before unpinning BOMichel Dänzer1-10/+8
At least in theory, ttm_bo_validate may move the BO, in which case the pin_size accounting would be inconsistent with when the BO was pinned. Cc: [email protected] Signed-off-by: Michel Dänzer <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-06-19drm/amdgpu:All UVD instances share one idle_work handleJames Zhu2-8/+8
All UVD instanses have only one dpm control, so it is better to share one idle_work handle. Signed-off-by: James Zhu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]> Tested-by: Stefan Agner <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-06-19drm/amdgpu: Use correct enum to set powergating stateStefan Agner1-1/+1
Use enum amd_powergating_state instead of enum amd_clockgating_state. The underlying value stays the same, so there is no functional change in practise. This fixes a warning seen with clang: drivers/gpu/drm/amd/amdgpu/amdgpu_device.c:1930:14: warning: implicit conversion from enumeration type 'enum amd_clockgating_state' to different enumeration type 'enum amd_powergating_state' [-Wenum-conversion] AMD_CG_STATE_UNGATE); ^~~~~~~~~~~~~~~~~~~ Signed-off-by: Stefan Agner <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-06-19drm/amdgpu: correct GART location infoJunwei Zhang1-8/+6
Avoid confusing the GART with the GTT domain. Signed-off-by: Junwei Zhang <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-06-19drm/amdgpu: update ib_start/size_alignment same as windows usedChunming Zhou1-14/+14
PAGE_SIZE for start_alignment is far much than hw requirement, And now, update to expereince value from window side. Signed-off-by: Chunming Zhou <[email protected]> Acked-by: Marek Olšák <[email protected]> Acked-by: Christian König <[email protected]> Acked-by: Junwei Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-06-19amdgpu: display: use modern ktime accessorsArnd Bergmann2-9/+4
getrawmonotonic64() is deprecated because of the nonstandard naming. The replacement functions ktime_get_raw_ns() also simplifies the callers. Signed-off-by: Arnd Bergmann <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-06-19gpu: drm: ttm: Adding new return type vm_fault_tSouptick Joarder1-23/+22
Use new return type vm_fault_t for fault handler. For now, this is just documenting that the function returns a VM_FAULT value rather than an errno. Once all instances are converted, vm_fault_t will become a distinct type. Ref-> commit 1c8f422059ae ("mm: change return type to vm_fault_t") Previously vm_insert_{mixed,pfn} returns err which driver mapped into VM_FAULT_* type. The new function vmf_insert_{mixed,pfn} will replace this inefficiency by returning VM_FAULT_* type. Signed-off-by: Souptick Joarder <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-06-19gpu: drm: radeon: Adding new typedef vm_fault_tSouptick Joarder1-4/+4
Use new return type vm_fault_t for fault handler in vm_operations_struct. Signed-off-by: Souptick Joarder <[email protected]> Reviewed-by: Matthew Wilcox <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-06-19drm/amdgpu: Don't default to DC support for Kaveri and olderHarry Wentland1-1/+9
We've had a number of users report failures to detect and light up display with DC with LVDS and VGA. These connector types are not currently supported with DC. I'd like to add support but unfortunately don't have a system with LVDS or VGA available. In order not to cause regressions we should probably fallback to the non-DC driver for ASICs that support VGA and LVDS. These ASICs are: * Bonaire * Kabini * Kaveri * Mullins ASIC support can always be force enabled with amdgpu.dc=1 v2: Keep Hawaii on DC v3: Added Mullins to the list Cc: [email protected] Signed-off-by: Harry Wentland <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-06-19drm/amdgpu: Use kvmalloc_array for allocating VRAM manager nodes arrayMichel Dänzer1-3/+4
It can be quite big, and there's no need for it to be physically contiguous. This is less likely to fail under memory pressure (has actually happened while running piglit). Cc: [email protected] Signed-off-by: Michel Dänzer <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-06-19drm/amd/pp: Fix uninitialized variableRajan Vaja1-1/+1
Initialize variable to 0 before performing logical OR operation. Reviewed-by: Rex Zhu <[email protected]> Signed-off-by: Rajan Vaja <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-06-19drm/i915/audio: constify ELD pointersJani Nikula1-8/+8
The hooks aren't supposed to modify the ELD, so use const pointer. As a drive-by fix, use drm_eld_size() to log ELD size. Suggested-by: Ville Syrjala <[email protected]> Reviewed-by: Ville Syrjälä <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-06-19drm/i915: Enforce max hdisplay/hblank_start limits on HSW/BDW FDIVille Syrjälä1-0/+9
The PCH transcoder registers are only 12 bits wide for the hdisplay and hblank_start values. On HSW/BDW the CPU side registers are 13 bits wide. intel_mode_valid() only checks against the higher limit (since we don't know where the mode is to be used), so an extra check is required against the FDI limits. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Paulo Zanoni <[email protected]>
2018-06-19drm/i915: Check timings against hardware maximumsVille Syrjälä1-0/+35
Validate that all display timings fit within the number of bits we have in the transcoder timing registers. The limits are: hsw+: 4k: vdisplay, vblank_start 8k: everything else gen3+: 4k: h/vdisplay, h/vblank_start 8k: everything else gen2: 2k: h/vdisplay, h/vblank_start 4k: everything else Also document the fact that the mode_config.max_width/height limits refer to just the max framebuffer dimensions we support. Which may be larger than the max hdisplay/vdisplay. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Paulo Zanoni <[email protected]>
2018-06-19drm/i915: Nuke the cursor size definesVille Syrjälä2-10/+4
No point in having this extra indireciton for the cursor max size. So drop the defines and just write out the raw numbers. Makes it easier to see what's going on. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Paulo Zanoni <[email protected]>
2018-06-19drm/i915: Print prop name/id when rejecting itVille Syrjälä2-4/+8
Use the '[PROP:id:name]' format I introduced for the core in the driver debug messages as well. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Daniel Vetter <[email protected]>
2018-06-19drm/i915: Enable provoking vertex fix on Gen9 systems.Kenneth Graunke2-1/+16
The SF and clipper units mishandle the provoking vertex in some cases, which can cause misrendering with shaders that use flat shaded inputs. There are chicken bits in 3D_CHICKEN3 (for SF) and FF_SLICE_CHICKEN (for the clipper) that work around the issue. These registers are unfortunately not part of the logical context (even the power context), and so we must reload them every time we start executing in a context. Bugzilla: https://bugs.freedesktop.org/103047 Signed-off-by: Kenneth Graunke <[email protected]> Signed-off-by: Chris Wilson <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Joonas Lahtinen <[email protected]> Cc: [email protected] (cherry picked from commit b77422f80337d363eed60c8c48db9cb6e33085c9) Signed-off-by: Jani Nikula <[email protected]>
2018-06-19drm/i915: Fix context ban and hang accounting for clientMika Kuoppala3-25/+55
If client is smart or lucky enough to create a new context after each hang, our context banning mechanism will never catch up, and as a result of that it will be saved from client banning. This can result in a never ending streak of gpu hangs caused by bad or malicious client, preventing access from other legit gpu clients. Fix this by always incrementing per client ban score if it hangs in short successions regardless of context ban scoring. The exception are non bannable contexts. They remain detached from client ban scoring mechanism. v2: xchg timestamp, tidyup (Chris) v3: comment, bannable & banned together (Chris) Fixes: b083a0870c79 ("drm/i915: Add per client max context ban limit") Cc: Chris Wilson <[email protected]> Signed-off-by: Mika Kuoppala <[email protected]> Reviewed-by: Chris Wilson <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] (cherry picked from commit 14921f3cef85b0167a9145e5f29b9dfc3b2a84dc) Signed-off-by: Jani Nikula <[email protected]>
2018-06-19drm/i915: Turn off g4x DP port in .post_disable()Ville Syrjälä1-16/+8
While Bspec doesn't list a specific sequence for turning off the DP port on g4x we are getting an underrun if the port is disabled in the .disable() hook. Looks like the pipe stops when the port stops, and by that time the plane disable may not have completed yet. Also the plane(s) seem to end up in some wonky state when this happens as they also signal another underrun immediately after we turn them back on during the next enable sequence. We could add a vblank wait in .disable() to avoid wedging the planes, but I assume we're still tripping up the pipe in some way. So it seems better to me to just follow the ILK+ sequence and turn off the DP port in .post_disable() instead. This sequence doesn't seem to suffer from this problem. Could be it was always the intended sequence for DP and the gen4 bspec was just never updated to include it. Originally we used the bad sequence even on ilk+, but I changed that in commit 08aff3fe26ae ("drm/i915: Move DP port disable to post_disable for pch platforms") as it was causing issues on those platforms as well. I left out g4x then only because I didn't have the hardware to test it. Now that I do it's fairly clear that the ilk+ sequence is also the right choice for g4x. v2: Fix whitespace fail (Jani) Mention the ilk+ commit (Jani) Cc: [email protected] Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Jani Nikula <[email protected]> (cherry picked from commit 51a9f6dfc00d35f927ecfaf6f0ae8ebaba39b3fe) Signed-off-by: Jani Nikula <[email protected]>
2018-06-19drm/i915: Disallow interlaced modes on g4x DP outputsVille Syrjälä1-2/+2
Looks like interlaced DP output doesn't work on g4x either. Not all that surprising considering we already established that interlaced DP output is busted on VLV/CHV. Cc: [email protected] Signed-off-by: Ville Syrjälä <[email protected]> Reviewed-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] (cherry picked from commit 929168c5f3df5d9ea0ef426c33e971157d045eab) Signed-off-by: Jani Nikula <[email protected]>
2018-06-19drm/i915: Fix PIPESTAT irq ack on i965/g4xVille Syrjälä1-2/+10
On i965/g4x IIR is edge triggered. So in order for IIR to notice that there is still a pending interrupt we have to force and edge in ISR. For the ISR/IIR pipe event bits we can do that by temporarily clearing all the PIPESTAT enable bits when we ack the status bits. This will force the ISR pipe event bit low, and it can then go back high when we restore the PIPESTAT enable bits. This avoids the following race: 1. stat = read(PIPESTAT) 2. an enabled PIPESTAT status bit goes high 3. write(PIPESTAT, enable|stat); 4. write(IIR, PIPE_EVENT) The end result is IIR==0 and ISR!=0. This can lead to nasty vblank wait/flip_done timeouts if another interrupt source doesn't trick us into looking at the PIPESTAT status bits despite the IIR PIPE_EVENT bit being low. Before i965 IIR was level triggered so this problem can't actually happen there. And curiously VLV/CHV went back to the level triggered scheme as well. But for simplicity we'll use the same i965/g4x compatible code for all platforms. Cc: [email protected] Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106033 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105225 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106030 Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Chris Wilson <[email protected]> (cherry picked from commit 132c27c97cb958f637dc05adc35a61b47779bcd8) Signed-off-by: Jani Nikula <[email protected]>
2018-06-19drm/i915: Allow DBLSCAN user modes with eDP/LVDS/DSIVille Syrjälä10-5/+84
When encountering a connector with the scaling mode property both intel and modesetting ddxs sometimes add tons of DBLSCAN modes to the output's mode list. The idea presumably being that since the output will be going through the panel fitter anyway we can pretend to use any kind of mode. Sadly that means we can't reject user modes with the DBLSCAN flag until we know whether we're going to be using the panel's native mode or the user mode directly. Doing otherwise means X clients using xf86vidmode/xrandr will get a protocol error (and often self terminate as a result) when the kernel refuses to use the requested mode with the DBLSCAN flag. To undo the regression we'll move the DBLSCAN checks into the connector->mode_valid() and encoder->compute_config() hooks. Cc: [email protected] Cc: Vito Caputo <[email protected]> Reported-by: Vito Caputo <[email protected]> Fixes: e995ca0b8139 ("drm/i915: Provide a device level .mode_valid() hook") References: https://lkml.org/lkml/2018/5/21/715 Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Maarten Lankhorst <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106804 Tested-by: Arkadiusz Miskiewicz <[email protected]> (cherry picked from commit e4dd27aadd205417a2e9ea9902b698a0252ec3a0) Signed-off-by: Jani Nikula <[email protected]>
2018-06-19drm/i915/execlists: Avoid putting the error pointerChris Wilson1-4/+2
On allocation error, do not jump to the unwind handler that tries to free the error pointer. Reported-by: Lionel Landwerlin <[email protected]> Fixes: a89d1f921c15 ("drm/i915: Split i915_gem_timeline into individual timelines") Signed-off-by: Chris Wilson <[email protected]> Cc: Lionel Landwerlin <[email protected]> Cc: Tvrtko Ursulin <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] (cherry picked from commit 467d35789e5a4f47428b65ef711b30fdabbb0fd4) Signed-off-by: Jani Nikula <[email protected]>
2018-06-19drm/i915: Apply batch location restrictions before pinningChris Wilson1-22/+27
We special case the position of the batch within the GTT to prevent negative self-relocation deltas from underflowing. However, that restriction is being applied after a trial pin of the batch in its current position. Thus we are not rejecting an invalid location if the batch has been used before, leading to an assertion if we happen to need to rearrange the entire payload. In the worst case, this may cause a GPU hang on gen7 or perhaps missing state. References: https://bugs.freedesktop.org/show_bug.cgi?id=105720 Fixes: 2889caa92321 ("drm/i915: Eliminate lots of iterations over the execobjects array") Signed-off-by: Chris Wilson <[email protected]> Cc: Joonas Lahtinen <[email protected]> Cc: Martin Peres <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Joonas Lahtinen <[email protected]> (cherry picked from commit 746c8f143afad7aaa66c484485fc39888d437a3f) Signed-off-by: Jani Nikula <[email protected]>
2018-06-19drm/i915/psr: Adds psrwake options for all platformsVathsala Nagaraju1-1/+3
Adds new psrwake options defined in the below table. Platform PSR wake options vbt version KBL/CFL/WHL All(205+) BXT Uses old interpretation. CNL/ICL+ All(205+) GLK All(205+) SKL All PV releases (Check for 205+ might help but cannot be foolproof) We will continue with newer interpretation for SKL from 205. v2: Jani Keep the bdb version check. v3: Apply newer version for skl from 205+(DK). Add (version check && platform list) (Jani). Add bdb version for each platform in commit message(DK). Cc: Jani Nikula <[email protected]> Cc: Rodrigo Vivi <[email protected]> Cc: Puthikorn Voravootivat <[email protected]> Cc: Dhinakaran Pandiyan <[email protected]> Cc: Ashutosh D Shukla <[email protected]> Cc: Maulik V Vaghela <[email protected]> Signed-off-by: Vathsala Nagaraju <[email protected]> Reviewed-by: Dhinakaran Pandiyan <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-06-19i915: remove timespec_to_jiffies_timeoutArnd Bergmann1-8/+0
This function has been unused since commit 5ed0bdf21a85 ("drm: i915: Use nsec based interfaces"). Let's remove the definition as well now to help get rid of all uses of 'timespec'. Signed-off-by: Arnd Bergmann <[email protected]> Signed-off-by: Daniel Vetter <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-06-19drm/nouveau/kms/nv50-: cursors always use core channel vram ctxdmaBen Skeggs2-6/+9
Ctxdmas for cursors from all heads are setup in the core channel, and due to us tracking allocated handles per-window, we were failing with -EEXIST on multiple-head setups trying to allocate duplicate handles. The cursor code is hardcoded to use the core channel vram ctxdma already, so just skip ctxdma allocation for cursor fbs to fix the issue. Fixes: 5bca1621c07 ("drm/nouveau/kms/nv50-: move fb ctxdma tracking into windows") Reported-by: Adam Borowski <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2018-06-18drm/i915/icl: Handle hotplug interrupts for DP over TBTDhinakaran Pandiyan2-14/+46
This patch enables hotplug interrupts for DP over TBT output on TC ports. The TBT interrupts are enabled and handled irrespective of the actual output type which could be DP Alternate, DP over TBT, native DP or native HDMI. Cc: Animesh Manna <[email protected]> Cc: Paulo Zanoni <[email protected]> Cc: Anusha Srivatsa <[email protected]> Cc: Manasi Navare <[email protected]> Reviewed-by: Lucas De Marchi <[email protected]> Signed-off-by: Dhinakaran Pandiyan <[email protected]> Signed-off-by: Paulo Zanoni <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-06-18drm/i915/icl: Support for TC North Display interruptsDhinakaran Pandiyan2-3/+112
The hotplug interrupts for the ports can be routed to either North Display or South Display depending on the output mode. DP Alternate or DP over TBT outputs will have hotplug interrupts routed to the North Display while interrupts for legacy modes will be routed to the South Display in PCH. This patch adds hotplug interrupt handling support for DP Alternate mode. Cc: Jani Nikula <[email protected]> Cc: Anusha Srivatsa <[email protected]> Reviewed-by: Paulo Zanoni <[email protected]> Signed-off-by: Dhinakaran Pandiyan <[email protected]> [Paulo: coding style changes] Signed-off-by: Paulo Zanoni <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-06-18drm/i915/icl: GSE interrupt moves from DE_MISC to GU_MISCDhinakaran Pandiyan2-1/+52
The Graphics System Event(GSE) interrupt bit has a new location in the GU_MISC_INTERRUPT_{IIR, ISR, IMR, IER} registers. Since GSE was the only DE_MISC interrupt that was enabled, with this change we don't enable/handle any of DE_MISC interrupts for gen11. Credits to Paulo for pointing out the register change. v2: from DK raw_reg_[read/write], branch prediction hint and drop platform check (Mika) v3: From DK Early re-enable of master interrupt (Chris) Cc: Chris Wilson <[email protected]> Cc: Mika Kuoppala <[email protected]> Reviewed-by: Paulo Zanoni <[email protected]> Signed-off-by: Dhinakaran Pandiyan <[email protected]> [Paulo: bikesheds and rebases] Signed-off-by: Paulo Zanoni <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-06-18drm/i915/i915_reg.h: fix the checkpatch MACRO_ARG_PRECEDENCE issuesPaulo Zanoni1-21/+21
While I don't see any issue with the way these macros are being called today, let's protect them against operator precedence issues before they happen. Reviewed-by: Rodrigo Vivi <[email protected]> Signed-off-by: Paulo Zanoni <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-06-18drm/i915/i915_reg.h: fix the checkpatch SPACE_BEFORE_TAB issuesPaulo Zanoni1-7/+7
Since I'm touching the file I might as well fix this class of errors since they are just a few. Also drive-by fix the styling of the VLV_TURBO_SOC_OVERRIDE definitions instead of just the spaces before the tabs. Reviewed-by: Rodrigo Vivi <[email protected]> Signed-off-by: Paulo Zanoni <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-06-18drm/i915/i915_reg.h: fix the checkpatch SPACING issuesPaulo Zanoni1-1592/+1592
Because OCD. Now seriously, commit 1aa920ea0e85 ("drm/i915: add register macro definition style guide") has finally established a coding standard to be followed by the rest of the file, and I've been trying to request everybody to adhere to that since then. The problem is that when someone adds a new line to a register that has the wrong style, these people generally propagate the wrong style and I have to keep asking them to drive-by fix the whole register, which is not something I like to do and also creates extra work for them. Or I can ignore the propagation of the wrong coding style and feel anxious about it. On top of that, we now have our CI happily reminding us about these problems, which makes everything worse. So IMHO the best way to proceed is to fix the spacing issues in the file once and for all. Contributors will stop propagating the bad style when adding new bits to registers that already have bad style, we will stop asking them to redo their patches and the CI emails will become more relevant by having less semi-false errors. Yes, there will be some pain involved for backporters, but at least spacing issues like that are easy to spot and fix in the patch files. This patch was generated by: ../../../../scripts/checkpatch.pl -f --strict --types SPACING \ --fix-inplace i915_reg.h I manually checked the output and everything seems sane. v2: Single conflict around the addition of DP_TP_CTL_LINK_TRAIN_PAT4. Cc: Jani Nikula <[email protected]> Cc: Rodrigo Vivi <[email protected]> Cc: Joonas Lahtinen <[email protected]> Acked-by: Rodrigo Vivi <[email protected]> Reviewed-by: Jani Nikula <[email protected]> Signed-off-by: Paulo Zanoni <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-06-18drm/i915/audio: Add 810 MHz clock entries to dp_aud_n_m tableRadhakrishna Sripada1-0/+10
Expand the Maud/Naud table according to DP 1.4 spec to include entries for 810 MHz clock. This is required for audio to work with HBR3. Cc: Dhinakaran Pandiyan <[email protected]> Cc: Jani Nikula <[email protected]> Signed-off-by: Radhakrishna Sripada <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-06-18drm/i915/aml: Introducing Amber Lake platformJosé Roberto de Souza1-0/+1
Amber Lake uses the same gen graphics as Kaby Lake, including a id that were previously marked as reserved on Kaby Lake, but that now is moved to AML page. So, let's just move it to AML macro that will feed into KBL macro just to keep it better organized to make easier future code review but it will be handled as a KBL. Reviewed-by: Rodrigo Vivi <[email protected]> Signed-off-by: José Roberto de Souza <[email protected]> Signed-off-by: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-06-18drm/i915/whl: Introducing Whiskey Lake platformJosé Roberto de Souza1-1/+3
Whiskey Lake uses the same gen graphics as Coffe Lake, including some ids that were previously marked as reserved on Coffe Lake, but that now are moved to WHL page. So, let's just move them to WHL macros that will feed into CFL macro just to keep it better organized to make easier future code review but it will be handled as a CFL. v2: Fixing GT level of some ids Cc: Rodrigo Vivi <[email protected]> Signed-off-by: José Roberto de Souza <[email protected]> Reviewed-by: Rodrigo Vivi <[email protected]> Signed-off-by: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-06-18drm/mali-dp: Rectify the width and height passed to rotmem_required()Ayan Kumar Halder1-2/+2
The width and height needs to be swapped Signed-off-by: Ayan Kumar halder <[email protected]> Reviewed-by: Brian Starkey <[email protected]> Reviewed-by: Alexandru Gheorghe <[email protected]> Acked-by: Liviu Dudau <[email protected]> [rebased on top of v4.18-rc1] Signed-off-by: Liviu Dudau <[email protected]>
2018-06-18drm/arm/malidp: Preserve LAYER_FORMAT contents when setting formatAyan Kumar Halder1-1/+4
On some Mali-DP processors, the LAYER_FORMAT register contains fields other than the format. These bits were unconditionally cleared when setting the pixel format, whereas they should be preserved at their reset values. Reported-by: Brian Starkey <[email protected]> Reported-by: Liviu Dudau <[email protected]> Signed-off-by: Ayan Kumar halder <[email protected]> Acked-by: Liviu Dudau <[email protected]> Signed-off-by: Liviu Dudau <[email protected]>
2018-06-18drm: mali-dp: Enable Global SE interrupts mask for DP500Alison Wang1-1/+2
In the situation that DE and SE aren’t shared the same interrupt number, the Global SE interrupts mask bit MASK_IRQ_EN in MASKIRQ must be set, or else other mask bits will not work and no SE interrupt will occur. This patch enables MASK_IRQ_EN for SE to fix this problem. Signed-off-by: Alison Wang <[email protected]> Acked-by: Liviu Dudau <[email protected]> Signed-off-by: Liviu Dudau <[email protected]>
2018-06-18drm/arm/malidp: Ensure that the crtcs are shutdown before removing any ↵Ayan Kumar Halder1-1/+2
encoder/connector One needs to ensure that the crtcs are shutdown so that the drm_crtc_state->connector_mask reflects that no connectors are currently active. Further, it reduces the reference count for each connector. This ensures that the connectors and encoders can be cleanly removed either when _unbind is called for the corresponding drivers or by drm_mode_config_cleanup(). We need drm_atomic_helper_shutdown() to be called before component_unbind_all() otherwise the connectors attached to the component device will have the wrong reference count value and will not be cleanly removed. Signed-off-by: Ayan Kumar Halder <[email protected]> Acked-by: Liviu Dudau <[email protected]> Signed-off-by: Liviu Dudau <[email protected]>
2018-06-18drm/i915/execlists: Pull the w/a LRI emission into a helperChris Wilson2-17/+45
Having the w/a registers as an open-coded table leaves a trap for the unwary; it would be easy to miss incrementing the LRI counter when adding a new register to the list. Instead, pull the list of registers into a table, so that we only need add new registers to that table rather than try and remember important side-effects of earlier chunks of GPU instructions. Suggested-by: Joonas Lahtinen <[email protected]> Signed-off-by: Chris Wilson <[email protected]> Cc: Joonas Lahtinen <[email protected]> Reviewed-by: Joonas Lahtinen <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-06-18drm/i915: Only show debug for state changes when banningChris Wilson1-5/+5
Since we trigger 10,000s of hangs and resets during selftesting, we emit many, many thousands of lines of useless debug messages. Reduce the frequency by only logging a change in state of a guilty context. Fixes: 14921f3cef85 ("drm/i915: Fix context ban and hang accounting for client") Signed-off-by: Chris Wilson <[email protected]> Cc: Mika Kuoppala <[email protected]> Reviewed-by: Joonas Lahtinen <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-06-18drm/rockchip: vop: fix irq disabled after vop driver probedSandy Huang1-8/+17
The vop irq is shared between vop and iommu and irq probing in the iommu driver moved to the probe function recently. This can in some cases lead to a stall if the irq is triggered while the vop driver still has it disabled, but the vop irq handler gets called. But there is no real need to disable the irq, as the vop can simply also track its enabled state and ignore irqs in that case. For this we can simply check the power-domain state of the vop, similar to how the iommu driver does it. So remove the enable/disable handling and add appropriate condition to the irq handler. changes in v2: - move to just check the power-domain state - add clock handling changes in v3: - clarify comment to speak of runtime-pm not power-domain changes in v4: - address Marc's comments (clk-enable WARN_ON and style improvement) Fixes: d0b912bd4c23 ("iommu/rockchip: Request irqs in rk_iommu_probe()") Cc: [email protected] Signed-off-by: Sandy Huang <[email protected]> Signed-off-by: Heiko Stuebner <[email protected]> Tested-by: Ezequiel Garcia <[email protected]> Reviewed-by: Tomasz Figa <[email protected]> Reviewed-by: Marc Zyngier <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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