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2013-08-30drm/radeon/dpm: implement force performance level for KB/KVAlex Deucher3-0/+46
Allows you to force the selected performance level via sysfs. Signed-off-by: Alex Deucher <[email protected]>
2013-08-30drm/radeon/dpm: add debugfs support for KB/KVAlex Deucher4-0/+30
This allows you to look at the current DPM state via debugfs. Signed-off-by: Alex Deucher <[email protected]>
2013-08-30drm/radeon/dpm: implement vblank_too_short callback for CIAlex Deucher3-1/+17
Check if we can switch the mclk during the vblank time otherwise we may get artifacts on the screen when the mclk changes. Signed-off-by: Alex Deucher <[email protected]>
2013-08-30drm/radeon/dpm: implement force performance level for CIAlex Deucher4-0/+157
Allows you to force the selected performance level via sysfs. Signed-off-by: Alex Deucher <[email protected]>
2013-08-30drm/radeon/dpm: add debugfs support for CIAlex Deucher4-0/+26
This allows you to look at the current DPM state via debugfs. Signed-off-by: Alex Deucher <[email protected]>
2013-08-30drm/radeon: add dpm support for CI dGPUs (v2)Alex Deucher15-15/+6447
This adds dpm support for btc asics. This includes: - dynamic engine clock scaling - dynamic memory clock scaling - dynamic voltage scaling - dynamic pcie gen switching Set radeon.dpm=1 to enable. v2: remove unused radeon_atombios.c changes, make missing smc ucode non-fatal Signed-off-by: Alex Deucher <[email protected]>
2013-08-30drm/radeon/kms: add dpm support for KB/KVAlex Deucher12-4/+3576
This adds dpm support for KB/KV asics. This includes: - dynamic engine clock scaling - dynamic voltage scaling - power containment - shader power scaling Set radeon.dpm=1 to enable. Signed-off-by: Alex Deucher <[email protected]>
2013-08-30drm/radeon/dpm: add helper to fetch the vrefresh of the current modeAlex Deucher2-0/+19
Needed for DPM on CI. Signed-off-by: Alex Deucher <[email protected]>
2013-08-30drm/radeon/dpm: add a helper to encode pcie lane settingAlex Deucher2-0/+11
convert from number of lanes to register setting. Signed-off-by: Alex Deucher <[email protected]>
2013-08-30drm/radeon/dpm: add vce clocks to radeon_psAlex Deucher1-0/+3
Signed-off-by: Alex Deucher <[email protected]>
2013-08-30drm/radeon: add r600_get_pcie_lane_support helperAlex Deucher2-0/+27
Signed-off-by: Alex Deucher <[email protected]>
2013-08-30drm/radeon: parse the acp clock voltage deps tableAlex Deucher1-0/+26
Signed-off-by: Alex Deucher <[email protected]>
2013-08-30drm/radeon: parse the samu clock voltage deps tableAlex Deucher1-0/+26
Signed-off-by: Alex Deucher <[email protected]>
2013-08-30drm/radeon/dpm: clean up the extended table error pathesAlex Deucher1-34/+6
Signed-off-by: Alex Deucher <[email protected]>
2013-08-30drm/radeon: parse the uvd clock voltage deps tableAlex Deucher1-0/+40
Signed-off-by: Alex Deucher <[email protected]>
2013-08-30drm/radeon: parse the vce clock voltage deps tableAlex Deucher1-1/+40
Signed-off-by: Alex Deucher <[email protected]>
2013-08-30drm/radeon: add clock voltage dep tables for acp, samuAlex Deucher1-0/+2
Signed-off-by: Alex Deucher <[email protected]>
2013-08-30drm/radeon: add structs to store vce clock voltage depsAlex Deucher1-0/+12
Used for vce power management. Signed-off-by: Alex Deucher <[email protected]>
2013-08-30drm/radeon/dpm: grab mvdd_dependency_on_mclk info from vbiosAlex Deucher2-0/+20
Required for dpm on CI. Signed-off-by: Alex Deucher <[email protected]>
2013-08-30drm/radeon/dpm: add support for parsing the atom powertune tableAlex Deucher2-0/+56
Needed for DPM on CI. Signed-off-by: Alex Deucher <[email protected]>
2013-08-30drm/radeon/dpm: update cac leakage table parsing for CIAlex Deucher2-8/+24
Uses a different table format if the board supports EVV. Signed-off-by: Alex Deucher <[email protected]>
2013-08-30drm/radeon: adjust si_dpm function for code sharingAlex Deucher1-7/+14
Signed-off-by: Alex Deucher <[email protected]>
2013-08-30drm/radeon: add get_temperature() callbacks for CIK (v2)Alex Deucher5-0/+51
This added support for the on-chip thermal sensors on CIK asics. v2: fix register offset. Signed-off-by: Alex Deucher <[email protected]>
2013-08-30drm/radeon: add KB/KV to r600_is_internal_thermal_sensorAlex Deucher1-0/+1
Signed-off-by: Alex Deucher <[email protected]>
2013-08-30drm/radeon: add CI to r600_is_internal_thermal_sensor()Alex Deucher1-0/+1
Signed-off-by: Alex Deucher <[email protected]>
2013-08-30drm/radeon: add support for thermal controller on KB/KVAlex Deucher2-0/+6
No support for reading temperature back yet. Signed-off-by: Alex Deucher <[email protected]>
2013-08-30drm/radeon/cik: add rlc helpers for DPMAlex Deucher2-0/+38
Signed-off-by: Alex Deucher <[email protected]>
2013-08-30drm/radeon: add structs to store uvd clock voltage depsAlex Deucher1-0/+12
Used for uvd power management. Signed-off-by: Alex Deucher <[email protected]>
2013-08-30drm/radeon: switch to pptable.hAlex Deucher2-612/+685
Internally we switched to using a separate header for atombios pplib definitions. Switch over the open source driver. Signed-off-by: Alex Deucher <[email protected]>
2013-08-30drm/radeon/sumo add helper to go from vid7 to vid2Alex Deucher2-0/+17
Needed for DPM on KB/KV. Signed-off-by: Alex Deucher <[email protected]>
2013-08-30drm/radeon: add indirect accessors for dift registers on CIKAlex Deucher2-0/+21
Signed-off-by: Alex Deucher <[email protected]>
2013-08-30drm/radeon: implement clock and power gating for CIK (v3)Alex Deucher7-24/+2565
Only the APUs support power gating. v2: disable cgcg for now v3: workaround hw issue in mgcg Signed-off-by: Alex Deucher <[email protected]>
2013-08-30drm/radeon: convert SI,CIK to use sumo_rlc functionsAlex Deucher7-195/+49
and remove duplicate si_rlc functions. Signed-off-by: Alex Deucher <[email protected]>
2013-08-30drm/radeon: clean up sumo_rlc_init() for code sharingAlex Deucher1-108/+113
This will eventually be shared with newer asics to reduce code duplication. Signed-off-by: Alex Deucher <[email protected]>
2013-08-30drm/radeon/cik: restructure rlc setupAlex Deucher3-31/+56
Restructure rlc setup to handle clock and power gating. Signed-off-by: Alex Deucher <[email protected]>
2013-08-30drm/radeon: add support for ASPM on CIK asicsAlex Deucher2-1/+222
Enables PCIE ASPM (Active State Power Management) on CIK asics. Signed-off-by: Alex Deucher <[email protected]>
2013-08-30drm/radeon/cik: add support for pcie gen1/2/3 switchingAlex Deucher2-0/+218
Signed-off-by: Alex Deucher <[email protected]>
2013-08-30drm/radeon: switch CIK to use radeon_ucode.hAlex Deucher2-16/+15
Signed-off-by: Alex Deucher <[email protected]>
2013-08-30drm/radeon/cik: implement some more atom helpers for DPMAlex Deucher1-0/+115
Required for DPM on CIK. Signed-off-by: Alex Deucher <[email protected]>
2013-08-30drm/radeon/kms: fix up dce8 display watermark calc for dpmAlex Deucher1-22/+74
Calculate the low and high watermarks based on the low and high clocks for the current power state. The dynamic pm hw will select the appropriate watermark based on the internal dpm state. Signed-off-by: Alex Deucher <[email protected]>
2013-08-30drm/radeon/dpm: use performance state if no UVD stateAlex Deucher1-2/+10
Newer asics don't have specific UVD states. Signed-off-by: Alex Deucher <[email protected]>
2013-08-30drm/radeon: default to 1024M gart size on rv770+Alex Deucher2-7/+19
Newer asics have a lot of vram so it's less of an issue to waste a little more space for the gart page table. This gives us some additional gart space before having to migrate to non-gart system ram for games, etc. where we use up most of vram. Signed-off-by: Alex Deucher <[email protected]>
2013-08-30drm/radeon/dpm: rework thermal state handlingAlex Deucher2-31/+15
1. Handle the the thermal state directly in the work handler. Remove the state selection function since nothing else uses it now. 2. On some asics there is no thermal state, so we just use a regular state and force the low performance state. Signed-off-by: Alex Deucher <[email protected]>
2013-08-30drm/radeon/dpm: use multiple UVD power states (v3)Alex Deucher4-12/+57
Use the UVD handle information to determine which which power states to select when using UVD. For example, decoding a single SD stream requires much lower clocks than multiple HD streams. v2: switch to a cleaner dpm/uvd interface v3: change the uvd power state while streams are active if need be Signed-off-by: Alex Deucher <[email protected]>
2013-08-30drm/radeon: add UVD->DPM helper function (v5)Alex Deucher2-0/+36
Add a helper function for counting the number of open stream handles. v2: fix copy-pasta in comments and whitespace error v3: make function static since it's only used in radeon_uvd.c at the moment v4: make non-static again for future changes v5: make static again for new rework of dpm uvd changes Signed-off-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2013-08-30drm/radeon/kms: remove r6xx+ blit copy routinesAlex Deucher14-1764/+33
No longer used now that we use the async dma engines or CP DMA for bo copies. Signed-off-by: Alex Deucher <[email protected]>
2013-08-30drm/radeon: switch r6xx+ to using CP DMA for the blit copy callbackAlex Deucher1-9/+9
CP DMA is lighter weight than using the 3D engine. Signed-off-by: Alex Deucher <[email protected]>
2013-08-30drm/edid: add quirk for Medion MD30217PGAlex Deucher1-0/+3
This LCD monitor (1280x1024 native) has a completely bogus detailed timing (640x350@70hz). User reports that 1280x1024@60 has waves so prefer 1280x1024@75. Manufacturer: MED Model: 7b8 Serial#: 99188 Year: 2005 Week: 5 EDID Version: 1.3 Analog Display Input, Input Voltage Level: 0.700/0.700 V Sync: Separate Max Image Size [cm]: horiz.: 34 vert.: 27 Gamma: 2.50 DPMS capabilities: Off; RGB/Color Display First detailed timing is preferred mode redX: 0.645 redY: 0.348 greenX: 0.280 greenY: 0.605 blueX: 0.142 blueY: 0.071 whiteX: 0.313 whiteY: 0.329 Supported established timings: 720x400@70Hz 640x480@60Hz 640x480@72Hz 640x480@75Hz 800x600@56Hz 800x600@60Hz 800x600@72Hz 800x600@75Hz 1024x768@60Hz 1024x768@70Hz 1024x768@75Hz 1280x1024@75Hz Manufacturer's mask: 0 Supported standard timings: Supported detailed timing: clock: 25.2 MHz Image Size: 337 x 270 mm h_active: 640 h_sync: 688 h_sync_end 784 h_blank_end 800 h_border: 0 v_active: 350 v_sync: 350 v_sync_end 352 v_blanking: 449 v_border: 0 Monitor name: MD30217PG Ranges: V min: 56 V max: 76 Hz, H min: 30 H max: 83 kHz, PixClock max 145 MHz Serial No: 501099188 EDID (in hex): 00ffffffffffff0034a4b80774830100 050f010368221b962a0c55a559479b24 125054afcf00310a0101010101018180 000000000000d60980a0205e63103060 0200510e1100001e000000fc004d4433 3032313750470a202020000000fd0038 4c1e530e000a202020202020000000ff 003530313039393138380a2020200078 Signed-off-by: Alex Deucher <[email protected]> Reported-by: [email protected] Cc: [email protected]
2013-08-30OMAPDSS: rename omap_dss_device's 'output' to 'src'Tomi Valkeinen1-1/+1
In the old panel device model we had "outputs", which were the encoders inside OMAP DSS block, and panel devices (omap_dss_device). The panel devices had a reference to the source of the video data, i.e. reference to an "output", in a field named "output". That was somewhat confusing even in the old panel device model, but even more so with the panel device model where we can have longer chains of display entities. This patch renames the "output" field to "src", which much better tells what the field points to. Signed-off-by: Tomi Valkeinen <[email protected]> Reviewed-by: Archit Taneja <[email protected]>
2013-08-30Merge tag 'drm-intel-next-2013-08-23' of ↵Dave Airlie25-385/+1035
git://people.freedesktop.org/~danvet/drm-intel into drm-next Need to get my stuff out the door ;-) Highlights: - pc8+ support from Paulo - more vma patches from Ben. - Kconfig option to enable preliminary support by default (Josh Triplett) - Optimized cpu cache flush handling and support for write-through caching of display planes on Iris (Chris) - rc6 tuning from Stéphane Marchesin for more stability - VECS seqno wrap/semaphores fix (Ben) - a pile of smaller cleanups and improvements all over Note that I've ditched Ben's execbuf vma conversion for 3.12 since not yet ready. But there's still other vma conversion stuff in here. * tag 'drm-intel-next-2013-08-23' of git://people.freedesktop.org/~danvet/drm-intel: (62 commits) drm/i915: Print seqnos as unsigned in debugfs drm/i915: Fix context size calculation on SNB/IVB/VLV drm/i915: Use POSTING_READ in lcpll code drm/i915: enable Package C8+ by default drm/i915: add i915.pc8_timeout function drm/i915: add i915_pc8_status debugfs file drm/i915: allow package C8+ states on Haswell (disabled) drm/i915: fix SDEIMR assertion when disabling LCPLL drm/i915: grab force_wake when restoring LCPLL drm/i915: drop WaMbcDriverBootEnable workaround drm/i915: Cleaning up the relocate entry function drm/i915: merge HSW and SNB PM irq handlers drm/i915: fix how we mask PMIMR when adding work to the queue drm/i915: don't queue PM events we won't process drm/i915: don't disable/reenable IVB error interrupts when not needed drm/i915: add dev_priv->pm_irq_mask drm/i915: don't update GEN6_PMIMR when it's not needed drm/i915: wrap GEN6_PMIMR changes drm/i915: wrap GTIMR changes drm/i915: add the FCLK case to intel_ddi_get_cdclk_freq ...
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