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path: root/drivers/gpu/drm
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2016-02-26drm/sti: HDMI infoframe transmission mode not take into accountVincent Abriou1-1/+1
Set the infoframe transmission mode according to the type of the infoframe. Signed-off-by: Vincent Abriou <[email protected]> Reviewed-by: Benjamin Gaignard <[email protected]>
2016-02-26drm/sti: reset HD DACS when HDA connector is createdVincent Abriou1-0/+3
Make sure the HD DACS are disabled when the HDA connector is created. Signed-off-by: Vincent Abriou <[email protected]> Reviewed-by: Benjamin Gaignard <[email protected]>
2016-02-26drm/sti: fix dvo data_enable signalBich Hemon1-16/+35
Modify AWG algorithm in order to handle more than 1023 lines Signed-off-by: Bich Hemon <[email protected]> Reviewed-by: Benjamin Gaignard <[email protected]> Reviewed-by: Vincent Abriou <[email protected]>
2016-02-26drm/sti: adjust delay for DVOBich Hemon1-1/+4
Modify delay to display last pixel column on DVO Signed-off-by: Bich Hemon <[email protected]> Reviewed-by: Benjamin Gaignard <[email protected]> Reviewed-by: Vincent Abriou <[email protected]>
2016-02-26drm/sti: add missing encoder cleanup for DVO connectorVincent Abriou1-0/+4
Signed-off-by: Vincent Abriou <[email protected]> Reviewed-by: Benjamin Gaignard <[email protected]>
2016-02-26drm/sti: fix panel detection for DVO connectorVincent Abriou1-3/+5
The DVO connector is tag as disconnect because of a wrong management of the panel detection. Signed-off-by: Vincent Abriou <[email protected]> Reviewed-by: Benjamin Gaignard <[email protected]>
2016-02-26drm/sti: do not clip RGB/YUV component value at connector sideVincent Abriou1-8/+6
Disable the clipping mode for hdmi, dvo and hda connectors. Signed-off-by: Vincent Abriou <[email protected]> Reviewed-by: Benjamin Gaignard <[email protected]>
2016-02-26drm/sti: adapt YUV colorspace in display pipelineBich Hemon2-28/+64
Use BT601 for SD/ED resolution and BT709 for HD resolution Signed-off-by: Bich Hemon <[email protected]> Reviewed-by: Benjamin Gaignard <[email protected]> Reviewed-by: Vincent Abriou <[email protected]>
2016-02-26drm/sti: implement atomic_check for the planesVincent Abriou3-168/+270
Atomic update should never fail. Thus all checks must be done in the atomic_check function for each plane (gdp, hqvdp and cursor). Signed-off-by: Vincent Abriou <[email protected]> Reviewed-by: Benjamin Gaignard <[email protected]>
2016-02-26drm/sti: force cursor CLUT fetchFabien Dessenne1-7/+4
It may happen that the cursor is displayed with wrong colors which can be explained by a CLUT wrongly fetched at the first display. Fetching the CLUT at each commit (=move) ensures that the right colors are used, at least from the first cursor move. Signed-off-by: Fabien Dessenne <[email protected]> Reviewed-by: Benjamin Gaignard <[email protected]> Reviewed-by: Vincent Abriou <[email protected]>
2016-02-26drm/sti: GDP cropping fails when we remove 2 pixels horizontallyVincent Abriou1-4/+5
GDP source width should be equal to the destination width to get rid of this issue. Signed-off-by: Vincent Abriou <[email protected]> Reviewed-by: Benjamin Gaignard <[email protected]>
2016-02-26drm/sti: fallback for GDP scalingBich Hemon1-5/+31
When a GDP gets a scale request (which it does not support), it accepts it but crops or clamps and outputs a warning message. Signed-off-by: Bich Hemon <[email protected]> Reviewed-by: Benjamin Gaignard <[email protected]> Reviewed-by: Vincent Abriou <[email protected]>
2016-02-26drm/sti: GDP planes only support RGB formatsBich Hemon1-17/+0
Only RGB formats supported by GDP planes Signed-off-by: Bich Hemon <[email protected]> Reviewed-by: Benjamin Gaignard <[email protected]> Reviewed-by: Vincent Abriou <[email protected]>
2016-02-26drm/sti: clarify the skip frame/field messageFabien Dessenne1-2/+2
When a frame or a field is skipped, output a Warning message instead of an Error message. Signed-off-by: Fabien Dessenne <[email protected]> Reviewed-by: Benjamin Gaignard <[email protected]> Reviewed-by: Vincent Abriou <[email protected]>
2016-02-26drm/sti: awg_utils code cleanupBich Hemon1-21/+12
data_en is a local variable that doesn't need to be set as awg_generate_instr can be called directly with the requested value. Signed-off-by: Bich Hemon <[email protected]> Reviewed-by: Benjamin Gaignard <[email protected]> Reviewed-by: Vincent Abriou <[email protected]>
2016-02-26drm/sti: update VTG timing programmingVincent Abriou3-88/+173
This update eases to understand the VTG programming. It also sets a VTG output id for each supported connectors. Signed-off-by: Vincent Abriou <[email protected]> Reviewed-by: Benjamin Gaignard <[email protected]>
2016-02-26drm/sti: set DRIVER_ATOMIC for sti[email protected]1-1/+1
sti now support of atomic modesetting so set the flag to enable it. Signed-off-by: Benjamin Gaignard <[email protected]> Reviewed-by: Vincent Abriou <[email protected]>
2016-02-26drm/sti: fix cursor coordinates[email protected]1-1/+1
fix x/y typo while setting cursor coordinates Signed-off-by: Fabien Dessenne <[email protected]> Reviewed-by: Benjamin Gaignard <[email protected]> Reviewed-by: Vincent Abriou <[email protected]>
2016-02-26drm/sti: set CRTC modesetting parameters[email protected]1-0/+1
Set CRTC modesetting parameters to avoid warnings in atomic mode. Signed-off-by: Benjamin Gaignard <[email protected]> Reviewed-by: Vincent Abriou <[email protected]>
2016-02-26drm/sti: fix potential crash in gdp[email protected]1-6/+7
In some cases last_close() could be called before sti_gdp_disable() and make kernel crash because mixer structure has been destroy. Let's gdp keep a reference on vtg to fix that (like it is already done in HQVDP) Signed-off-by: Benjamin Gaignard <[email protected]> Reviewed-by: Vincent Abriou <[email protected]>
2016-02-26drm/amdgpu: fix error handling in amdgpu_bo_list_setChristian König1-0/+3
Don't leak BOs in case of some error. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
2016-02-26drm/amd/powerplay: fix code style warning.Rex Zhu1-2/+2
Signed-off-by: Rex Zhu <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
2016-02-25drm/fsl-dcu: fix register initializationStefan Agner1-2/+2
The layer enumeration start with 0 (0-15 for LS1021a and 0-63 for Vybrid) whereas the register enumeration start from 1 (1-10 for LS1021a and 1-9 for Vybrid). The loop started off from 0 for both iterations and initialized the number of layers inclusive, which is one layer too many. All extensively written registers seem to be unassigned, it seems that the write to those registers did not do any harm in practice. Signed-off-by: Stefan Agner <[email protected]>
2016-02-25drm/fsl-dcu: use mode flags for hsync/vsync polarityStefan Agner2-3/+9
The current default configuration is as follows: - Invert VSYNC signal (active LOW) - Invert HSYNC signal (active LOW) The mode flags allow to specify the required polarity per mode. Furthermore, none of the current driver settings is actually a standard polarity. This patch applies the current driver default polarities as explicit flags to the display which has been introduced with the driver (NEC WQVGA "nec,nl4827hc19-05b"). The driver now also parses the flags field and applies the configuration accordingly, by using the following values as standard polarities: (e.g. when no flags are specified): - VSYNC signal not inverted (active HIGH) - HSYNC signal not inverted (active HIGH) Acked-by: Thierry Reding <[email protected]> Signed-off-by: Stefan Agner <[email protected]>
2016-02-25drm/fsl-dcu: fix alpha blendingStefan Agner2-12/+23
Fix alpha blending by enabling alpha blending for the whole frame if a color mode with alpha channel is selected (DRM_FORMAT_ARGB*). Also support color modes without alpha channel (DRM_FORMAT_XRGB*) by just not enabling alpha blending on layer level. Signed-off-by: Stefan Agner <[email protected]>
2016-02-25drm/fsl-dcu: mask all interrupts on initializationStefan Agner1-4/+1
The state of the interrupt mask register on initialization is unknown, e.g. U-Boot could already used the DCU. So depending on the boot loader, the outcome of the interrupt mask register could be different. A defined state is much more preferable. Also, there is no value in keeping interrupts enabled which we don't need. Therefor, mask all interrupts on initialization. Signed-off-by: Stefan Agner <[email protected]>
2016-02-25drm/fsl-dcu: handle initialization errors properlyStefan Agner1-4/+20
If initialization fails (e.g. due to missing panel node or deferred probe) make sure to roll-back all operations and return the error code. Signed-off-by: Stefan Agner <[email protected]>
2016-02-25drm/fsl-dcu: avoid memory leak on errorsStefan Agner2-1/+7
Improve error handling during CRTC initialization. Especially avoid memory leaks in the primary plane initialization error path. Signed-off-by: Stefan Agner <[email protected]>
2016-02-25drm/fsl-dcu: remove regmap return value checksStefan Agner3-188/+99
It is not common to do regmap return value checks, especially not for memory mapped device. We can rule out most error returns since the conditions are static and we know they are ok (e.g. offset aligned to register stride). Also without proper error handling they are not really valuable for the user. Hence remove most of them. The check in the interrupt handler is worth keeping since a volatile register won't be readable in case register caching is still enabled. Signed-off-by: Stefan Agner <[email protected]>
2016-02-25drm/fsl-dcu: specify volatile registersStefan Agner1-1/+11
Since we are using cached registers, we need to specify volatile registers explicitly to avoid reading their value from the cache. This allows to read the correct interrupt status in fsl_dcu_drm_irq and clear the asserted bits only. Signed-off-by: Stefan Agner <[email protected]>
2016-02-25drm: fsl-dcu: Fix no fb check bugMeng Yi1-0/+3
For state->fb or state->crtc may be NULL in fsl_dcu_drm_plane_atomic_check function, if so, return 0. Signed-off-by: Meng Yi <[email protected]> Signed-off-by: Jianwei Wang <[email protected]> Signed-off-by: Stefan Agner <[email protected]>
2016-02-25drm/amd: Do not make DRM_AMD_ACP default to yGeert Uytterhoeven1-1/+0
By default, not only this driver is enabled on all platforms, but also generic PM Domains and Multi-Function Devices. Drop the "default y" to fix this. Signed-off-by: Geert Uytterhoeven <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-02-25drm/amdgpu/gfx: fix off by one in rb rework (v2)Alex Deucher2-10/+4
When I reworked this code, I messed up num rb count. v2: use hweight32 Reviewed-by: Ken Wang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-02-25drm/i915: Remove update_sprite_watermarks.Maarten Lankhorst2-5/+0
Commit 791a32be6eb2 ("drm/i915: Drop intel_update_sprite_watermarks") removes the use of this variable, but forgot to remove it. Reviewed-by: Matt Roper <[email protected]> Signed-off-by: Maarten Lankhorst <[email protected]> Link: http://patchwork.freedesktop.org/patch/msgid/1455108583-29227-5-git-send-email-maarten.lankhorst@linux.intel.com
2016-02-25drm/tilcdc: Use devm_kzalloc() and devm_kcalloc() for private dataJyri Sarha4-46/+21
Use devm_kzalloc() and devm_kcalloc() for private data allocation at driver load time. Signed-off-by: Jyri Sarha <[email protected]> Reviewed-by: Tomi Valkeinen <[email protected]>
2016-02-25drm/tilcdc: Initialize crtc->portJyri Sarha1-0/+20
Initialize port device node pointer in the tilcdc crtc. Fixes "Falling back to first CRTC" warning from tda998x driver. The tda998x encoder driver calls drm_of_find_possible_crtcs() to initialize possible_crtcs of struct drm_encoder. The crtc->port needs to be initialized for drm_of_find_possible_crtcs() to work. Signed-off-by: Jyri Sarha <[email protected]> Reviewed-by: Tomi Valkeinen <[email protected]>
2016-02-25drm/tilcdc: Disable sync lost interrupt if it fires on every frameJyri Sarha1-1/+20
Disable the sync lost interrupt if it fires on every frame for 50 consecutive frames in a row. This is relatively sure sign of the sync lost interrupt being stuck and firing on every frame even if the display otherwise appears to work OK. Signed-off-by: Jyri Sarha <[email protected]> Reviewed-by: Tomi Valkeinen <[email protected]>
2016-02-25drm/tilcdc: Add prints on sync lost and FIFO underrun interruptsJyri Sarha2-2/+10
Add ratelimited prints on sync lost and FIFO underrun interrupts. Signed-off-by: Jyri Sarha <[email protected]> Reviewed-by: Tomi Valkeinen <[email protected]>
2016-02-25drm/tilcdc: Remove the duplicate LCDC_INT_ENABLE_SET_REG in registers[]Jyri Sarha1-2/+1
Removes the duplicate LCDC_INT_ENABLE_SET_REG-entry in registers array. Signed-off-by: Jyri Sarha <[email protected]> Reviewed-by: Tomi Valkeinen <[email protected]>
2016-02-25drm/tilcdc: Fix interrupt enable/disable code for version 2 tilcdcJyri Sarha1-5/+6
Fix interrupt enable/disable code for version 2 tilcdc. In version 2 tilcdc there is a separate register for disabling interrupts. Writing 0 to enable registers bits does not have any effect. The interrupt clear register works the same way, writing 1 to specific bit disables the interrupt and writing 0 does not have any effect. The "bug" that is fixed here does not really do any harm since the interrupts are enabled only once in the power up and disabled before power down. Signed-off-by: Jyri Sarha <[email protected]> Reviewed-by: Tomi Valkeinen <[email protected]>
2016-02-25drm/tilcdc: Do not update the next frame buffer close to vertical blankTomi Valkeinen1-8/+53
Do not update the next frame buffer close to vertical blank. This is to avoid situation when the frame changes between writing of LCDC_DMA_FB_BASE_ADDR_0_REG and LCDC_DMA_FB_CEILING_ADDR_0_REG. Signed-off-by: Tomi Valkeinen <[email protected]> [Added description to the patch] Signed-off-by: Jyri Sarha <[email protected]>
2016-02-25drm/tilcdc: Get rid of complex ping-pong mechanismTomi Valkeinen2-95/+53
Get rid of complex ping-pong mechanism and replace it with simpler single buffer flipping code. The LCDC HW appears to be designed mainly static framebuffers in mind. There are two modes of operation, either static single buffer, or ping pong double buffering with two static buffers switching back and forth. Luckily the framebuffer start address is fetched only in the beginning of the frame and changing the address after that only takes effect after the next vertical blank. The page flipping code can simply write the address of the new framebuffer and the page is flipped automatically after the next vertical blank. Using the ping pong double buffering makes the flipping code way more complex and it does not provide any benefit, so it is better to switch to single buffer operation. There is still one problem in updating the framebuffer dma address on the fly. There are two registers defining the framebuffer dma area and things may break if the dma address is fetched in while the registers are are being updated. Signed-off-by: Tomi Valkeinen <[email protected]> [Added description to the patch] Signed-off-by: Jyri Sarha <[email protected]>
2016-02-25drm/tilcdc: cleanup irq handlingTomi Valkeinen1-4/+5
Cleanup irq handling. Clear the irq status unconditionally and restructure the status bit conditions. Signed-off-by: Tomi Valkeinen <[email protected]> [Added description to the patch] Signed-off-by: Jyri Sarha <[email protected]>
2016-02-25drm/tilcdc: remove broken error handlingTomi Valkeinen1-6/+1
Remove broken error handling. The condition for handling the LCDC_SYNC_LOST and LCDC_FIFO_UNDERFLOW could never be satisfied as the LCDC_SYNC_LOST interrupt is not enabled. Also the requirement to have both LCDC_SYNC_LOST and LCDC_FIFO_UNDERFLOW fired at once before handling the error looks weird. Signed-off-by: Tomi Valkeinen <[email protected]> [Added description to the patch] Signed-off-by: Jyri Sarha <[email protected]>
2016-02-25drm/tilcdc: split reset to a separate functionTomi Valkeinen1-7/+14
Split reset to a separate function and use usleep_range(250, 1000) instead of msleep(1) to to keep the reset bit on long enough. Signed-off-by: Tomi Valkeinen <[email protected]> [Added description to the patch, changed mdelay(500) to usleep_range(250, 1000)] Signed-off-by: Jyri Sarha <[email protected]>
2016-02-25drm/tilcdc: disable crtc on unloadTomi Valkeinen1-0/+2
Disable crtc on unload. Call tilcdc_crtc_dpms() with DRM_MODE_DPMS_OFF in the beginning of unload function. Signed-off-by: Tomi Valkeinen <[email protected]> [Added description to the patch] Signed-off-by: Jyri Sarha <[email protected]>
2016-02-25drm/tilcdc: cleanup runtime PM handlingTomi Valkeinen2-9/+11
Cleanup runtime PM handling. Before the patch the usage of pm_runtime calls was inconsistent and hard to follow. After the update the pm_runtime calls are removed from set_scanout() and called around major operations that access the HW. After the patch the DPMS code does not have pm_runtime_forbid/allow calls any more and pm_runtime_irq_safe() is not set anymore. Signed-off-by: Tomi Valkeinen <[email protected]> [Added description to the patch] Signed-off-by: Jyri Sarha <[email protected]>
2016-02-25drm/tilcdc: Allocate register storage based on the actual number registersJyri Sarha2-2/+21
Allocate suspend/resume register storage based on the actual number registers the driver is aware of. The static allocation for register storage had fallen behind badly. Reported-by: Michael Bode <[email protected]> Signed-off-by: Jyri Sarha <[email protected]> Reviewed-by: Tomi Valkeinen <[email protected]>
2016-02-25drm/tilcdc: fix build error when !CONFIG_CPU_FREQGrygorii Strashko1-1/+1
Fix build error when !CONFIG_CPU_FREQ drivers/gpu/drm/tilcdc/tilcdc_drv.c: In function 'tilcdc_load': drivers/gpu/drm/tilcdc/tilcdc_drv.c:327:1: error: label 'fail_put_clk' defined but not used [-Werror=unused-label] fail_put_clk: ^ Signed-off-by: Grygorii Strashko <[email protected]> Signed-off-by: Jyri Sarha <[email protected]> Reviewed-by: Tomi Valkeinen <[email protected]>
2016-02-25drm/tilcdc: Implement dma-buf support for tilcdcJyri Sarha1-1/+12
There is nothing special about tilcdc HW when the video memory is concerned. Just using the standard drm helpers for implementation is enough. Signed-off-by: Jyri Sarha <[email protected]> Reviewed-by: Tomi Valkeinen <[email protected]>
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