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2019-10-16drm/komeda: Adds layer horizontal input size limitation check for D71Lowry Li (Arm Technology China)1-0/+49
Adds maximum line size check according to the AFBC decoder limitation and special Line size limitation(2046) for format: YUV420_10BIT and X0L2. Signed-off-by: Lowry Li (Arm Technology China) <[email protected]> Reviewed-by: Liviu Dudau <[email protected]> Signed-off-by: james qian wang (Arm Technology China) <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-10-16drm/komeda: Add line size supportLowry Li (Arm Technology China)4-15/+70
On D71, we are using the global line size. From D32, every component have a line size register to indicate the fifo size. So this patch is to set line size support and do the line size check. Signed-off-by: Lowry Li (Arm Technology China) <[email protected]> Reviewed-by: Liviu Dudau <[email protected]> Reviewed-by: James Qian Wang (Arm Technology China) <[email protected]> Signed-off-by: james qian wang (Arm Technology China) <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-10-16drm/vboxvideo: Replace struct vram_framebuffer with generic implemenationThomas Zimmermann3-115/+8
The vboxvideo driver's struct vram_framebuffer stores a DRM framebuffer with an assiciated GEM object. This functionality is also provided by generic code. Switch vboxvideo over. Signed-off-by: Thomas Zimmermann <[email protected]> Acked-by: Sam Ravnborg <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-10-16drm/vboxvideo: Switch to drm_atomic_helper_dirty_fb()Thomas Zimmermann3-63/+35
The vboxvideo driver provides struct drm_framebuffer_funcs.dirty_fb from its own implementation. Switch over to drm_atomic_helper_dirty_fb() and handle screen updates in the primary plane's atomic_update function. With dirty_fb out of the way, we can further replace struct vbox_frammebuffer with generic code. Signed-off-by: Thomas Zimmermann <[email protected]> Acked-by: Sam Ravnborg <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-10-16drm/vboxvideo: Switch to generic fbdev emulationThomas Zimmermann5-169/+6
There's nothing special about vboxvideo's fbdev emulation that is not provided by the generic implementation. Switch over and remove the driver's code. Signed-off-by: Thomas Zimmermann <[email protected]> Acked-by: Sam Ravnborg <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-10-16drm: rcar-du: lvds: Add r8a774b1 supportBiju Das1-0/+1
The LVDS encoders on RZ/G2N SoC is similar to R-Car M3-N. Add support for RZ/G2N (R8A774B1) SoC to the LVDS encoder driver. Signed-off-by: Biju Das <[email protected]> Reviewed-by: Laurent Pinchart <[email protected]> Signed-off-by: Laurent Pinchart <[email protected]>
2019-10-16drm: rcar-du: Add R8A774B1 supportBiju Das1-0/+30
Add support for the R8A774B1 DU (which is very similar to the R8A77965 DU except that it lacks TCON and CMM); it has one RGB output, one LVDS output and one HDMI output. Signed-off-by: Biju Das <[email protected]> Reviewed-by: Laurent Pinchart <[email protected]> Signed-off-by: Laurent Pinchart <[email protected]>
2019-10-16drm: rcar_lvds: Fix color mismatches on R-Car H2 ES2.0 and laterGeert Uytterhoeven1-7/+21
Commit 5cca30ebe089be23 ("drm/rcar-du: Add LVDS_LANES quirk") states that LVDS lanes 1 and 3 are inverted on R-Car H2 ES1 only, and that the problem has been fixed in newer revisions. However, the code didn't take into account the actual hardware revision, thus applying the quirk also on newer hardware revisions, causing green color reversals. Fix this by applying the quirk when running on R-Car H2 ES1.x only. Reported-by: Yoshihiro Shimoda <[email protected]> Fixes: 5cca30ebe089be23 ("drm/rcar-du: Add LVDS_LANES quirk") Signed-off-by: Geert Uytterhoeven <[email protected]> Tested-by: Yoshihiro Shimoda <[email protected]> Reviewed-by: Ulrich Hecht <[email protected]> Reviewed-by: Laurent Pinchart <[email protected]> Signed-off-by: Laurent Pinchart <[email protected]>
2019-10-16drm: rcar-du: kms: Expand comment in vsps parsing routineJacopo Mondi1-1/+5
Expand comment in the 'vsps' parsing routine to specify the LIF channel index defaults to 0 in case the second cell of the property is not specified to remain compatible with older DT bindings. Reviewed-by: Laurent Pinchart <[email protected]> Signed-off-by: Jacopo Mondi <[email protected]> Signed-off-by: Laurent Pinchart <[email protected]>
2019-10-15drm/amd/display: add NULL checks for clock manager pointerAhzo2-3/+4
This fixes kernel NULL pointer dereferences on shutdown: RIP: 0010:build_audio_output.isra.0+0x97/0x110 [amdgpu] RIP: 0010:enable_link_dp+0x186/0x300 [amdgpu] Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Ahzo <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-15drm/amdgpu: enable BACO reset for SMU7 based dGPUs (v2)Alex Deucher4-10/+128
Use BACO to reset the GPU if supported on SMU7 based dGPUs. v2: don't use baco on CI parts Reviewed-by: Evan Quan <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-15drm/amdgpu/powerplay: wire up BACO to powerplay API for smu7Alex Deucher1-0/+4
Wire up the powerplay callbacks for for BACO for smu7 devices. Reviewed-by: Evan Quan <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-15drm/amdgpu/powerplay: split out common smu7 BACO codeAlex Deucher11-149/+132
Several of the BACO functions are common across smu7-based asics. Split the common code out. Reviewed-by: Evan Quan <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-15drm/amdgpu/powerplay: add support for BACO on CIAlex Deucher3-1/+261
This adds BACO support for CI asics. Reviewed-by: Evan Quan <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-15drm/amdgpu/powerplay: add support for BACO on FijiAlex Deucher3-1/+261
This adds BACO support for Fiji asics. Reviewed-by: Evan Quan <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-15drm/amdgpu/powerplay: add support for BACO on VegaMAlex Deucher1-3/+39
This adds BACO support for VegaM asics. Reviewed-by: Evan Quan <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-15drm/amdgpu/powerplay: add support for BACO on polarisAlex Deucher3-1/+251
This adds BACO support for Polaris asics. Reviewed-by: Evan Quan <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-15drm/amdgpu/powerplay: add support for BACO on IcelandAlex Deucher1-6/+48
This adds BACO support for Iceland asics. Reviewed-by: Evan Quan <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-15drm/amdgpu/powerplay: add support for BACO on tongaAlex Deucher3-1/+254
This adds BACO support for Tonga. Reviewed-by: Evan Quan <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-15drm/amdgpu/powerplay: add core support for pre-SOC15 bacoAlex Deucher2-0/+32
This adds core support for BACO on pre-vega asics. Reviewed-by: Evan Quan <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-15drm/amdgpu: add new SMU 7.1.3 registers for BACOAlex Deucher2-0/+3
Reviewed-by: Evan Quan <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-15drm/amdgpu: add new SMU 7.1.2 registers for BACOAlex Deucher2-0/+3
Reviewed-by: Evan Quan <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-15drm/amdgpu: add new SMU 7.0.1 registers for BACOAlex Deucher2-0/+3
Reviewed-by: Evan Quan <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-15drm/amdgpu: add new BIF 5.0 register for BACOAlex Deucher2-0/+3
Reviewed-by: Evan Quan <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-15drm/amdgpu: add new BIF 4.1 register for BACOAlex Deucher2-0/+3
Reviewed-by: Evan Quan <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-15drm/amdgpu/soc15: add support for baco reset with swSMUAlex Deucher1-20/+35
Add support for vega20 when the swSMU path is used. Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-15drm/amdgpu: remove in_baco_reset hackAlex Deucher3-6/+2
It was a vega20 specific hack. Check if we are in reset and what reset method we are using. Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-15drm/amdgpu: simplify ATPX detectionAlex Deucher1-11/+1
Use the base class rather than the specific class and drop the second loop. Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-15drm/amdgpu: move gpu reset out of amdgpu_device_suspendAlex Deucher2-5/+6
Move it into the caller. There are cases were we don't want it. We need it for hibernation, but we don't need it for runtime pm, so drop it for runtime pm. Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-15drm/amdgpu: move pci_save_state into suspend pathAlex Deucher1-1/+1
for amdgpu_device_suspend. This follows the logic in the resume path. Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-15Revert "drm/radeon: Fix EEH during kexec"Alex Deucher1-8/+0
This reverts commit 6f7fe9a93e6c09bf988c5059403f5f88e17e21e6. This breaks some boards. Maybe just enable this on PPC for now? Bug: https://bugzilla.kernel.org/show_bug.cgi?id=205147 Signed-off-by: Alex Deucher <[email protected]>
2019-10-15drm/amdgpu/display: fix build error casused by CONFIG_DRM_AMD_DC_DCN2_1Hersen Wu1-3/+0
when CONFIG_DRM_AMD_DC_DCN2_1 is not enable in .config, there is build error. struct dpm_clocks shoud not be guarded. Signed-off-by: Hersen Wu <[email protected]> Reviewed-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-15drm/amdgpu/display: hook renoir dc to pplib funcsHersen Wu2-1/+94
enable dc get dmp clock table and set dcn watermarks via pplib. Signed-off-by: Hersen Wu <[email protected]> Reviewed-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-15dmr/amdgpu: Fix crash on SRIOV for ERREVENT_ATHUB_INTERRUPT interrupt.Andrey Grodzovsky1-0/+6
Ignre the ERREVENT_ATHUB_INTERRUPT for systems without RAS. Signed-off-by: Andrey Grodzovsky <[email protected]> Reviewed-and-tested-by: Jack Zhang <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-15drm/amdgpu: user pages array memory leak fixPhilip Yang1-6/+2
user_pages array should always be freed after validation regardless if user pages are changed after bo is created because with HMM change parse bo always allocate user pages array to get user pages for userptr bo. v2: remove unused local variable and amend commit v3: add back get user pages in gem_userptr_ioctl, to detect application bug where an userptr VMA is not ananymous memory and reject it. Bugzilla: https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1844962 Signed-off-by: Philip Yang <[email protected]> Tested-by: Joe Barnett <[email protected]> Reviewed-by: Christian König <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-15drm/amdgpu/powerplay: add renoir funcs to support dcHersen Wu5-61/+141
there are two paths for renoir dc access smu. one dc access smu directly using bios smc interface: set disply, dprefclk, etc. another goes through pplib for get dpm clock table and set watermmark. Signed-off-by: Hersen Wu <[email protected]> Reviewed-by: Kevin Wang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-15drm/amd/powerplay: enable Arcturus runtime VCN dpm on/offEvan Quan2-0/+37
Enable runtime VCN DPM on/off on Arcturus. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-15drm/amd/powerplay: bug fix for pcie parameters overrideKenneth Feng5-44/+98
Bug fix for pcie paramerers override on swsmu. Below is a scenario to have this problem. pptable definition on pcie dpm: 0 -> pcie gen speed:1, pcie lanes: *16 1 -> pcie gen speed:4, pcie lanes: *16 Then if we have a system only have the capbility: pcie gen speed: 3, pcie lanes: *8, we will override dpm 1 to pcie gen speed 3, pcie lanes *8. But the code skips the dpm 0 configuration. So the real pcie dpm parameters are: 0 -> pcie gen speed:1, pcie lanes: *16 1 -> pcie gen speed:3, pcie lanes: *8 Then the wrong pcie lanes will be toggled. Signed-off-by: Kenneth Feng <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-15drm/amdgpu: Fix tdr3 could hang with slow compute issueEmily Deng2-3/+8
When index is 1, need to set compute ring timeout for sriov and passthrough. Signed-off-by: Emily Deng <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-15drm/amdgpu: fix potential VM faultsChristian König1-1/+2
When we allocate new page tables under memory pressure we should not evict old ones. Signed-off-by: Christian König <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-15drm/amdgpu: fix error handling in amdgpu_bo_list_createChristian König1-1/+6
We need to drop normal and userptr BOs separately. Signed-off-by: Christian König <[email protected]> Acked-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-15drm/amdgpu: add RAS support for VML2 and ATCL2Dennis Li1-0/+167
v1: Add codes to query the EDC count of VML2 & ATCL2 v2: Rename VML2/ATCL2 registers and drop their mask define v3: Add back the ECC mask for VML2 registers Signed-off-by: Dennis Li <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-15drm/amd/include: add register define for VML2 and ATCL2Dennis Li2-4/+32
Add VML2 and ATCL2 ECC registers to support VEGA20 RAS Signed-off-by: Dennis Li <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-15drm/amdgpu: change to query the actual EDC counterDennis Li2-325/+498
For the potential request in the future, change to query the actual EDC counter. Signed-off-by: Dennis Li <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Reviewed-by: Tao Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-15drm/amd/powerplay: add BACO platformCaps for VEGA20Le Ma1-0/+3
BACO reset is needed for RAS recovery. Signed-off-by: Le Ma <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-15drm/amd/powerplay: send EnterBaco msg with argument as RAS recovery flagLe Ma1-3/+8
1 indicates RAS recovery flag in SMU FW. Signed-off-by: Le Ma <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-15drm/amd/powerplay: avoid disabling ECC if RAS is enabled for VEGA20Le Ma1-5/+7
Program THM_BACO_CNTL.SOC_DOMAIN_IDLE=1 will tell VBIOS to disable ECC when BACO exit. This can save BACO exit time by PSP on none-ECC SKU. Drop the setting for ECC supported SKU. Signed-off-by: Le Ma <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-15drm/amdgpu/soc15: disable doorbell interrupt as part of BACO entry sequenceLe Ma3-0/+19
Workaround to make RAS recovery work in BACO reset. Signed-off-by: Le Ma <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-15drm/amdgpu: Bail earlier when amdgpu.cik_/si_support is not set to 1Hans de Goede2-35/+35
Bail from the pci_driver probe function instead of from the drm_driver load function. This avoid /dev/dri/card0 temporarily getting registered and then unregistered again, sending unwanted add / remove udev events to userspace. Specifically this avoids triggering the (userspace) bug fixed by this plymouth merge-request: https://gitlab.freedesktop.org/plymouth/plymouth/merge_requests/59 Note that despite that being a userspace bug, not sending unnecessary udev events is a good idea in general. BugLink: https://bugzilla.redhat.com/show_bug.cgi?id=1490490 Reviewed-by: Daniel Vetter <[email protected]> Signed-off-by: Hans de Goede <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-10-15drm/amdgpu/display: clean up dcn2*_pp_smu functionsAlex Deucher3-6/+7
Use the dcn21 functions in dcn21_resource.c and make the dcn20 functions static since they are only used in dcn20_resource now. Cc: [email protected] Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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