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path: root/drivers/gpu/drm
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2017-10-19drm/amdgpu: reserve root PD while releasing itChristian König1-2/+11
Otherwise somebody could try to evict it at the same time and try to use half torn down structures. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-and-Tested-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/ttm: fix the fix for huge compound pagesChristian König1-5/+16
We don't use compound pages at the moment. Take this into account when freeing them. Signed-off-by: Christian König <christian.koenig@amd.comd> Reviewed-and-Tested-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/amdgpu: bump version for vram lost counter query (v2)Alex Deucher1-1/+2
v2: vram -> VRAM in comment Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/amdgpu: minor CS optimizationChristian König1-18/+19
We only need to loop over all IBs for old UVD/VCE command stream patching. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/amd/sched: fix job tear down order v2Christian König1-3/+2
Move the trace before we signal the scheduler fence and drop the scheduler fence reference directly before we free the job. v2: keep extra s_fence reference Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Liu, Monk <Monk.Liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/amdgpu: Add amdgpu_find_mm_node()Harish Kasiviswanathan1-22/+27
Replace some commonly repeated code with a function. v2: Use amdgpu_find_mm_node() in amdgpu_ttm_io_mem_pfn() Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/amdgpu: Refactor amdgpu_move_blitHarish Kasiviswanathan2-49/+132
Add more generic function amdgpu_copy_ttm_mem_to_mem() that supports arbitrary copy size, offsets and two BOs (source & dest.). This is useful for KFD Cross Memory Attach feature where data needs to be copied from BOs from different processes v2: Add struct amdgpu_copy_mem and changed amdgpu_copy_ttm_mem_to_mem() function parameters to use the struct v3: Minor function name change Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/amdgpu: Fix extra call to amdgpu_ctx_put.Andrey Grodzovsky1-4/+2
In amdgpu_cs_parser_init() in case of error handling amdgpu_ctx_put() is called without setting p->ctx to NULL after that, later amdgpu_cs_parser_fini() also calls amdgpu_ctx_put() again and mess up the reference count. Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/ttm: Fix unused variables with huge page supportTom St Denis1-1/+8
Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/amdgpu: add VRAM lost queryChristian König1-0/+3
Allows userspace to figure out if VRAM was lost. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/amdgpu: set -ECANCELED when dropping jobsChristian König2-1/+7
And return from the wait functions the fence error code. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/amdgpu: move the VRAM lost counter per contextChristian König4-24/+8
Instead of per device track the VRAM lost per context and return ECANCELED instead of ENODEV. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/amdgpu: keep copy of VRAM lost counter in jobChristian König3-6/+10
Instead of reading the current counter from fpriv. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/amdgpu: partial revert VRAM lost handling v2Christian König3-20/+10
Keep blocking the CS, but revert everything else. Mapping BOs and info IOCTL are harmless and can still happen even when VRAM content ist lost. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/ttm: add transparent huge page support for wc or uc allocations v2Christian König1-27/+109
Add a new huge page pool and try to allocate from it when it makes sense. v2: avoid compound pages for now Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/ttm: move more logic into ttm_page_pool_get_pagesChristian König1-46/+52
Make it easier to add huge page pool. Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/ttm: add transparent huge page support for cached allocations v2Christian König1-8/+42
Try to allocate huge pages when it makes sense. v2: avoid compound pages for now Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Felix Kuehling <Felix.Kuehling@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/ttm: don't use compound pages for nowChristian König1-0/+1
We need to figure out first how to correctly map them into the CPU page tables. bug: https://bugs.freedesktop.org/show_bug.cgi?id=103138 Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/amdgpu: correct reference clock value on vega10Ken Wang1-4/+1
Old value from bringup was wrong. Cc: stable@vger.kernel.org Signed-off-by: Ken Wang <Ken.Wang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/amdgpu: SR-IOV data exchange between PF&VFHorace Chen4-0/+262
SR-IOV need to exchange some data between PF&VF through shared VRAM PF will copy some necessary firmware and information to the shared VRAM. It also requires some information from VF. PF will send a key through mailbox2 to help guest calculate checksum so that it can verify whether the data is correct. So check the data on the specified offset of the shared VRAM, if the checksum is right, read values from it and write some VF information next to the data from PF. Signed-off-by: Horace Chen <horace.chen@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/amdgpu: Move old fence waiting before reservation lock is aquired v2Andrey Grodzovsky3-10/+34
Helps avoiding deadlock during GPU reset. Added mutex to amdgpu_ctx to preserve order of fences on a ring. v2: Put waiting logic in a function in a seperate function in amdgpu_ctx.c Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/amdgpu: Refactor amdgpu_cs_ib_vm_chunk and amdgpu_cs_ib_fill.Andrey Grodzovsky1-51/+61
This enables old fence waiting before reservation lock is aquired which in turn is part of a bigger solution to deadlock happening when gpu reset with VRAM recovery accures during intensive rendering. Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/amdgpu: make function uvd_v6_0_enc_get_destroy_msg staticColin Ian King1-2/+3
The function uvd_v6_0_enc_get_destroy_msg is local to the source and does not need to be in global scope, so make it static. Cleans up sparse warning: symbol 'uvd_v6_0_enc_get_destroy_msg' was not declared. Should it be static? Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/amd/pp: remove polaris10_smc/smumgr split.Rex Zhu4-2400/+2226
move functions in polaris_smc.c to polaris10_smumgr.c and make all functions in polaris10_smumgr.c static. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/amd/pp: remove tonga_smc/smumgr split.Rex Zhu5-3344/+3128
move functions in tonga_smc.c to tonga_smumgr.c and make all functions in tonga_smumgr.c static. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/amd/pp: remove iceland_smc/smumgr split.Rex Zhu4-2629/+2480
move functions in iceland_smc.c to iceland_smumgr.c and make all functions in iceland_smumgr.c static. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/amd/pp: remove fiji_smc/smumgr split.Rex Zhu5-2558/+2381
make all functions in fiji_smumgr.c static and exported by pp_smumgr_func table. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/amd/pp: rename ci_smc.c to ci_smumgr.cRex Zhu2-1/+1
for consistency. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/amdgpu: refine code delete duplicated error handlingRex Zhu1-2/+2
in function amdgpu_ucode_init_bo, when failed, it will set load_type to AMDGPU_FW_LOAD_DIRECT. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/amd/pp: move common function to smu7_smumgr.cRex Zhu5-2094/+49
fiji and polaris can share same setup_pwr_virus function. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/amd/pp: implement function notify_cac_buffer_info on VIRex Zhu8-0/+125
Used for smu power logging. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/amd/pp: implement function notify_cac_buffer_info on VegaRex Zhu1-0/+28
Used for smu power logging. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/amd/pp: add new function point in hwmgr.Rex Zhu1-0/+6
used for notify SMU the allocated buffer address. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/amd/pp: export new smu messages for vega10Rex Zhu1-0/+2
New messages for smu power logging. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/amd/powerplay: get the temperature on CZSatyajit Sahu1-0/+1
Setting the function pointer to the get the temperature on CZ. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Satyajit Sahu <satyajit.sahu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/amdgpu: bump version for new AMDGPU_SCHED ioctlAlex Deucher1-1/+2
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/amdgpu: rename context priority levelsAndres Rodriguez1-4/+4
Don't leak implementation details about how each priority behaves to usermode. This allows greater flexibility in the future. Squash into c2636dc53abd8269a0930bccd564f2f195dba729 Signed-off-by: Andres Rodriguez <andresx7@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-19drm/vc4: Add the DRM_IOCTL_VC4_GEM_MADVISE ioctlBoris Brezillon5-15/+488
This ioctl will allow us to purge inactive userspace buffers when the system is running out of contiguous memory. For now, the purge logic is rather dumb in that it does not try to release only the amount of BO needed to meet the last CMA alloc request but instead purges all objects placed in the purgeable pool as soon as we experience a CMA allocation failure. Note that the in-kernel BO cache is always purged before the purgeable cache because those objects are known to be unused while objects marked as purgeable by a userspace application/library might have to be restored when they are marked back as unpurgeable, which can be expensive. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Eric Anholt <eric@anholt.net> Reviewed-by: Eric Anholt <eric@anholt.net> Link: https://patchwork.freedesktop.org/patch/msgid/20171019125748.3152-1-boris.brezillon@free-electrons.com
2017-10-19drm/panel: simple: add Toshiba LT089AC19000Lucas Stach1-0/+27
Only exposes a single mode and not a complete display timing, as the datasheet is rather vague about the minimum/maximum values. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://patchwork.freedesktop.org/patch/msgid/20171018172240.8772-1-l.stach@pengutronix.de
2017-10-18drm/panel: simple: add delays for Innolux AT043TN24Philipp Zabel1-0/+4
The delays between video data and backlight enable and between backlight disable and end of video data are given as >= 160 ms in the datasheet. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Tested-by: Marco Franchi <marco.franchi@nxp.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://patchwork.freedesktop.org/patch/msgid/20171011125958.23064-3-p.zabel@pengutronix.de
2017-10-18drm/panel: simple: add bus flags for Innolux AT043TN24Philipp Zabel1-0/+1
For LCD interface controllers that support configuring polarity of pixel clock and data enable signal, specify bus flags in the panel descriptor. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Tested-by: Marco Franchi <marco.franchi@nxp.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://patchwork.freedesktop.org/patch/msgid/20171011125958.23064-2-p.zabel@pengutronix.de
2017-10-18drm/panel: simple: fix vertical timings for Innolux AT043TN24Philipp Zabel1-2/+2
The vsync length should be 10 lines, as specified in the data sheet. This gets the actual refresh rate closer to nominal 60 Hz given the 9 MHz pixel clock. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Tested-by: Marco Franchi <marco.franchi@nxp.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://patchwork.freedesktop.org/patch/msgid/20171011125958.23064-1-p.zabel@pengutronix.de
2017-10-18drm/atomic-helper: check that drivers call drm_crtc_vblank_offDaniel Vetter1-0/+9
At least when they have vblank support they need to call this, or the vblank core will happily call into their crtc->enable_vblank callback even when the crtc is off. Which leads to a boom when the clocks are off on most hardware (besides the inevitable confusion in the book-keeping). The consistency checks in drm_vblank.c will then make sure that vblank_off/on calls are balanced, and if drivers forget to re-enable it all the commits will stall, so I think we're covered. It'd be nice to be able to place this check outside of commit helpers, but tha's not really possible (due to nonblocking commits and all that). Placing it into atomic helpers should at least cover most drivers. Also note that vblank support is still optional (for virtual drivers, which tend to not have this), check for that. v2: Fixup the handling for vblank_put (Rob). Cc: Rob Clark <robdclark@gmail.com> Tested-by: Rob Clark <robdclark@gmail.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20171017152714.6849-1-daniel.vetter@ffwll.ch
2017-10-18drm/bridge: adv7511: Fix a use after freeDan Carpenter1-2/+2
We free "edid", then use it again on the next line. Fixes: 3b1b975003e4 ("drm: adv7511/33: add HDMI CEC support") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Archit Taneja <architt@codeaurora.org> Link: https://patchwork.freedesktop.org/patch/msgid/20171017204343.zctliubjkq7imudi@mwanda
2017-10-17drm/sun4i: Add support for A20 display pipeline componentsJonathan Liu3-0/+18
The A20 display pipeline has 2 frontends, 2 backends, and 2 TCONs. This patch adds support (or a compatible string in the frontend's case) for these components. The TCONs support directly outputting to CPU/RGB/LVDS LCD panels, or it can output to HDMI via an on-chip HDMI controller, or CVBS/YPbPr/VGA signals via on-chip TV encoders. These additional encoders are not covered in this patch. Signed-off-by: Jonathan Liu <net147@gmail.com> [wens@csie.org: Expand commit message] Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Link: https://patchwork.freedesktop.org/patch/msgid/20171017121807.2994-6-wens@csie.org
2017-10-17drm/sun4i: Add support for A10 display pipeline componentsChen-Yu Tsai2-1/+11
The A10 display pipeline has 2 frontends, 2 backends, and 2 TCONs. This patch adds support (or a compatible string in the frontend's case) for these components. The TCONs support directly outputting to CPU/RGB/LVDS LCD panels, or it can output to HDMI via an on-chip HDMI controller, or CVBS/YPbPr/VGA signals via on-chip TV encoders. These additional encoders are not covered in this patch. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Link: https://patchwork.freedesktop.org/patch/msgid/20171017121807.2994-5-wens@csie.org
2017-10-17drm/sun4i: hdmi: Support HDMI controller on A10Chen-Yu Tsai1-0/+53
The HDMI controller in the A10 SoC is the same as the one currently supported in the A10s. It has slightly different setup parameters. Since these parameters are not thoroughly understood, we add support for this variant by copying these parameters verbatim. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Link: https://patchwork.freedesktop.org/patch/msgid/20171017121807.2994-4-wens@csie.org
2017-10-17drm/sun4i: tcon: Add support for A10 TCONJonathan Liu2-1/+32
The A10 has two TCONs that are similar to the ones found on other SoCs. Like the A31, TCON0 has a register used to mux the TCON outputs to the downstream encoders. The bit fields are slightly different. Signed-off-by: Jonathan Liu <net147@gmail.com> [wens@csie.org: Reworked for A10 and fixed up commit message] Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Link: https://patchwork.freedesktop.org/patch/msgid/20171017121807.2994-3-wens@csie.org
2017-10-17drm/sun4i: backend: Support output muxingChen-Yu Tsai2-4/+51
The backend has a mux to select the destination of the data to output to. It can select the TCON or the frontends. On the A20, it includes an option to output to the second TCON. This is not documented in the user manual, but the vendor kernel uses it nevertheless, so the second backend outputs to the second TCON. Although the muxing can be changed on the fly, DRM needs to be able to group a bunch of layers such that they get switched to another crtc together. This is because the display backend does the layer compositing, while the TCON generates the display timings. This constraint is not supported by DRM. Here we simply pair up backends and TCONs with the same ID. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Link: https://patchwork.freedesktop.org/patch/msgid/20171017121807.2994-2-wens@csie.org
2017-10-17drm/sun4i: tcon: Move out the tcon0 common setupMaxime Ripard1-10/+16
Some channel0 setup has to be done, no matter what the output interface is (RGB, CPU, LVDS). Move that code into a common function in order to avoid duplication. Reviewed-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Link: https://patchwork.freedesktop.org/patch/183100/
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