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[Why]
DCN32 uses ABM register definitions in dcn32_resource.h, remove
duplicate from dce_abm.h to avoid confusion.
Reviewed-by: Dillon Varone <[email protected]>
Acked-by: Hersen Wu <[email protected]>
Signed-off-by: Joshua Aberback <[email protected]>
Signed-off-by: Hersen Wu <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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For all the components that participate in DCN architecture, there is a
header in the dc/inch/hw. For some reason, OPTC broke this pattern and
added all the primary functions/structs associated with that in the
dcn10_optc.h file. For consistency's sake, this commit introduces a new
optc.h file and extracts the code from dcn10_optc to this new file.
Reviewed-by: Hamza Mahfooz <[email protected]>
Acked-by: Hersen Wu <[email protected]>
Signed-off-by: Rodrigo Siqueira <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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[why]
Doing a mode timing change causes a hang when OTG is not disabled.
[how]
Add link_enc null check in disable_otg_wa to cover this case.
Reviewed-by: Nicholas Kazlauskas <[email protected]>
Acked-by: Hersen Wu <[email protected]>
Signed-off-by: Ovidiu Bunea <[email protected]>
Signed-off-by: Hersen Wu <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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[Why]
Current Desync IRQ handler will have some potential do not hit the
desync error case. We change to check both desync error HPD and DPCD.
Signed-off-by: Dennis Chan <[email protected]>
Acked-by: Hersen Wu <[email protected]>
Reviewed-by: Robin Chen <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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- Increase number of bits for IPS boot option
Reviewed-by: Aric Cyr <[email protected]>
Acked-by: Hersen Wu <[email protected]>
Signed-off-by: Anthony Koo <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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This version brings along following fixes:
Update test link rate DPCD bit field to match spec
Enable RCO options for dcn35
Add missing dml2 init value for dcn35
Enable DCN clock gating
DCN35 Disable cm power optimization
Allow 16 max_slices for DP2 DSC
Fix OTG disable workaround logic
Enable more IPS options
Fix FRL assertion on boot
Fix missing blendTF programming
Update DP HPO MSA with colorimetry from test request
Fix handling duplicate planes on one stream
Acked-by: Hersen Wu <[email protected]>
Signed-off-by: Aric Cyr <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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[Why]
For lighting up, some dml2 params needs to be initialized.
One of them escaped initial patch under:
"drm/amd/display: Add DCN35 DML2 support"
[How]
Add missing initialization.
Fixes: 115009d11ccf ("drm/amd/display: Add DCN35 DML2 support")
Reviewed-by: Harry Wentland <[email protected]>
Acked-by: Hersen Wu <[email protected]>
Signed-off-by: Roman Li <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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[Why]
DENTIST was hanging when performing DISPCLK update with OTG enabled, as
OTG disable workaround was not executing.
[How]
Workaround was checking against current_state before running, but when
called from optimize_bandwidth (safe_to_lower), we should be checking
against context instead.
Reviewed-by: Nicholas Kazlauskas <[email protected]>
Acked-by: Hersen Wu <[email protected]>
Signed-off-by: Taimur Hassan <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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[Why]
For Replay, if we receive HPD, it doesn’t need to reboot the display.
We don’t need to return anything exactly.
[How]
Return nothing just because we don’t need to reboot the display.
Signed-off-by: ChunTao Tso <[email protected]>
Acked-by: Hersen Wu <[email protected]>
Reviewed-by: Jerry Zuo <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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[why]
It's useful to disable the recovery mechanism when debugging replay
desync errors.
Signed-off-by: Dennis Chan <[email protected]>
Acked-by: Hersen Wu <[email protected]>
Reviewed-by: Robin Chen <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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[WHY & HOW]
Enabling SCE after boot up will cause color distortion.
Reviewed-by: Ovidiu Bunea <[email protected]>
Acked-by: Hersen Wu <[email protected]>
Signed-off-by: Yihan Zhu <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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[Why]
Some DP link layer tests request a different colorimetry than the
default one that is used. Currently, our test automation logic does not
update the MSA with the test request value for DP HPO case.
[How]
Update HPO MSA colorimetry with test automation request value.
Reviewed-by: Wenjing Liu <[email protected]>
Acked-by: Hersen Wu <[email protected]>
Signed-off-by: George Shen <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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[Why]
An SCR was made to the DP2.0 spec that updated the bit field definition
for UHBR13.5 in the test link rate DPCD register.
[How]
Add new translation to match the SCR update. Keep old translation for
backwards compatibility.
Reviewed-by: Wenjing Liu <[email protected]>
Acked-by: Hersen Wu <[email protected]>
Signed-off-by: George Shen <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Enable 12 and 16 max_slices for DP2 DSC
Reviewed-by: Alvin Lee <[email protected]>
Acked-by: Hersen Wu <[email protected]>
Signed-off-by: Fangzhi Zuo <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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[why]
To help isolate static screen and
video playback tests, we want to enable
an IPS option to allow IPS only on D3 cycle.
[how]
Add DISABLE_DYNAMIC and DISABLE_ALL
IPS disable flags for user control.
Reviewed-by: Jun Lei <[email protected]>
Acked-by: Hersen Wu <[email protected]>
Signed-off-by: Sung Joon Kim <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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[Why & How]
Enable root clock optimization options for dcn35
for power savings
Reviewed-by: Nicholas Kazlauskas <[email protected]>
Acked-by: Hersen Wu <[email protected]>
Signed-off-by: Daniel Miess <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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[why]
Make sure to ungate the clocks on boot
so programming sequence is done successfully.
[how]
Move the ungate logic after bios init.
Reviewed-by: Xi (Alex) Liu <[email protected]>
Acked-by: Hersen Wu <[email protected]>
Signed-off-by: Sung Joon Kim <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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[Why]
When MPO surface pixel format is not ARGB8888, fast update can miss
programming blendTF.
[How]
Set the gamma_change update flag on blend_tf change.
Reviewed-by: Aric Cyr <[email protected]>
Acked-by: Hersen Wu <[email protected]>
Signed-off-by: Ilya Bakoulin <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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This version brings along following fixes:
On boot disable domain22 force power on
decouple dmcub execution to reduce lock granularity
Enable fast update on blendTF change
Fix blend LUT programming
Program plane color setting correctly
amend HPD handler for Replay
Avoid NULL dereference of timing generator
Acked-by: Hersen Wu <[email protected]>
Signed-off-by: Aric Cyr <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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[Why]
On some systems dmub commands run at high IRQ, so long running
commands will block other interrupts.
[How]
Decouple wait_for_idle from dmcub queue/execute/wait.
Reviewed-by: Josip Pavic <[email protected]>
Acked-by: Hersen Wu <[email protected]>
Signed-off-by: JinZe.Xu <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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- Minor formatting changes
- Update defines to match the bit width of the field it is used for
- Add new boot up bits to control HW sub block regions power
down
Reviewed-by: Aric Cyr <[email protected]>
Acked-by: Hersen Wu <[email protected]>
Signed-off-by: Anthony Koo <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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[Why]
HDCP2 enablement fails when domain22 is set to force
power on
[How]
Disable force power on for domain22 on startup
Reviewed-by: Nicholas Kazlauskas <[email protected]>
Acked-by: Hersen Wu <[email protected]>
Signed-off-by: Daniel Miess <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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The purpose of this patch is to disable XNACK or set XNACK OFF mode
on SRIOV platform which doesn't support it.
This will prevent user-space application to fail or result into
unexpected behaviour whenever the application need to run test-case
in XNACK ON mode.
Signed-off-by: Surbhi Kakarya <[email protected]>
Reviewed-by: Shaoyun Liu <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Fix below compiler warning:
intel_tc.c:1879:11: error: ‘%d’ directive output may be truncated
writing between 1 and 11 bytes into a region of size 3
[-Werror=format-truncation=]
"%c/TC#%d", port_name(port), tc_port + 1);
^~
intel_tc.c:1878:2: note: ‘snprintf’ output between 7 and 17 bytes
into a destination of size 8
snprintf(tc->port_name, sizeof(tc->port_name),
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
"%c/TC#%d", port_name(port), tc_port + 1);
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
v2: use kasprintf(Imre)
v3: use const for port_name, and fix tc mem leak(Imre)
Fixes: 3eafcddf766b ("drm/i915/tc: Move TC port fields to a new intel_tc_port struct")
Cc: Mika Kahola <[email protected]>
Cc: Imre Deak <[email protected]>
Cc: Jani Nikula <[email protected]>
Signed-off-by: Nirmoy Das <[email protected]>
Reviewed-by: Andrzej Hajda <[email protected]>
Reviewed-by: Imre Deak <[email protected]>
Reviewed-by: Mika Kahola <[email protected]>
Signed-off-by: Jani Nikula <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
(cherry picked from commit 70a3cbbe620ee66afb0c066624196077767e61b2)
Signed-off-by: Jani Nikula <[email protected]>
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Fix smatch warning:
drivers/gpu/drm/i915/gem/i915_gem_context.c:847 set_proto_ctx_sseu()
warn: potential spectre issue 'pc->user_engines' [r] (local cap)
Fixes: d4433c7600f7 ("drm/i915/gem: Use the proto-context to handle create parameters (v5)")
Cc: <[email protected]> # v5.15+
Signed-off-by: Kunwu Chan <[email protected]>
Reviewed-by: Tvrtko Ursulin <[email protected]>
Signed-off-by: Tvrtko Ursulin <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
(cherry picked from commit 27b086382c22efb7e0a16442f7bdc2e120108ef3)
Signed-off-by: Jani Nikula <[email protected]>
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On GLK CDCLK frequency needs to be at least 2*96 MHz when accessing
the audio hardware. Currently we bump the CDCLK frequency up
temporarily (if not high enough already) whenever audio hardware
is being accessed, and drop it back down afterwards.
With a single active pipe this works just fine as we can switch
between all the valid CDCLK frequencies by changing the cd2x
divider, which doesn't require a full modeset. However with
multiple active pipes the cd2x divider trick no longer works,
and thus we end up blinking all displays off and back on.
To avoid this let's just bump the CDCLK frequency to >=2*96MHz
whenever multiple pipes are active. The downside is slightly
higher power consumption, but that seems like an acceptable
tradeoff. With a single active pipe we can stick to the current
more optiomal (from power comsumption POV) behaviour.
Cc: [email protected]
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/9599
Signed-off-by: Ville Syrjälä <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
Reviewed-by: Jani Nikula <[email protected]>
(cherry picked from commit 451eaa1a614c911f5a51078dcb68022874e4cb12)
Signed-off-by: Jani Nikula <[email protected]>
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Handle platforms with multiple GTs by iterate over all GTs.
Add a Fixes commit so this gets propagated for MTL support.
Fixes: 213c43676beb ("drm/i915/mtl: Remove the 'force_probe' requirement for Meteor Lake")
Suggested-by: John Harrison <[email protected]>
Cc: Jani Nikula <[email protected]>
Cc: Rodrigo Vivi <[email protected]>
Cc: Tvrtko Ursulin <[email protected]>
Cc: Andi Shyti <[email protected]>
Cc: Andrzej Hajda <[email protected]>
Signed-off-by: Nirmoy Das <[email protected]>
Reviewed-by: Andi Shyti <[email protected]>
Reviewed-by: Andrzej Hajda <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
(cherry picked from commit 949113d34fb82a5dc6f5dd3ad9168001b441792b)
Signed-off-by: Jani Nikula <[email protected]>
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The allocated memory for qdev->dumb_heads should be released
in qxl_destroy_monitors_object before qxl suspend.
otherwise,qxl_create_monitors_object will be called to
reallocate memory for qdev->dumb_heads after qxl resume,
it will cause memory leak.
Signed-off-by: Zongmin Zhou <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Reviewed-by: Dave Airlie <[email protected]>
Signed-off-by: Maxime Ripard <[email protected]>
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https://gitlab.freedesktop.org/agd5f/linux into drm-next
amd-drm-next-6.7-2023-11-03:
amdgpu:
- Fix RAS support check
- RAS fixes
- MES fixes
- SMU13 fixes
- Contiguous memory allocation fix
- BACO fixes
- GPU reset fixes
- Min power limit fixes
- GFX11 fixes
- USB4/TB hotplug fixes
- ARM regression fix
- GFX9.4.3 fixes
- KASAN/KCSAN stack size check fixes
- SR-IOV fixes
- SMU14 fixes
- PSP13 fixes
- Display blend fixes
- Flexible array size fixes
amdkfd:
- GPUVM fix
radeon:
- Flexible array size fixes
Signed-off-by: Dave Airlie <[email protected]>
From: Alex Deucher <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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git://anongit.freedesktop.org/drm/drm-misc into drm-next
drm-misc-next-fixes for v6.7-rc1:
- dt binding fix for ssd132x
- Initialize ssd130x crtc_state to NULL.
Signed-off-by: Dave Airlie <[email protected]>
From: Maarten Lankhorst <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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Pull drm nouveau GSP support from Dave Airlie:
"This adds the initial support for the NVIDIA GSP firmware to nouveau.
This firmware is a new direction for Turing+ GPUs, and is only enabled
by default on Ada generation. Other generations need to use
nouveau.config=NvGspRm=1
The GSP firmware takes nearly all the GPU init and power management
tasks onto a risc-v CPU on the GPU.
This series is mostly the work from Ben Skeggs, and Dave added some
patches to rebase it to the latest firmware release which is where we
will stay for as long as possible as the firmwares have no ABI
stability"
* tag 'topic/nvidia-gsp-2023-11-03' of git://anongit.freedesktop.org/drm/drm: (49 commits)
nouveau/gsp: add some basic registry entries.
nouveau/gsp: fix message signature.
nouveau/gsp: move to 535.113.01
nouveau/disp: fix post-gsp build on 32-bit arm.
nouveau: fix r535 build on 32-bit arm.
drm/nouveau/ofa/r535: initial support
drm/nouveau/nvjpg/r535: initial support
drm/nouveau/nvenc/r535: initial support
drm/nouveau/nvdec/r535: initial support
drm/nouveau/gr/r535: initial support
drm/nouveau/ce/r535: initial support
drm/nouveau/fifo/r535: initial support
drm/nouveau/disp/r535: initial support
drm/nouveau/mmu/r535: initial support
drm/nouveau/gsp/r535: add interrupt handling
drm/nouveau/gsp/r535: add support for rm alloc
drm/nouveau/gsp/r535: add support for rm control
drm/nouveau/gsp/r535: add support for booting GSP-RM
drm/nouveau/nvkm: support loading fws into sg_table
drm/nouveau/kms/tu102-: disable vbios parsing when running on RM
...
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git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty
Pull tty and serial updates from Greg KH:
"Here is the big set of tty/serial driver changes for 6.7-rc1. Included
in here are:
- console/vgacon cleanups and removals from Arnd
- tty core and n_tty cleanups from Jiri
- lots of 8250 driver updates and cleanups
- sc16is7xx serial driver updates
- dt binding updates
- first set of port lock wrapers from Thomas for the printk fixes
coming in future releases
- other small serial and tty core cleanups and updates
All of these have been in linux-next for a while with no reported
issues"
* tag 'tty-6.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty: (193 commits)
serdev: Replace custom code with device_match_acpi_handle()
serdev: Simplify devm_serdev_device_open() function
serdev: Make use of device_set_node()
tty: n_gsm: add copyright Siemens Mobility GmbH
tty: n_gsm: fix race condition in status line change on dead connections
serial: core: Fix runtime PM handling for pending tx
vgacon: fix mips/sibyte build regression
dt-bindings: serial: drop unsupported samsung bindings
tty: serial: samsung: drop earlycon support for unsupported platforms
tty: 8250: Add note for PX-835
tty: 8250: Fix IS-200 PCI ID comment
tty: 8250: Add Brainboxes Oxford Semiconductor-based quirks
tty: 8250: Add support for Intashield IX cards
tty: 8250: Add support for additional Brainboxes PX cards
tty: 8250: Fix up PX-803/PX-857
tty: 8250: Fix port count of PX-257
tty: 8250: Add support for Intashield IS-100
tty: 8250: Add support for Brainboxes UP cards
tty: 8250: Add support for additional Brainboxes UC cards
tty: 8250: Remove UC-257 and UC-431
...
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git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc
Pull char/misc updates from Greg KH:
"Here is the big set of char/misc and other small driver subsystem
changes for 6.7-rc1. Included in here are:
- IIO subsystem driver updates and additions (largest part of this
pull request)
- FPGA subsystem driver updates
- Counter subsystem driver updates
- ICC subsystem driver updates
- extcon subsystem driver updates
- mei driver updates and additions
- nvmem subsystem driver updates and additions
- comedi subsystem dependency fixes
- parport driver fixups
- cdx subsystem driver and core updates
- splice support for /dev/zero and /dev/full
- other smaller driver cleanups
All of these have been in linux-next for a while with no reported
issues"
* tag 'char-misc-6.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (326 commits)
cdx: add sysfs for subsystem, class and revision
cdx: add sysfs for bus reset
cdx: add support for bus enable and disable
cdx: Register cdx bus as a device on cdx subsystem
cdx: Create symbol namespaces for cdx subsystem
cdx: Introduce lock to protect controller ops
cdx: Remove cdx controller list from cdx bus system
dts: ti: k3-am625-beagleplay: Add beaglecc1352
greybus: Add BeaglePlay Linux Driver
dt-bindings: net: Add ti,cc1352p7
dt-bindings: eeprom: at24: allow NVMEM cells based on old syntax
dt-bindings: nvmem: SID: allow NVMEM cells based on old syntax
Revert "nvmem: add new config option"
MAINTAINERS: coresight: Add missing Coresight files
misc: pci_endpoint_test: Add deviceID for J721S2 PCIe EP device support
firmware: xilinx: Move EXPORT_SYMBOL_GPL next to zynqmp_pm_feature definition
uacce: make uacce_class constant
ocxl: make ocxl_class constant
cxl: make cxl_class constant
misc: phantom: make phantom_class constant
...
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[Why]
Full update is not required on surface blend TF change.
[How]
Update full_update_required condition.
Reviewed-by: Aric Cyr <[email protected]>
Acked-by: Hersen Wu <[email protected]>
Signed-off-by: Ilya Bakoulin <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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[Why]
LUT write index does not get reset to zero when writing the LUT values
for each separate RGB component, which results in wrong data for 2 of
the 3 components.
[How]
Reset LUT write index to zero before writing each component's data.
Reviewed-by: Krunoslav Kovac <[email protected]>
Acked-by: Hersen Wu <[email protected]>
Signed-off-by: Ilya Bakoulin <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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[why]
There are some registers for plane
color that are skipped programming
on resume. Need to add those as part
of the sequence.
[how]
Add new function hook for programming
plane color control.
Reviewed-by: Duncan Ma <[email protected]>
Acked-by: Hersen Wu <[email protected]>
Signed-off-by: Sung Joon Kim <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Query boot status and report boot errors. A follow
up change is needed to stop GPU initialization if boot
fails.
v2: only invoke the call for dGPU (Le/Lijo)
Signed-off-by: Hawking Zhang <[email protected]>
Reviewed-by: Tao Zhou <[email protected]>
Reviewed-by: Yang Wang <[email protected]>
Reviewed-by: Le Ma <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Add psp v13 function to query boot status.
v2: limit the use case to dGPU only (Lijo)
Signed-off-by: Hawking Zhang <[email protected]>
Reviewed-by: Tao Zhou <[email protected]>
Reviewed-by: Yang Wang <[email protected]>
Reviewed-by: Le Ma <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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dorp fw version check and using max table size to init table.
Signed-off-by: Li Ma <[email protected]>
Reviewed-by: Yifan Zhang <[email protected]>
Reviewed-by: Yang Wang <[email protected]>
Acked-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Update driver if headers and metrics table in smu v14_0_0 after smu fw promotion.
Drop the legacy metrics table and add warning of checking pmfw version.
Signed-off-by: Li Ma <[email protected]>
Reviewed-by: Yifan Zhang <[email protected]>
Acked-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Add MP0_C2PMSG_109/126 register field shift/masks
that are used to identify boot status by driver.
Signed-off-by: Hawking Zhang <[email protected]>
Reviewed-by: Tao Zhou <[email protected]>
Reviewed-by: Yang Wang <[email protected]>
Reviewed-by: Le Ma <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Use a new struct array to define the asic information which
asic type needs to be fixed.
Signed-off-by: Ma Jun <[email protected]>
Reviewed-by: Kenneth Feng <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Use a proper MEID to make sure the CP_HQD_* and CP_GFX_HQD_* registers
can be touched when initialize the compute and gfx mqd in mes_self_test.
Otherwise, we expect no response from CP and an GRBM eventual timeout.
Signed-off-by: Tim Huang <[email protected]>
Acked-by: Alex Deucher <[email protected]>
Reviewed-by: Yifan Zhang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Cc: [email protected]
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Handle xgmi hive case.
Suggested-by: Hawking Zhang <[email protected]>
Signed-off-by: Tao Zhou <[email protected]>
Reviewed-by: Stanley.Yang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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The current code checks sriov vf flag multiple times when creating
hwmon sysfs. So fix it.
Signed-off-by: Ma Jun <[email protected]>
Reviewed-by: Yang Wang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Instead of attaching the eviction fence when a KFD BO is first mapped,
attach it when it is allocated or imported. This in preparation to allow
KFD BOs to be mapped using the render node API.
Signed-off-by: Felix Kuehling <[email protected]>
Acked-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Let amdgpu_vm_handle_moved update all BO VA mappings of BOs reserved by
the caller. This will be useful for handling extra BO VA mappings in
KFD VMs that are managed through the render node API.
v2: rebase against drm_exec changes (Alex)
Signed-off-by: Felix Kuehling <[email protected]>
Reviewed-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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When building ARCH=x86_64 allmodconfig with clang, which will typically
have sanitizers enabled, there is a warning about a large stack frame.
drivers/gpu/drm/amd/amdgpu/../display/dc/dml2/display_mode_core.c:6265:13: error: stack frame size (2520) exceeds limit (2048) in 'dml_prefetch_check' [-Werror,-Wframe-larger-than]
6265 | static void dml_prefetch_check(struct display_mode_lib_st *mode_lib)
| ^
1 error generated.
Notably, GCC 13.2.0 does not do too much of a better job, as it is right
at the current limit of 2048 (and others have reported being over with
older GCC versions):
drivers/gpu/drm/amd/amdgpu/../display/dc/dml2/display_mode_core.c: In function 'dml_prefetch_check':
drivers/gpu/drm/amd/amdgpu/../display/dc/dml2/display_mode_core.c:6705:1: error: the frame size of 2048 bytes is larger than 1800 bytes [-Werror=frame-larger-than=]
6705 | }
| ^
In the past, these warnings have been avoided by reducing the number of
parameters to various functions so that not as many arguments need to be
passed on the stack. However, these patches take a good amount of effort
to write despite being mechanical due to code structure and complexity
and they are never carried forward to new generations of the code so
that effort has to be expended every new hardware generation, which
becomes harder to justify as time goes on.
To avoid having a noticeable or lengthy breakage in all{mod,yes}config,
which are easy testing targets that have -Werror enabled, increase the
limit for configurations that have KASAN or KCSAN enabled by 50% so that
cases of extremely poor code generation can still be caught while not
breaking the majority of builds. CONFIG_KMSAN also causes high stack
usage but the frame limit is already set to zero when it is enabled,
which is accounted for by the check for CONFIG_FRAME_WARN=0 in the dml2
Makefile.
Signed-off-by: Nathan Chancellor <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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[Why & How]
Check whether assigned timing generator is NULL or not before
accessing its funcs to prevent NULL dereference.
Reviewed-by: Jun Lei <[email protected]>
Acked-by: Hersen Wu <[email protected]>
Signed-off-by: Wayne Lin <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Update cache info reporting based on compute and
memory partitioning modes.
Signed-off-by: Mukul Joshi <[email protected]>
Reviewed-by: Felix Kuehling <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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