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2020-01-09drm/dp_mst: Add helper to trigger modeset on affected DSC MST CRTCsMikita Lipski1-0/+61
[why] Whenever a connector on an MST network is changed or undergoes a modeset, the DSC configs for each stream on that topology will be recalculated. This can change their required bandwidth, requiring a full reprogramming, as though a modeset was performed, even if that stream did not change timing. [how] Adding helper to trigger modesets on MST DSC connectors by setting mode_changed flag on CRTCs in the same topology as affected connector v2: use drm_dp_mst_dsc_aux_for_port function to verify if the port is DSC capable v3: - added _must_check attribute - removed topology manager check - fix typos and indentations Reviewed-by: Lyude Paul <[email protected]> Signed-off-by: Mikita Lipski <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-01-09drm/amd/display: Recalculate VCPI slots for new DSC connectorsMikita Lipski1-5/+71
[why] Since for DSC MST connector's PBN is claculated differently due to compression, we have to recalculate both PBN and VCPI slots for that connector. [how] The function iterates through all the active streams to find, which have DSC enabled, then recalculates PBN for it and calls drm_dp_helper_update_vcpi_slots_for_dsc to update connector's VCPI slots. v2: - use drm_dp_mst_atomic_enable_dsc per port to enable/disable DSC v3: - Iterate through connector states from the state passed - On each connector state get stream from dc_state, instead CRTC state Reviewed-by: Lyude Paul <[email protected]> Signed-off-by: Mikita Lipski <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-01-09drm/amd/display: Check return value of drm helperMikita Lipski1-45/+54
If driver fails to update update VCPI allocation during compute_mst_dsc_configs_for_state - fail the function by return early. Signed-off-by: Mikita Lipski <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Mikita Lipski <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-01-09drm/amd/display: MST DSC compute fair shareDavid Francis5-2/+376
If there is limited link bandwidth on a MST network, it must be divided fairly between the streams on that network Implement an algorithm to determine the correct DSC config for each stream The algorithm: This [ ] ( ) represents the range of bandwidths possible for a given stream. The [] area represents the range of DSC configs, and the () represents no DSC. The bandwidth used increases from left to right. First, try disabling DSC on all streams [ ] (|) [ ] (|) Check this against the bandwidth limits of the link and each branch (including each endpoint). If it passes, the job is done Second, try maximum DSC compression on all streams that support DSC [| ] ( ) [| ] ( ) If this does not pass, then enabling this combination of streams is impossible Otherwise, divide the remaining bandwidth evenly amongst the streams [ | ] ( ) [ | ] ( ) If one or more of the streams reach minimum compression, evenly divide the reamining bandwidth amongst the remaining streams [ |] ( ) [ |] ( ) [ | ] ( ) [ | ] ( ) If all streams can reach minimum compression, disable compression greedily [ |] ( ) [ |] ( ) [ ] (|) Perform this algorithm on each full update, on each MST link with at least one DSC stream on it After the configs are computed, call dcn20_add_dsc_to_stream_resource on each stream with DSC enabled. It is only after all streams are created that we can know which of them will need DSC. Do all of this at the end of amdgpu atomic check. If it fails, fail check; This combination of timings cannot be supported. v2: Use drm_dp_mst_atomic_check to validate bw for certain dsc configurations v3: Use dc_dsc_policy structure to get min and max bpp rate for DSC configuration Acked-by: Lyude Paul <[email protected]> Reviewed-by: Wenjing Liu <[email protected]> Signed-off-by: David Francis <[email protected]> Signed-off-by: Mikita Lipski <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-01-09drm/amd/display: Add PBN per slot calculation for DSCMikita Lipski2-0/+10
[why] Need to calculate VCPI slots differently for DSC to take in account current link rate, link count and FEC. [how] Add helper to get pbn_div from dc_link Acked-by: Lyude Paul <[email protected]> Reviewed-by: Leo Li <[email protected]> Signed-off-by: Mikita Lipski <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-01-09drm/dp_mst: Rename drm_dp_mst_atomic_check_topology_stateMikita Lipski1-3/+3
[why] drm_dp_mst_atomic_check_topology_state() should be renamed to reflect more specific type of check. Since it is verifying payload allocation limit it should be renamed into drm_dp_mst_atomic_check_vcpi_alloc_limit() Reviewed-by: Lyude Paul <[email protected]> Signed-off-by: Mikita Lipski <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-01-09drm/dp_mst: Add branch bandwidth validation to MST atomic checkMikita Lipski1-2/+64
[why] Adding PBN attribute to drm_dp_vcpi_allocation structure to keep track of how much bandwidth each Port requires. Adding drm_dp_mst_atomic_check_bw_limit to verify that state's bandwidth needs doesn't exceed available bandwidth. The funtion is called in drm_dp_mst_atomic_check after drm_dp_mst_atomic_check_topology_state to fully verify that the proposed topology is supported. v2: Fixing some typos and indenting v3: Return correct error enums if no bw space available Reviewed-by: Lyude Paul <[email protected]> Signed-off-by: Mikita Lipski <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-01-09drm/dp_mst: Add DSC enablement helpers to DRMMikita Lipski1-0/+61
Adding a helper function to be called by drivers outside of DRM to enable DSC on the MST ports. Function is called to recalculate VCPI allocation if DSC is enabled and raise the DSC flag to enable. In case of disabling DSC the flag is set to false and recalculation of VCPI slots is expected to be done in encoder's atomic_check. v2: squash separate functions into one and call it per port v3: Fix comment typos Reviewed-by: Lyude Paul <[email protected]> Signed-off-by: Mikita Lipski <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-01-09drm/dp_mst: Manually overwrite PBN divider for calculating timeslotsMikita Lipski4-5/+11
[why] For DSC case we cannot use topology manager's PBN divider variable. The default divider does not take FEC into account. Therefore the driver has to calculate its own divider based on the link rate and lane count its handling, as it is hw specific. [how] Pass pbn_div as an argument, which is used if its more than zero, otherwise default topology manager's pbn_div will be used. Reviewed-by: Lyude Paul <[email protected]> Signed-off-by: Mikita Lipski <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-01-09drm/amd/display: Write DSC enable to MST DPCDDavid Francis1-1/+18
Rework the dm_helpers_write_dsc_enable callback to handle the MST case. Use the cached dsc_aux field. Reviewed-by: Wenjing Liu <[email protected]> Signed-off-by: David Francis <[email protected]> Signed-off-by: Mikita Lipski <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-01-09drm/amd/display: Validate DSC caps on MST endpointsDavid Francis2-1/+29
During MST mode enumeration, if a new dc_sink is created, populate it with dsc caps as appropriate. Use drm_dp_mst_dsc_aux_for_port to get the raw caps, then parse them onto dc_sink with dc_dsc_parse_dsc_dpcd. Reviewed-by: Wenjing Liu <[email protected]> Signed-off-by: David Francis <[email protected]> Signed-off-by: Mikita Lipski <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-01-09drm/amd/display: Initialize DSC PPS variables to 0David Francis2-0/+6
For DSC MST, sometimes monitors would break out in full-screen static. The issue traced back to the PPS generation code, where these variables were being used uninitialized and were picking up garbage. memset to 0 to avoid this Reviewed-by: Nicholas Kazlauskas <[email protected]> Signed-off-by: David Francis <[email protected]> Signed-off-by: Mikita Lipski <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-01-09drm/dp_mst: Add new quirk for Synaptics MST hubsMikita Lipski2-0/+29
Synaptics DP1.4 hubs (BRANCH_ID 0x90CC24) do not support virtual DPCD registers, but do support DSC. The DSC caps can be read from the physical aux, like in SST DSC. These hubs have many different DEVICE_IDs. Add a new quirk to detect this case. v2: Fix error when checking return of drm_dp_read_desc Reviewed-by: Wenjing Liu <[email protected]> Reviewed-by: Lyude Paul <[email protected]> Signed-off-by: David Francis <[email protected]> Signed-off-by: Mikita Lipski <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-01-09drm/dp_mst: Add helpers for MST DSC and virtual DPCD auxDavid Francis1-0/+143
Add drm_dp_mst_dsc_aux_for_port. To enable DSC, the DSC_ENABLED register might have to be written on the leaf port's DPCD, its parent's DPCD, or the MST manager's DPCD. This function finds the correct aux for the job. As part of this, add drm_dp_mst_is_virtual_dpcd. Virtual DPCD is a DP feature new in DP v1.4, which exposes certain DPCD registers on virtual ports. v2: Remember to unlock mutex on all paths v3: Refactor to match coding style and increase brevity v4: - Check DSC capable MST sink connected directly to the device. - Check branch's port_parent to be set Cc: Lyude Paul <[email protected]> Reviewed-by: Wenjing Liu <[email protected]> Signed-off-by: David Francis <[email protected]> Signed-off-by: Mikita Lipski <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-01-09drm/dp_mst: Fill branch->num_portsDavid Francis1-0/+2
This field on drm_dp_mst_branch was never filled It is initialized to zero when the port is kzallocced. When a port is added to the list, increment num_ports, and when a port is removed from the list, decrement num_ports. v2: remember to decrement on port removal v3: don't explicitly init to 0 v4: move decrement of num_ports to unlink_port function Reviewed-by: Lyude Paul <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: David Francis <[email protected]> Signed-off-by: Mikita Lipski <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-01-09drm/dp_mst: Add MST support to DP DPCD R/W functionsDavid Francis2-20/+22
Instead of having drm_dp_dpcd_read/write and drm_dp_mst_dpcd_read/write as entry points into the aux code, have drm_dp_dpcd_read/write handle both. This means that DRM drivers can make MST DPCD read/writes. v2: Fix spacing v3: Dump dpcd access on MST read/writes v4: Fix calling wrong function on DPCD write v5: delete deprecated include of drmP.h Reviewed-by: Lyude Paul <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: David Francis <[email protected]> Signed-off-by: Mikita Lipski <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-01-09drm/dp_mst: Parse FEC capability on MST portsDavid Francis1-0/+2
As of DP1.4, ENUM_PATH_RESOURCES returns a bit indicating if FEC can be supported up to that point in the MST network. The bit is the first byte of the ENUM_PATH_RESOURCES ack reply, bottom-most bit (refer to section 2.11.9.4 of DP standard, v1.4) That value is needed for FEC and DSC support Store it on drm_dp_mst_port Reviewed-by: Lyude Paul <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: David Francis <[email protected]> Signed-off-by: Mikita Lipski <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-01-09drm/dp_mst: Add PBN calculation for DSC modesDavid Francis6-9/+24
With DSC, bpp can be fractional in multiples of 1/16. Change drm_dp_calc_pbn_mode to reflect this, adding a new parameter bool dsc. When this parameter is true, treat the bpp parameter as having units not of bits per pixel, but 1/16 of a bit per pixel v2: Don't add separate function for this v3: In the equation divide bpp by 16 as it is expected not to leave any remainder v4: Added DSC test parameters for selftest Reviewed-by: Manasi Navare <[email protected]> Reviewed-by: Lyude Paul <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: David Francis <[email protected]> Signed-off-by: Mikita Lipski <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-01-09drm/i915/gtt: add missing include file asm/smp.hChen Zhou1-0/+1
Fix build error: drivers/gpu/drm/i915/gt/intel_ggtt.c: In function ggtt_restore_mappings: drivers/gpu/drm/i915/gt/intel_ggtt.c:1239:3: error: implicit declaration of function wbinvd_on_all_cpus; did you mean wrmsr_on_cpus? [-Werror=implicit-function-declaration] wbinvd_on_all_cpus(); ^~~~~~~~~~~~~~~~~~ wrmsr_on_cpus Reported-by: Hulk Robot <[email protected]> Signed-off-by: Chen Zhou <[email protected]> Reviewed-by: Chris Wilson <[email protected]> Signed-off-by: Chris Wilson <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-01-09drm/amdkfd: Improve kfd_process lookup in kfd_ioctlFelix Kuehling2-4/+28
Use filep->private_data to store a pointer to the kfd_process data structure. Take an extra reference for that, which gets released in the kfd_release callback. Check that the process calling kfd_ioctl is the same that opened the file descriptor. Return -EBADF if it's not, so that this error can be distinguished in user mode. Signed-off-by: Felix Kuehling <[email protected]> Reviewed-by: Philip Yang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-01-09drm/panel: simple: Add Satoz SAT050AT40H12R2 panel supportMiquel Raynal1-0/+27
Add support for the Satoz SAT050AT40H12R2 panel. Signed-off-by: Miquel Raynal <[email protected]> Signed-off-by: Sam Ravnborg <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-01-09drm/i915: Pass cpu_transcoder to assert_pipe_disabled() alwaysVille Syrjälä2-3/+3
I missed a few assert_pipe_disabled() cases when changing it to take enum transcoder instead of enum pipe, making sparse unhappy. Convert the leftovers. Reported-by: kbuild test robot <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Chris Wilson <[email protected]>
2020-01-09drm/i915: Fix MST disable sequenceVille Syrjälä1-10/+12
When moving the pipe disable & co. function calls from haswell_crtc_disable() into the encoder .post_disable() hooks I neglected to account for the MST vs. DDI interactions properly. This now leads us to call these functions two times for the last MST stream (once from the MST code and a second time from the DDI code). The calls from the DDI code should only be done for SST and not MST. Add the proper check for that. This results in an MCE on ICL. My vague theory is that we turn off the transcoder clock from the MST code and then we proceed to touch something in the DDI code which still depends on that clock causing the hardware to become upset. Though I can't really explain why Stan's hack of omitting the pipe disable in the MST code would avoid the MCE since we should still be turning off the transcoder clock. But maybe there's something magic in the hw that keeps the clock on as long as the pipe is on. Or maybe the clock isn't the problem and we now touch something in the DDI disable code that really does need the pipe to be still enabled. v2: Rebase to latest drm-tip Cc: José Roberto de Souza <[email protected]> Cc: Manasi Navare <[email protected]> Reported-by: Stanislav Lisovskiy <[email protected]> Closes: https://gitlab.freedesktop.org/drm/intel/issues/901 Fixes: 773b4b54351c ("drm/i915: Move stuff from haswell_crtc_disable() into encoder .post_disable()") Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: José Roberto de Souza <[email protected]>
2020-01-09drm/fb-cma-helpers: Fix include issueBenjamin Gaignard1-0/+1
Exported functions prototypes are missing in drm_fb_cma_helper.c Include drm_fb_cma_helper to fix that issue. Signed-off-by: Benjamin Gaignard <[email protected]> Acked-by: Thomas Zimmermann <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-01-09drm/modes: tag unused variables to avoid warningsBenjamin Gaignard1-4/+5
Some variables are set but never used. To avoid warning when compiling with W=1 and keep the algorithm like it is tag theses variables with _maybe_unused macro. Signed-off-by: Benjamin Gaignard <[email protected]> Acked-by: Thomas Zimmermann <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-01-09drm/panel: Add support for BOE NV140FHM-N49 panel to panel-simpleTobias Schramm1-0/+35
This patch adds support for the BOE NV140FHM-N49 panel to the panel-simple driver. The panel is used by the pine64 Pinebook Pro. Signed-off-by: Tobias Schramm <[email protected]> Signed-off-by: Sam Ravnborg <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-01-09Merge drm/drm-next into drm-intel-next-queuedJani Nikula749-13461/+27826
Sync with drm-next to get the new logging macros, among other things. Signed-off-by: Jani Nikula <[email protected]>
2020-01-09drm/i915/gen9: Clear residual context state on context switchAkeem G Abodunrin1-0/+8
Intel ID: PSIRT-TA-201910-001 CVEID: CVE-2019-14615 Intel GPU Hardware prior to Gen11 does not clear EU state during a context switch. This can result in information leakage between contexts. For Gen8 and Gen9, hardware provides a mechanism for fast cleardown of the EU state, by issuing a PIPE_CONTROL with bit 27 set. We can use this in a context batch buffer to explicitly cleardown the state on every context switch. As this workaround is already in place for gen8, we can borrow the code verbatim for Gen9. Signed-off-by: Mika Kuoppala <[email protected]> Signed-off-by: Akeem G Abodunrin <[email protected]> Cc: Kumar Valsan Prathap <[email protected]> Cc: Chris Wilson <[email protected]> Cc: Balestrieri Francesco <[email protected]> Cc: Bloomfield Jon <[email protected]> Cc: Dutt Sudeep <[email protected]>
2020-01-09drm/i915: use true,false for bool variable in intel_crt.cMa Feng1-3/+3
Fixes coccicheck warning: drivers/gpu/drm/i915/display/intel_crt.c:1066:1-28: WARNING: Assignment of 0/1 to bool variable drivers/gpu/drm/i915/display/intel_crt.c:928:2-29: WARNING: Assignment of 0/1 to bool variable drivers/gpu/drm/i915/display/intel_crt.c:443:2-29: WARNING: Assignment of 0/1 to bool variable Reported-by: Hulk Robot <[email protected]> Signed-off-by: Ma Feng <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-01-09drm/i915/dp: use true,false for bool variable in intel_dp.cMa Feng1-2/+2
Fixes coccicheck warning: drivers/gpu/drm/i915/display/intel_dp.c:4950:1-33: WARNING: Assignment of 0/1 to bool variable drivers/gpu/drm/i915/display/intel_dp.c:4906:1-33: WARNING: Assignment of 0/1 to bool variable Reported-by: Hulk Robot <[email protected]> Signed-off-by: Ma Feng <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-01-09drm/i915: use true,false for bool variable in i915_debugfs.cMa Feng1-2/+2
Fixes coccicheck warning: drivers/gpu/drm/i915/i915_debugfs.c:3078:4-36: WARNING: Assignment of 0/1 to bool variable drivers/gpu/drm/i915/i915_debugfs.c:3078:4-36: WARNING: Assignment of 0/1 to bool variable drivers/gpu/drm/i915/i915_debugfs.c:3080:4-36: WARNING: Assignment of 0/1 to bool variable drivers/gpu/drm/i915/i915_debugfs.c:3080:4-36: WARNING: Assignment of 0/1 to bool variable Reported-by: Hulk Robot <[email protected]> Signed-off-by: Ma Feng <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-01-09drm/panel: Add driver for Sony ACX424AKP panelLinus Walleij3-0/+562
The Sony ACX424AKP is a command/videomode DSI panel for mobile devices. It is used on the ST-Ericsson HREF520 reference design. We support video mode by default, but it is possible to switch the panel into command mode by using the bool property "dsi-command-mode". Cc: Stephan Gerhold <[email protected]> Signed-off-by: Linus Walleij <[email protected]> Signed-off-by: Sam Ravnborg <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-01-09drm/udl: Make udl driver depend on CONFIG_USBThomas Zimmermann1-2/+1
The udl driver for DisplayLink devices depends on support for host-side USB controllers, which is enabled with CONFIG_USB. Plain USB support as given by CONFIG_USB_SUPPORT is not sufficient. This patch changes dependencies for udl to depend on CONFIG_USB, instead of CONFIG_USB_SUPPORT. Users will have to enable CONFIG_USB and select a USB host controller. With this change udl dependencies work the same way as dependencies for PCI drivers. Signed-off-by: Thomas Zimmermann <[email protected]> Acked-by: Alex Deucher <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-01-09drm/i915/gt: runtime-pm is no longer required for ce->ops->pin()Chris Wilson1-4/+1
Now that we have moved the runtime-pm management out of intel_context_acctive_acquire, and that itself out of ce->ops->pin(), no explicit runtime pm wakeref is required in intel_context_pin(). Signed-off-by: Chris Wilson <[email protected]> Reviewed-by: Maarten Lankhorst <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-01-09drm/i915/gt: Pull context activation into central intel_context_pin()Chris Wilson5-64/+40
While this is encroaching on midlayer territory, having already made the state allocation a previous step in pinning, we can now pull the common intel_context_active_acquire() into intel_context_pin() itself. This is a prelude to make the activation a separate step inside pinning, outside of the ce->pin_mutex Signed-off-by: Chris Wilson <[email protected]> Cc: Maarten Lankhorst <[email protected]> Cc: Tvrtko Ursulin <[email protected]> Reviewed-by: Maarten Lankhorst <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-01-09drm/i915/gt: Push context state allocation earlierChris Wilson2-8/+28
Allow for knowledgeable users to preallocate the context state, and to separate the allocation step from the pinning step during intel_context_pin() Signed-off-by: Chris Wilson <[email protected]> Cc: Maarten Lankhorst <[email protected]> Cc: Tvrtko Ursulin <[email protected]> Reviewed-by: Maarten Lankhorst <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-01-09drm/i915: Pin the context as we work on itChris Wilson4-20/+22
Since we now allow the intel_context_unpin() to run unserialised, we risk our operations under the intel_context_lock_pinned() being run as the context is unpinned (and thus invalidating our state). We can atomically acquire the pin, testing to see if it is pinned in the process, thus ensuring that the state remains consistent during the course of the whole operation. Fixes: 841350223816 ("drm/i915/gt: Drop mutex serialisation between context pin/unpin") Signed-off-by: Chris Wilson <[email protected]> Cc: Tvrtko Ursulin <[email protected]> Reviewed-by: Mika Kuoppala <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-01-09drm/i915: Revert "drm/i915/tgl: Wa_1607138340"Tvrtko Ursulin1-4/+0
This reverts commit 08fff7aeddc9dd72161b4c8fc27fbab12b4b9352. For some yet unexplained reason not having this improves stability of some media workloads. Promise is that the media hang will be root caused properly and in the meantime absence of this workaround is unlikely to cause problems. Signed-off-by: Tvrtko Ursulin <[email protected]> Cc: Sudeep Dutt <[email protected]> Cc: Francesco Balestrieri <[email protected]> Cc: Mika Kuoppala <[email protected]> Cc: Tony Ye <[email protected]> Acked-by: Mika Kuoppala <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-01-09drm/Kconfig: add missing 'depends on DRM' for DRM_DP_CECHans Verkuil1-0/+1
Add a missing 'depends on DRM' for the DRM_DP_CEC config option. Without that enabling DRM_DP_CEC will force CEC_CORE to =y instead of =m if DRM=m as well. Signed-off-by: Hans Verkuil <[email protected]> Reviewed-by: Daniel Vetter <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-01-09drm/i915: Reduce warning for i915_vma_pin_iomap() without runtime-pmChris Wilson1-2/+2
Access through the GGTT (iomap) into the vma does require the device to be awake. However, we often take the i915_vma_pin_iomap() as an early preparatory step that is long before we use the iomap. Asserting that the device is awake at pin time does not protect us, and is merely a nuisance. Signed-off-by: Chris Wilson <[email protected]> Cc: Mika Kuoppala <[email protected]> Reviewed-by: Mika Kuoppala <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-01-09drm/i915: Early return for no-op i915_vma_pin_fence()Chris Wilson1-0/+3
If we have no fence and desire no fence on the vma, return before we try and take the vm->mutex. Signed-off-by: Chris Wilson <[email protected]> Cc: Mika Kuoppala <[email protected]> Reviewed-by: Mika Kuoppala <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-01-09drm/i915/gt: Drop a defunct timeline assertionChris Wilson1-1/+0
intel_timeline_enter() has been decoupled from intel_timeline_pin() and both enter/exit & pin/unpin are allowed [read expected] to run concurrently with one another. The assertion that they had better not is stale. Closes: https://gitlab.freedesktop.org/drm/intel/issues/940 References: a6edbca74b30 ("drm/i915/gt: Close race between engine_park and intel_gt_retire_requests") Signed-off-by: Chris Wilson <[email protected]> Reviewed-by: Mika Kuoppala <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-01-09Merge tag 'amd-drm-fixes-5.5-2020-01-08' of ↵Dave Airlie2-25/+27
git://people.freedesktop.org/~agd5f/linux into drm-fixes amd-drm-fixes-5.5-2020-01-08: amdgpu: - Stability fix for raven - Reduce pixel encoding to if max clock is exceeded on HDMI to allow additional high res modes UAPI: - enable DRIVER_SYNCOBJ_TIMELINE for amdgpu Signed-off-by: Dave Airlie <[email protected]> From: Alex Deucher <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-01-09Merge tag 'drm-misc-fixes-2020-01-08' of ↵Dave Airlie4-5/+20
git://anongit.freedesktop.org/drm/drm-misc into drm-fixes mst: Fix NO_STOP_BIT bit offset (Wayne) sun4i: Fix RGB_DIV clock min divider on old hardware (Chen-Yu) fb_helper: Fix bits_per_pixel param set behavior to round up (Geert) Cc: Wayne Lin <[email protected]> Cc: Chen-Yu Tsai <[email protected]> Cc: Geert Uytterhoeven <[email protected]> Signed-off-by: Dave Airlie <[email protected]> From: Sean Paul <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/20200108205949.GA233273@art_vandelay
2020-01-09drm/mediatek: apply CMDQ control flowBibby Hsieh1-6/+55
In some Mediatek SoC, there is no "shadow" registers for performaing an atomic video mode set or page flip at vblank/vsync. The CMDQ (Commend Queue) is used to help update all relevant display controller registers with critical time limation. Signed-off-by: YT Shen <[email protected]> Signed-off-by: Philipp Zabel <[email protected]> Signed-off-by: Bibby Hsieh <[email protected]> Signed-off-by: Yongqiang Niu <[email protected]> Signed-off-by: CK Hu <[email protected]>
2020-01-09drm/mediatek: support CMDQ interface in ddp componentBibby Hsieh6-94/+186
The CMDQ (Command Queue) in some Mediatek SoC is used to help update all relevant display controller registers with critical time limation. This patch add cmdq interface in ddp_comp interface, let all ddp_comp interface can support cpu/cmdq function at the same time. Signed-off-by: YT Shen <[email protected]> Signed-off-by: Philipp Zabel <[email protected]> Signed-off-by: Bibby Hsieh <[email protected]> Signed-off-by: Yongqiang Niu <[email protected]> Signed-off-by: CK Hu <[email protected]>
2020-01-09drm/lima: use drm_sched_fault for error task handlingQiang Yu2-28/+9
drm_sched_job_timedout works with drm_sched_stop as a pair, so we'd better use the drm_sched_fault helper to make the error and timeout handling go the same path. This also fixes application hang when task error. Reviewed-by: Vasily Khoruzhick <[email protected]> Tested-by: Andreas Baierl <[email protected]> Signed-off-by: Qiang Yu <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-01-09drm/panel: Add support for AUO B116XAK01 panelRob Clark1-0/+32
Signed-off-by: Rob Clark <[email protected]> Signed-off-by: Sam Ravnborg <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-01-08gpu/drm: clean up white space in drm_legacy_lock_master_cleanup()Dan Carpenter1-1/+2
We moved this code to a different file and accidentally deleted a newline. Signed-off-by: Dan Carpenter <[email protected]> Signed-off-by: Daniel Vetter <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-01-08drm/omapdrm: use BUG_ON macro for error debugging.Wambui Karuga1-2/+1
Since the if statement only checks for the value of the `id` variable, it can be replaced by the more concise BUG_ON() macro for error reporting. Issue found using coccinelle. Signed-off-by: Wambui Karuga <[email protected]> Signed-off-by: Daniel Vetter <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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