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2011-03-08drm: index i shadowed in 2nd looproel1-2/+2
Index i was already used in thhe first loop Signed-off-by: Roel Kluin <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
2011-03-08Merge remote branch 'ickle/drm-intel-fixes' into drm-fixesDave Airlie9-41/+70
* ickle/drm-intel-fixes: drm/i915: Rebind the buffer if its alignment constraints changes with tiling drm/i915: Disable GPU semaphores by default drm/i915: Do not overflow the MMADDR write FIFO Revert "drm/i915: fix corruptions on i8xx due to relaxed fencing"
2011-03-08drm/nv50-nvc0: prevent multiple vm/bar flushes occuring simultanenouslyBen Skeggs2-0/+12
The per-vm mutex doesn't prevent this completely, a flush coming from the BAR VM could potentially happen at the same time as one for the channel VM. Not to mention that if/when we get per-client/channel VM, this will happen far more frequently. Signed-off-by: Ben Skeggs <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
2011-03-08drm/nouveau: fix regression causing ttm to not be able to evict vramBen Skeggs2-3/+5
TTM assumes an error condition from man->func->get_node() means that something went horribly wrong, and causes it to bail. The driver is supposed to return 0, and leave mm_node == NULL to signal that it couldn't allocate any memory. Signed-off-by: Ben Skeggs <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
2011-03-07Merge branch 'drm-intel-fixes' into drm-intel-nextChris Wilson9-40/+70
Apply the trivial conflicting regression fixes, but keep GPU semaphores enabled. Conflicts: drivers/gpu/drm/i915/i915_drv.h drivers/gpu/drm/i915/i915_gem_execbuffer.c
2011-03-07drm/i915: Only wait on a pending flip if we intend to write to the bufferChris Wilson1-48/+44
... as if we are only reading from it, we can do that concurrently with the queue flip. Signed-off-by: Chris Wilson <[email protected]>
2011-03-07drm/i915/dp: Sanity check eDP existenceChris Wilson1-5/+8
Some hardware claims to have both an LVDS panel and an eDP output. Whilst this may be true in a rare case, more often it is just broken hardware. If we see an eDP device we know that it must be connected and so we can confirm its existence with a simple probe. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=34165 Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=24822 Signed-off-by: Chris Wilson <[email protected]>
2011-03-07drm/i915: Rebind the buffer if its alignment constraints changes with tilingChris Wilson3-5/+21
Early gen3 and gen2 chipset do not have the relaxed per-surface tiling constraints of the later chipsets, so we need to check that the GTT alignment is correct for the new tiling. If it is not, we need to rebind. Reported-by: Daniel Vetter <[email protected]> Reviewed-by: Daniel Vetter <[email protected]> Signed-off-by: Chris Wilson <[email protected]>
2011-03-07drm/i915: Disable GPU semaphores by defaultChris Wilson3-2/+6
Andi Kleen narrowed his GPU hangs on his Sugar Bay (SNB desktop) rev 09 down to the use of GPU semaphores, and we already know that they appear broken up to Huron River (mobile) rev 08. (I'm optimistic that disabling GPU semaphores is simply hiding another bug by the latency and side-effects of the additional device interaction it introduces...) However, use of semaphores is a massive performance improvement... Only as long as the system remains stable. Enable at your peril. Reported-by: Andi Kleen <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=33921 Signed-off-by: Chris Wilson <[email protected]>
2011-03-06drm/i915: Do not overflow the MMADDR write FIFOChris Wilson6-19/+42
Whilst the GT is powered down (rc6), writes to MMADDR are placed in a FIFO by the System Agent. This is a limited resource, only 64 entries, of which 20 are reserved for Display and PCH writes, and so we must take care not to queue up too many writes. To avoid this, there is counter which we can poll to ensure there are sufficient free entries in the fifo. "Issuing a write to a full FIFO is not supported; at worst it could result in corruption or a system hang." Reported-and-Tested-by: Matt Turner <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=34056 Signed-off-by: Chris Wilson <[email protected]>
2011-03-06Revert "drm/i915: fix corruptions on i8xx due to relaxed fencing"Chris Wilson1-15/+1
This reverts commit c2e0eb167070a6e9dcb49c84c13c79a30d672431. As it turns out, userspace already depends upon being able to enable tiling on existing bo which it promises to be large enough for its purposes i.e. it will not access beyond the end of the last full-tile row. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=35016 Reported-and-tested-by: Kamal Mostafa <[email protected]> Signed-off-by: Chris Wilson <[email protected]>
2011-03-04drm: add cap bit to denote if dumb ioctl is available or not.Dave Airlie1-0/+8
This allows libkms to make an easier decision. Signed-off-by: Dave Airlie <[email protected]>
2011-03-04drm/core: add ioctl to query device/driver capabilitiesBen Skeggs2-0/+12
We're coming to see a need to have a set of generic capability checks in the core DRM, in addition to the driver-specific ioctls that already exist. This patch defines an ioctl to do as such, but does not yet define any capabilities. [airlied: drop the driver callback for now.] Signed-off-by: Ben Skeggs <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
2011-03-04drm/nouveau: allocate kernel's notifier object at end of blockBen Skeggs3-6/+11
The nv30/nv40 3d driver is about to start using DMA_FENCE from the 3D object which, it turns out, doesn't like its DMA object to not be aligned to a 4KiB boundary. Signed-off-by: Ben Skeggs <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
2011-03-03drm/radeon/kms: allow max clock of 340 Mhz on hdmi 1.3+Alex Deucher1-1/+10
hdmi 1.3 raises the max clock from 165 Mhz to 340 Mhz. Signed-off-by: Alex Deucher <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
2011-03-03drm/radeon/kms: cayman/evergreen cs checker updatesAlex Deucher4-2/+30
Signed-off-by: Alex Deucher <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
2011-03-03drm/radeon/kms/cayman: always set certain VGT regs at CP initAlex Deucher1-1/+6
These should be handled by the clear_state setup, but set them directly as well just to be sure. Signed-off-by: Alex Deucher <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
2011-03-03drm/radeon/kms: additional default context regs for caymanAlex Deucher1-0/+5
Signed-off-by: Alex Deucher <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
2011-03-03drm/radeon/kms: add cayman CS check supportAlex Deucher3-4/+62
Added to existing evergreen CS checker. Signed-off-by: Alex Deucher <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
2011-03-03drm/radeon/kms: add radeon_asic entry for caymanAlex Deucher2-0/+59
Signed-off-by: Alex Deucher <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
2011-03-03drm/radeon/kms: add cayman safe regsAlex Deucher2-0/+620
For the CS checker. Signed-off-by: Alex Deucher <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
2011-03-03drm/radeon/kms/cayman: add asic init/startup/fini/suspend/resume functionsAlex Deucher3-7/+246
Cayman is different enough from evergreen to warrant it's own functions. Signed-off-by: Alex Deucher <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
2011-03-03drm/radeon/kms: add cayman asic reset supportAlex Deucher3-3/+101
Signed-off-by: Alex Deucher <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
2011-03-03drm/radeon/kms: add support for cayman irqsAlex Deucher1-3/+11
Signed-off-by: Alex Deucher <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
2011-03-03drm/radeon/kms: add support for CP setup on cayman asicsAlex Deucher6-1/+482
Cayman asics have 3 ring buffers: ring 0 supports both gfx and compute rings 1 and 2 are compute only At the moment we only support ring 0. Signed-off-by: Alex Deucher <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
2011-03-03drm/radeon/kms: add support for cayman gart setupAlex Deucher2-0/+149
This patch sets up the gart in legacy mode. We probably want to switch to full VM mode at some point. Signed-off-by: Alex Deucher <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
2011-03-03drm/radeon/kms: add gpu_init function for caymanAlex Deucher4-2/+866
This may some work to get accel going. Signed-off-by: Alex Deucher <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
2011-03-03drm/radeon/kms: add ucode loader for caymanAlex Deucher1-8/+75
The MC ucode is no longer loaded by the vbios tables as on previous asics. It now must be loaded by the driver. Signed-off-by: Alex Deucher <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
2011-03-03drm/radeon/kms: add cayman chip familyAlex Deucher2-0/+2
Cayman is DCE5 display plus a new 4-way shader block. 3D state programming is similar to evergreen. Signed-off-by: Alex Deucher <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
2011-03-02drm/i915: Don't save/restore hardware status page address registerZhenyu Wang2-7/+0
It's cleaned before saving and re-initialized after restoring. So don't need to save/restore it. And also new chip has new address for hardware status page register, don't write to old address. Signed-off-by: Zhenyu Wang <[email protected]> Signed-off-by: Chris Wilson <[email protected]>
2011-03-02drm/i915: don't store the reg value for HWS_PGAChris Wilson2-7/+13
It is trivially computable from the real physical address so no need to store both. Signed-off-by: Chris Wilson <[email protected]>
2011-03-01Merge branch 'drm-intel-fixes' into drm-intel-nextChris Wilson8-21/+53
2011-03-01drm/i915: fix memory corruption with GM965 and >4GB RAMJan Niehusmann1-0/+11
On a Thinkpad x61s, I noticed some memory corruption when plugging/unplugging the external VGA connection. The symptoms are that 4 bytes at the beginning of a page get overwritten by zeroes. The address of the corruption varies when rebooting the machine, but stays constant while it's running (so it's possible to repeatedly write some data and then corrupt it again by plugging the cable). Further investigation revealed that the corrupted address is (dev_priv->status_page_dmah->busaddr & 0xffffffff), ie. the beginning of the hardware status page of the i965 graphics card, cut to 32 bits. So it seems that for some memory access, the hardware uses only 32 bit addressing. If the hardware status page is located >4GB, this corrupts unrelated memory. Signed-off-by: Jan Niehusmann <[email protected]> Acked-by: Daniel Vetter <[email protected]> Signed-off-by: Chris Wilson <[email protected]> Cc: [email protected]
2011-03-01drm/i915: Re-enable GPU semaphores for SandyBridge mobileChris Wilson1-2/+1
This seems to be running stably on my test laptop, so hopefully the reported hangs where just symptoms of other bugs. Signed-off-by: Chris Wilson <[email protected]>
2011-03-01drm/i915: Replace vblank PM QoS with "Interrupt-Based AGPBUSY#"Chris Wilson2-1/+13
I stumbled over this magic bit in the gen3 INSTPM: Bit11 Interrupt-Based AGPBUSY# Enable: ‘0’ = Pending GMCH interrupts will not cause AGPBUSY# assertion. ‘1’ = Pending GMCH interrupts will cause AGPBUSY# assertion and hence can cause the CPU to exit C3. There is no suppression of cacheable writes. Note that in either case in C3 the interrupts are not lost. They will be forwarded to the ICH when the GMCH is out of C3. Signed-off-by: Chris Wilson <[email protected]> Tested-by: Daniel Vetter <[email protected]> Cc: [email protected]
2011-03-01Revert "drm/i915: Use PM QoS to prevent C-State starvation of gen3 GPU"Chris Wilson2-38/+0
Using PM latency request turns out to be very fragile and only works for some systems, depending upon the ACPI implementation. However, I've stumbled across a promising bit in INSTPM: "Interrupt-Based AGPBUSY#". This reverts commit b0b544cd37c060e261afb2cf486296983fcb56da. Signed-off-by: Chris Wilson <[email protected]>
2011-03-01drm/i915: Allow relocation deltas outside of target boChris Wilson2-10/+3
Userspace has a legitimate requirement to use a delta that points to outside of the target bo, and so we need to enable this. (As this is an abi break, albeit a relaxation of the current restrictions, mark the change with a new flag.) Signed-off-by: Chris Wilson <[email protected]>
2011-03-01drm/i915: Silence an innocuous compiler warning for an unused variableChris Wilson1-1/+0
drivers/gpu/drm/i915/i915_irq.c: In function ‘ironlake_irq_postinstall’: drivers/gpu/drm/i915/i915_irq.c:1618: warning: unused variable ‘pipe’ Signed-off-by: Chris Wilson <[email protected]>
2011-03-01drm: fix printk typo 'sracth'Paul Bolle1-1/+1
Signed-off-by: Paul Bolle <[email protected]> Signed-off-by: Jiri Kosina <[email protected]>
2011-03-01drm/radeon: add new getparam for number of backends.Dave Airlie2-1/+12
This allows userspace to work out how many DBs there are for conditional rendering to work. Signed-off-by: Dave Airlie <[email protected]>
2011-03-01drm/radeon: fix up dereferencing of busy objects.Dave Airlie1-1/+1
This could free things twice, just deref the GEM object and hope its enough. Signed-off-by: Dave Airlie <[email protected]>
2011-03-01drm/radeon: bump version to 2.9Dave Airlie1-1/+2
This lets r600g enable texture formats and some more extensions. Signed-off-by: Dave Airlie <[email protected]>
2011-03-01drm/r600: parse the set predication command. (v2)Dave Airlie2-0/+63
This is required for NV_conditional_render and EXT_transform_feedback. v2: add evergreen support. Signed-off-by: Dave Airlie <[email protected]>
2011-02-28Merge remote branch 'nouveau/drm-nouveau-fixes' of /ssd/git/drm-nouveau-next ↵Dave Airlie1-1/+4
into drm-fixes * 'nouveau/drm-nouveau-fixes' of /ssd/git/drm-nouveau-next: drm/nv50-nvc0: make sure vma is definitely unmapped when destroying bo
2011-02-28drm: fix unsigned vs signed comparison issue in modeset ctl ioctl.Dave Airlie1-1/+2
This fixes CVE-2011-1013. Reported-by: Matthiew Herrb (OpenBSD X.org team) Cc: [email protected] Signed-off-by: Dave Airlie <[email protected]>
2011-02-28drm/nv50-nvc0: make sure vma is definitely unmapped when destroying boBen Skeggs1-1/+4
Somehow fixes a misrendering + hang at GDM startup on my NVA8... My first guess would have been stale TLB entries laying around that a new bo then accidentally inherits. That doesn't make a great deal of sense however, as when we mapped the pages for the new bo the TLBs would've gotten flushed anyway. Signed-off-by: Ben Skeggs <[email protected]>
2011-02-28drm/radeon: make sure ib reads are in-order.Dave Airlie1-7/+9
have to read values from the IB in order as we could cross a page boundary at any time and won't be able to go backwards. Signed-off-by: Dave Airlie <[email protected]>
2011-02-28drm/radeon/r600_cs: off by one errorsDan Carpenter1-6/+9
There are a bunch of off by one errors in the sanity checks here. Signed-off-by: Dan Carpenter <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
2011-02-25Merge branch 'drm-intel-fixes' of ↵Dave Airlie1-1/+1
git://git.kernel.org/pub/scm/linux/kernel/git/ickle/drm-intel into drm-fixes * 'drm-intel-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/ickle/drm-intel: drm/i915: Fix unintended recursion in ironlake_disable_rc6
2011-02-25drm/nv50: flesh out ZCULL init and match nvidia on later chipsetsBen Skeggs1-5/+34
Signed-off-by: Ben Skeggs <[email protected]>
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