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2011-01-11drm/i915: Mask USER interrupts on gen6 (until required)Chris Wilson5-62/+113
Otherwise we may consume 20% of the CPU just handling IRQs whilst rendering. Ouch. Signed-off-by: Chris Wilson <[email protected]>
2011-01-11drm/i915: Handle ringbuffer stalls when flushingChris Wilson4-43/+65
Signed-off-by: Chris Wilson <[email protected]>
2011-01-11drm/i915: Enforce write ordering through the GTTChris Wilson2-1/+16
We need to ensure that writes through the GTT land before any modification to the MMIO registers and so must impose a mandatory write barrier when flushing the GTT domain. This was revealed by relaxing the write ordering by experimentally mapping the registers and the GATT as write-combining. Signed-off-by: Chris Wilson <[email protected]>
2011-01-11drm/i915: Remove impossible testChris Wilson1-8/+0
As has_gem is unconditionally set to true, the conditional immediately following that assignment is superfluous. Signed-off-by: Chris Wilson <[email protected]>
2011-01-11drm/i915: avoid reading non-existent PLL reg on Ironlake+Jesse Barnes1-5/+7
These functions need to be reworked for Ironlake and above, but until then at least avoid reading non-existent registers. Signed-off-by: Jesse Barnes <[email protected]> [ickle: combine with a gratuitous tidy] Signed-off-by: Chris Wilson <[email protected]>
2011-01-11drm/i915: add 'reset' parameterChris Wilson1-0/+6
When bringing up new hardware, or otherwise experimenting, GPU hangs are a way of life. However, the automatic GPU reset can do more harm than good under these circumstances, as we may wish to capture a full trace for debugging. Based on a patch by Zhenyu Wang. Signed-off-by: Chris Wilson <[email protected]>
2011-01-11drm/i915: fix the wrong latency value while computing wm0Yuanhan Liu1-5/+5
On Ironlake, the LP0 latency is hardcoded and in ns unit, while on Sandybridge, it comes from a register and with unit 0.1 us. So, fix the wrong latency value while computing wm0 on Ironlake and Sandybridge. Signed-off-by: Yuanhan Liu <[email protected]> Signed-off-by: Chris Wilson <[email protected]>
2011-01-11drm/i915: support low power watermarks on IronlakeJesse Barnes2-130/+133
This patch actually makes the watermark code even uglier (if that's possible), but has the advantage of sharing code between SNB and ILK at least. Longer term we should refactor the watermark stuff into its own file and clean it up now that we know how it's supposed to work. Supporting WM2 on my Vaio reduced power consumption by around 0.5W, so this patch is definitely worthwhile (though it also needs lots of test coverage). Signed-off-by: Jesse Barnes <[email protected]> [ickle: pass the watermark structs arounds] Signed-off-by: Chris Wilson <[email protected]>
2011-01-11drm/i915: Workaround erratum on i830 for TAIL pointer within last 2 cachelinesChris Wilson2-3/+11
On i830 if the tail pointer is set to within 2 cachelines of the end of the buffer, the chip may hang. So instead if the tail were to land in that location, we pad the end of the buffer with NOPs, and start again at the beginning. Signed-off-by: Chris Wilson <[email protected]>
2011-01-11drm/i915: Use the mappable sizes determined by GTT for consistency.Chris Wilson2-17/+10
There should be no difference, but we can eliminate redundant code. Signed-off-by: Chris Wilson <[email protected]>
2011-01-11drm/i915: support overclocking on Sandy BridgeJesse Barnes2-0/+28
In some configuration, the PCU may allow us to overclock the GPU. Check for this case and adjust the max frequency as appropriate. Also initialize the min/max frequencies to default values as indicated by hardware. Signed-off-by: Jesse Barnes <[email protected]> Signed-off-by: Chris Wilson <[email protected]>
2011-01-11drm/i915/lvds: Always use 0 to disable the pfit controllerChris Wilson1-0/+4
... and just any combination of bits & ~PFIT_ENABLE. This way we do not attempt disable to the panel fitter controller uselessly upon intel_lvds_disable(). Signed-off-by: Chris Wilson <[email protected]>
2011-01-11drm/i915/panel: Only record the backlight level when it is enabledChris Wilson5-8/+39
By tracking the current status of the backlight we can prevent recording the value of the current backlight when we have disabled it. And so prevent restoring it to 'off' after an unbalanced sequence of intel_lvds_disable/enable. Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=22672 Tested-by: Alex Riesen <[email protected]> Tested-by: Larry Finger <[email protected]> Signed-off-by: Chris Wilson <[email protected]> Cc: [email protected]
2011-01-11drm/i915/sdvo: Defer detection of output capabilities until probingChris Wilson1-22/+11
Alex Fiestas reported an issue with his HDMI connector being misdetected as DVI unless he had something connected upon boot. By moving the decision as to whether to use HDMI or DVI encoding for the HDMI capable output until we probe the monitor means that we should avoid sending a HDMI signal to a DVI monitor and also correctly detect hardware like Alex's. However, to really determine what connector is soldered onto the wire we need to inspect the VBT sdvo child devices - but can we trust it? Reported-by: Alex Fiestas <[email protected]> Tested-by: Alex Fiestas <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=32828 Signed-off-by: Chris Wilson <[email protected]> Cc: [email protected]
2011-01-11drm/i915: fix calculation of eDP signal levels on SandybridgeYuanhan Liu2-11/+21
Some voltage swing/pre-emphasis level use the same value on eDP Sandybridge, like 400mv_0db and 600mv_0db are with the same value of (0x0 << 22). So, fix them, and point out the value if it isn't a supported voltage swing/pre-emphasis level. Signed-off-by: Yuanhan Liu <[email protected]> Signed-off-by: Chris Wilson <[email protected]> Cc: [email protected]
2011-01-11drm/i915/crt: Check for a analog monitor in case of DVI-IDavid Müller1-5/+25
Since Linux 2.6.36 the digital output on my system (855GME + DVI-I) is not working any longer. The analog output is always activated regardless of the type of monitor attached. The culprit seems to be intel_crt_detect_ddc(), which returns true as soon as an ACK from the EDID device is received. Obviously this approach does not work with DVI-I where the analog and digital outputs share a common DDC bus. In a similar manner to the shared DDC wire, ala the "Mac Mini Hack", we need an additional check to make sure that there really is an analog device attached to the DDC. Signed-off-by: David Müller <[email protected]> Signed-off-by: Chris Wilson <[email protected]> Cc: [email protected]
2011-01-11drm/i915: make DP training try a little harderJesse Barnes1-4/+23
When trying to do channel equalization, we need to make sure we still have clock recovery on all lanes while training. We also need to try clock recovery again if we lose the clock or if channel eq fails 5 times. We'll try clock recovery up to 5 more times before giving up entirely. Gets suspend/resume working on my Vaio again and brings us back into compliance with the DP training sequence spec. Signed-off-by: Jesse Barnes <[email protected]> Signed-off-by: Chris Wilson <[email protected]>
2011-01-11drm/i915: check eDP encoder correctly when setting modesJesse Barnes1-1/+1
We were using a stale pointer in the check which caused us to use CPU attached DP params when we should have been using PCH attached params. Signed-off-by: Jesse Barnes <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=31988 Tested-by: Jan-Hendrik Zab <[email protected]> Tested-by: Christoph Lukas <[email protected]> Signed-off-by: Chris Wilson <[email protected]> Cc: [email protected]
2011-01-10Merge branch 'drm-core-next' of ↵Linus Torvalds161-10138/+23969
git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6 * 'drm-core-next' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6: (390 commits) drm/radeon/kms: disable underscan by default drm/radeon/kms: only enable hdmi features if the monitor supports audio drm: Restore the old_fb upon modeset failure drm/nouveau: fix hwmon device binding radeon: consolidate asic-specific function decls for pre-r600 vga_switcheroo: comparing too few characters in strncmp() drm/radeon/kms: add NI pci ids drm/radeon/kms: don't enable pcie gen2 on NI yet drm/radeon/kms: add radeon_asic struct for NI asics drm/radeon/kms/ni: load default sclk/mclk/vddc at pm init drm/radeon/kms: add ucode loader for NI drm/radeon/kms: add support for DCE5 display LUTs drm/radeon/kms: add ni_reg.h drm/radeon/kms: add bo blit support for NI drm/radeon/kms: always use writeback/events for fences on NI drm/radeon/kms: adjust default clock/vddc tracking for pm on DCE5 drm/radeon/kms: add backend map workaround for barts drm/radeon/kms: fill gpu init for NI asics drm/radeon/kms: add disabled vbios accessor for NI asics drm/radeon/kms: handle NI thermal controller ...
2011-01-10drm/radeon/kms: disable underscan by defaultAlex Deucher1-3/+3
Lots of HDMI TVs overscan the incoming image by default. The underscan option was added as a way to compensate for that by underscanning the image so that the edges would not be cut off on an overscanning TV. However, the TV provides no way of knowing whether it is overscanning or not. If the user has disabled overscan on their TV or has a TV that does not overscan, you will get black bars around the edges of your screen. Prior to the patch we got complaints and bug reports from users with overscanning TVs, now with the patch, we get lots of complaints and bug reports from users with non-overscanning TVs. There's no good default, but on average there have been more users complaining about it being on by default than off, so change it to off. This will probably result in a new deluge of overscanning TV user complaints. There's no winning. Signed-off-by: Alex Deucher <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
2011-01-10drm/radeon/kms: only enable hdmi features if the monitor supports audioAlex Deucher1-3/+3
This avoids some issues in the current hdmi audio code for monitors without audio. Signed-off-by: Alex Deucher <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
2011-01-10Merge branch 'drm-radeon-ni' of ../drm-radeon-next into drm-core-nextDave Airlie25-149/+1593
* 'drm-radeon-ni' of ../drm-radeon-next: (30 commits) radeon: consolidate asic-specific function decls for pre-r600 drm/radeon/kms: add NI pci ids drm/radeon/kms: don't enable pcie gen2 on NI yet drm/radeon/kms: add radeon_asic struct for NI asics drm/radeon/kms/ni: load default sclk/mclk/vddc at pm init drm/radeon/kms: add ucode loader for NI drm/radeon/kms: add support for DCE5 display LUTs drm/radeon/kms: add ni_reg.h drm/radeon/kms: add bo blit support for NI drm/radeon/kms: always use writeback/events for fences on NI drm/radeon/kms: adjust default clock/vddc tracking for pm on DCE5 drm/radeon/kms: add backend map workaround for barts drm/radeon/kms: fill gpu init for NI asics drm/radeon/kms: add disabled vbios accessor for NI asics drm/radeon/kms: handle NI thermal controller drm/radeon/kms: parse DCE5 encoder caps when setting up encoders drm/radeon/kms: dvo dpms updates for DCE5 drm/radeon/kms: dac dpms updates for DCE5 drm/radeon/kms: DCE5 atom dig encoder updates drm/radeon/kms: DCE5 atom transmitter control updates ...
2011-01-10drm: Restore the old_fb upon modeset failureChris Wilson1-1/+4
... or else we may end up disabling the wrong framebuffer, leading to an OOPS, e.g: [ 6033.229012] kernel BUG at drivers/gpu/drm/i915/i915_gem.c:3271! [ 6033.229012] invalid opcode: 0000 [#1] SMP [ 6033.229012] last sysfs file: /sys/devices/virtual/backlight/acpi_video0/uevent [ 6033.229012] Modules linked in: sunrpc cpufreq_ondemand acpi_cpufreq mperf snd_hda_codec_analog snd_hda_intel snd_hda_codec snd_hwdep snd_seq snd_seq_device snd_pcm snd_timer thinkpad_acpi ppdev snd r852 sm_common iTCO_wdt uvcvideo i2c_i801 iTCO_vendor_support microcode wmi nand videodev nand_ids nand_ecc snd_page_alloc parport_pc parport mtd soundcore joydev v4l1_compat pcspkr uinput ipv6 sdhci_pci sdhci mmc_core yenta_socket i915 drm_kms_helper drm i2c_algo_bit i2c_core video output [last unloaded: scsi_wait_scan] [ 6033.229012] [ 6033.229012] Pid: 4834, comm: Xorg Not tainted 2.6.37-rc8+ #25 7661BL5/7661BL5 [ 6033.229012] EIP: 0060:[<f86fda5e>] EFLAGS: 00013246 CPU: 0 [ 6033.229012] EIP is at i915_gem_object_unpin+0x23/0x76 [i915] [ 6033.229012] EAX: f68a4000 EBX: f6831f00 ECX: 000600fa EDX: f68a8000 [ 6033.229012] ESI: f68a4014 EDI: f68a42b8 EBP: f2169c44 ESP: f2169c3c [ 6033.229012] DS: 007b ES: 007b FS: 00d8 GS: 00e0 SS: 0068 [ 6033.229012] Process Xorg (pid: 4834, ti=f2168000 task=f21c8000 task.ti=f2168000) [ 6033.229012] Stack: [ 6033.229012] f3a84800 f68a4014 f2169c54 f87045d8 f3a84800 f872d9a8 f2169c68 f7fd8091 [ 6033.229012] f3b952a4 00000000 f68a414c f2169cf0 f7fd9377 00000000 00000000 f7fd98b0 [ 6033.229012] f7fd9f4e 0000000f f7f328a0 00000000 00000000 00000000 f2169ca4 f68a414c [ 6033.229012] Call Trace: [ 6033.229012] [<f87045d8>] ? intel_crtc_disable+0x36/0x41 [i915] [ 6033.229012] [<f7fd8091>] ? drm_helper_disable_unused_functions+0xcd/0xf9 [drm_kms_helper] [ 6033.229012] [<f7fd9377>] ? drm_crtc_helper_set_config+0x62a/0x7f7 [drm_kms_helper] [ 6033.229012] [<c04daa10>] ? __slab_free+0x1b/0xa4 [ 6033.229012] [<f7fd7e62>] ? drm_fb_helper_initial_config+0x466/0x497 [drm_kms_helper] [ 6033.229012] [<f7fd7ea3>] ? drm_fb_helper_restore+0x10/0x2a [drm_kms_helper] [ 6033.229012] [<f86f2577>] ? i915_driver_lastclose+0x2a/0x57 [i915] [ 6033.229012] [<f7f1989f>] ? drm_lastclose+0x45/0x23e [drm] [ 6033.229012] [<f7f1a0b4>] ? drm_release+0x462/0x4d7 [drm] Signed-off-by: Chris Wilson <[email protected]> Cc: [email protected] Signed-off-by: Dave Airlie <[email protected]>
2011-01-10Merge remote branch 'nouveau/drm-nouveau-next' of ../drm-nouveau-next into ↵Dave Airlie14-79/+143
drm-core-next * 'nouveau/drm-nouveau-next' of ../drm-nouveau-next: drm/nouveau: fix hwmon device binding drm/nouveau: create grctx on the fly on all chipsets drm/nvc0: fix init without firmware present drm/nvc0/pgraph: fix 0x406028/0x405870 init drm/nvc0/pgraph: more unit names drm/nvc0/pfifo: support for chipsets with only one PSUBFIFO (0xc1) drm/nvc0: reserve only subc 0 for kernel use drm/nv50: sync up gr data error names with rnn, use for nvc0 also drm/nvc0: parse a couple more PGRAPH_INTR drm/nvc0: nuke left-over debug messages drm/nvc0: kill off a couple more magics drm/nouveau: Validate channel indices passed from userspace. drm/nouveau: Only select ACPI_VIDEO if its dependencies are met
2011-01-07Merge branch 'for-2.6.38' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/wqLinus Torvalds2-3/+2
* 'for-2.6.38' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/wq: (33 commits) usb: don't use flush_scheduled_work() speedtch: don't abuse struct delayed_work media/video: don't use flush_scheduled_work() media/video: explicitly flush request_module work ioc4: use static work_struct for ioc4_load_modules() init: don't call flush_scheduled_work() from do_initcalls() s390: don't use flush_scheduled_work() rtc: don't use flush_scheduled_work() mmc: update workqueue usages mfd: update workqueue usages dvb: don't use flush_scheduled_work() leds-wm8350: don't use flush_scheduled_work() mISDN: don't use flush_scheduled_work() macintosh/ams: don't use flush_scheduled_work() vmwgfx: don't use flush_scheduled_work() tpm: don't use flush_scheduled_work() sonypi: don't use flush_scheduled_work() hvsi: don't use flush_scheduled_work() xen: don't use flush_scheduled_work() gdrom: don't use flush_scheduled_work() ... Fixed up trivial conflict in drivers/media/video/bt8xx/bttv-input.c as per Tejun.
2011-01-07drm/nouveau: fix hwmon device bindingLucas Stach1-2/+1
Bind the hwmon structs to nouveau device kobj. This makes sure the hwmon files are created in the device subdir in line with all other hwmon drivers. Signed-off-by: Lucas Stach <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2011-01-07radeon: consolidate asic-specific function decls for pre-r600Daniel Vetter2-62/+50
Move them to radeon_asic.h together with the other asic specific stuff. Signed-off-by: Daniel Vetter <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
2011-01-07drm/radeon/kms: don't enable pcie gen2 on NI yetAlex Deucher1-1/+2
Still needs to be implemented. Signed-off-by: Alex Deucher <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
2011-01-07drm/radeon/kms: add radeon_asic struct for NI asicsAlex Deucher1-0/+51
Signed-off-by: Alex Deucher <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
2011-01-07drm/radeon/kms/ni: load default sclk/mclk/vddc at pm initAlex Deucher1-0/+18
The vbios only partially initializes the memory controller on NI, so now we need to load the MC ucode in the driver and set the default clocks once the ucode is loaded. Signed-off-by: Alex Deucher <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
2011-01-07drm/radeon/kms: add ucode loader for NIAlex Deucher5-4/+380
The MC ucode is no longer loaded by the vbios tables as on previous asics. It now must be loaded by the driver. Signed-off-by: Alex Deucher <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
2011-01-07drm/radeon/kms: add support for DCE5 display LUTsAlex Deucher1-3/+65
The hardware supports advanced user defined color management but at the moment, there is no infrastructure in place to take advantage of it so for now we just support the legacy LUTs. Signed-off-by: Alex Deucher <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
2011-01-07drm/radeon/kms: add ni_reg.hAlex Deucher2-0/+87
This adds some new NI (northern islands) specific display register defines. Signed-off-by: Alex Deucher <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
2011-01-07drm/radeon/kms: add bo blit support for NIAlex Deucher1-2/+67
Signed-off-by: Alex Deucher <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
2011-01-07drm/radeon/kms: always use writeback/events for fences on NIAlex Deucher1-0/+5
Signed-off-by: Alex Deucher <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
2011-01-07drm/radeon/kms: adjust default clock/vddc tracking for pm on DCE5Alex Deucher3-17/+29
NI chips no longer load the MC ucode in the asic_init sequence so the asic comes up in a basic mode with low engine/memory clocks and a voltage. Once the MC ucode is loaded by the driver the card can be programmed to it's proper default clocks and voltage. As such the default clocks in the firmware info table as the post clocks, not the default running clocks. Track the default post clocks and default running clocks separately to handle this. Signed-off-by: Alex Deucher <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
2011-01-07drm/radeon/kms: add backend map workaround for bartsAlex Deucher1-0/+1
Same as Cypress. Signed-off-by: Alex Deucher <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
2011-01-07drm/radeon/kms: fill gpu init for NI asicsAlex Deucher1-0/+71
Signed-off-by: Alex Deucher <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
2011-01-07drm/radeon/kms: add disabled vbios accessor for NI asicsAlex Deucher1-0/+41
Some systems disable the vbios on secondary cards or cards that have been posted. This code re-enabled the vbios so the driver can load it. Signed-off-by: Alex Deucher <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
2011-01-07drm/radeon/kms: handle NI thermal controllerAlex Deucher3-0/+8
Signed-off-by: Alex Deucher <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
2011-01-07drm/radeon/kms: parse DCE5 encoder caps when setting up encodersAlex Deucher3-10/+41
Needed to tell which DIG encoders are HBR2 capable for DP 1.2. Signed-off-by: Alex Deucher <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
2011-01-07drm/radeon/kms: dvo dpms updates for DCE5Alex Deucher1-1/+15
The DVOOutputControl table was removed for DCE5. DVOEncoderControl now handles everything. Signed-off-by: Alex Deucher <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
2011-01-07drm/radeon/kms: dac dpms updates for DCE5Alex Deucher1-6/+22
The DAC1OutputControl table was removed for DCE5. DAC1EncoderControl now handles everything. Signed-off-by: Alex Deucher <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
2011-01-07drm/radeon/kms: DCE5 atom dig encoder updatesAlex Deucher1-5/+26
Signed-off-by: Alex Deucher <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
2011-01-07drm/radeon/kms: DCE5 atom transmitter control updatesAlex Deucher1-5/+14
Signed-off-by: Alex Deucher <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
2011-01-07drm/radeon/kms: DCE5 atom spread spectrum updatesAlex Deucher1-1/+25
Signed-off-by: Alex Deucher <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
2011-01-07drm/radeon/kms: DCE5 atom SetPixelClock updatesAlex Deucher2-9/+47
Signed-off-by: Alex Deucher <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
2011-01-07drm/radeon/kms: DCE5 supports 16k display surfacesAlex Deucher1-1/+4
Signed-off-by: Alex Deucher <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
2011-01-07drm/radeon/kms: update display watermark calculations for DCE5Alex Deucher1-4/+16
Signed-off-by: Alex Deucher <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
2011-01-07drm/radeon/kms: add NI chip familiesAlex Deucher3-0/+7
Signed-off-by: Alex Deucher <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
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