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path: root/drivers/gpu/drm/radeon
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2012-09-20drm/radeon: document radeon_atpx_handler.c (v2)Alex Deucher1-0/+111
v2: rebase updates Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2012-09-20drm/radeon: reorganize ATPX support (v2)Alex Deucher1-60/+110
- rework the acpi execute code - User proper parameters for ATPX functions v2: rebase fixes Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2012-09-20drm/radeon: update ATPX verify interface handling (v2)Alex Deucher1-17/+124
Verify the ATPX interface and track what ATPX functions are available for future use. v2: rework due to tree changes Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2012-09-20drm/radeon: document radeon_acpi.cAlex Deucher1-0/+101
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2012-09-20drm/radeon: block the keypress on ATIF eventsLuca Tettamanti1-1/+6
The AMD ACPI interface may use ACPI_VIDEO_NOTIFY_PROBE to signal SBIOS requests; block the keypress in this case since the user did not actually press the mode switch key. Signed-off-by: Luca Tettamanti <kronos.it@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2012-09-20drm/radeon: re-organize the acpi notifier callbackAlex Deucher4-43/+48
Move it out of the radeon_pm.c and into radeon_acpi.c since we use it for more than just pm now. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2012-09-20drm/radeon: implement handler for ACPI eventLuca Tettamanti7-11/+152
Set up an handler for ACPI events and respond to brightness change requests from the system BIOS. v2: fix notification when using device-specific command codes (tested by Pali Rohár <pali.rohar@gmail.com>); cache the encoder controlling the backlight during the initialization to avoid searching it every time (suggested by Alex Deucher). v3: whitespace fixes (Alex Deucher). Signed-off-by: Luca Tettamanti <kronos.it@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2012-09-20drm/radeon: implement wrapper for GET_SYSTEM_PARAMSLuca Tettamanti1-2/+83
Use GET_SYSTEM_PARAMS for retrieving the configuration for the system BIOS notifications. v2: packed struct (Lee, Chun-Yi <jlee@suse.com>) v3: fix enable with device specific command code Signed-off-by: Luca Tettamanti <kronos.it@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2012-09-20drm/radeon: implement radeon_atif_verify_interfaceLuca Tettamanti2-6/+113
Wrap the call to VERIFY_INTERFACE and add the parsing of the support vectors. v2: use a packed struct for handling the output of ACPI calls, hides ugly pointer arithmetics (Lee, Chun-Yi <jlee@suse.com>). v3: fix radeon_atif_parse_functions handling (Alex Deucher) Signed-off-by: Luca Tettamanti <kronos.it@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2012-09-20drm/radeon: refactor radeon_atif_callLuca Tettamanti1-15/+23
Don't hard-code function number, this will allow to reuse the function. v2: add support for the 2nd parameter (from Lee, Chun-Yi <jlee@suse.com>). Signed-off-by: Luca Tettamanti <kronos.it@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2012-09-20drm/radeon: add backlight control for atom devices (v2)Alex Deucher3-16/+248
On systems that use the build in GPU backlight controller, we can use atom tables to change the brightness level. v2: use firmware flags Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2012-09-20drm/radeon: rework legacy backlight controlAlex Deucher2-13/+17
To better enable sharing with atom backlight control. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2012-09-20drm/radeon: track whether the GPU controls the backlight (v2)Alex Deucher2-0/+6
A table in the vbios tells us whether the GPU backlight controller is used or not. If the bit is set, the GPU backlight controller is used; if it is not set, an off-chip backlight controller is used. v2: store all the firmware flags, not just BL control Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2012-09-20drm/radeon: add a license header to radeon_apci.cAlex Deucher1-0/+23
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2012-09-20drm/radeon: add new AMD ACPI header and update relevant code (v2)Alex Deucher3-22/+455
Add a new header that defines the AMD ACPI interface used for laptops, PowerXpress, and chipset specific functionality and update the current code to use it. Todo: - properly verify the ACPI interfaces - hook up and handle ACPI notifications - make PX code more robust - implement PCIe Gen and width switching using ACPI v2: fix typo in header Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2012-09-20Annotate int2float() as being a pure function.Steven Fuerst2-2/+2
This allows gcc to fold duplicate calls into a single call. Since the current users do actually call it multiple times with the same arguments, this is an obvious win. Signed-off-by: Steven Fuerst <svfuerst@gmail.com>
2012-09-20Replace int2float() with an optimized version.Steven Fuerst1-23/+28
We use __fls() to find the most significant bit. Using that, the loop can be avoided. A second trick is to use the behaviour of the rotate instructions to expand the range of the unsigned int to float conversion to the full 32 bits in a branchless way. The routine is now exact up to 2^24. Above that, we truncate which is equivalent to rounding towards zero. Signed-off-by: Steven Fuerst <svfuerst@gmail.com>
2012-09-20Rename i2f() to int2float(), and make it global so one copy can be removed.Steven Fuerst3-79/+40
Remove the copy of i2f() in r600_blit_kms.c We rename the function to something longer now that it is a global symbol. This reduces the likelyhood of unintended clashes later. This might be a candidate for inclusion inside general drm infrastructure. However, at the moment only the radeon driver uses it. Signed-off-by: Steven Fuerst <svfuerst@gmail.com>
2012-09-20drm/radeon: remove gui_idle interrupt infrastructureAlex Deucher8-91/+0
It was only used for dynpm, but has been replaced with a better implementation using fences. Remove it. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2012-09-20drm/radeon/dynpm: wait for fences on all rings when reclockingAlex Deucher1-11/+6
1. Drop gui idle stuff, it's not as reliable as fences and only covers the 3D engine. 2. Wait for fences on all rings. This makes sure all rings are idle when reclocking. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2012-09-20drm/radeon: properly handle mc_stop/mc_resume on evergreen+ (v2)Alex Deucher4-91/+88
- Stop the displays from accessing the FB - Block CPU access - Turn off MC client access This should fix issues some users have seen, especially with UEFI, when changing the MC FB location that result in hangs or display corruption. v2: fix crtc enabled check noticed by Luca Tettamanti Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2012-09-20drm/radeon/r5xx-r7xx: don't use radeon_crtc for vblank callback (v2)Alex Deucher1-4/+12
This might be called before we've allocated the radeon_crtcs v2: fix typo in array size Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2012-09-20drm/radeon/r1xx-r4xx: don't use radeon_crtc for vblank callbackAlex Deucher1-2/+4
This might be called before we've allocated the radeon_crtcs Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2012-09-20drm/radeon: clean up evergreen_get_vblank_counterAlex Deucher1-15/+3
Use the new offset array rather than open coding it. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2012-09-20drm/radeon/dce4+: don't use radeon_crtc for vblank callbackAlex Deucher1-4/+16
This might be called before we've allocated the radeon_crtcs Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2012-09-20drm/radeon: Prevent leak of scratch register on resume from suspendSimon Kitching1-1/+2
Cards typically have 5-7 scratch registers; one of these is reserved for rdev->rptr_save_reg. Unfortunately the reservation is done in function r100_cp_init, which is called by all drivers except r600 - and this function is also invoked on resume from suspend. After several resumes, no scratch registers are free and graphics acceleration is disabled. Dmesg then reports either: *ERROR* radeon: cp failed to get scratch reg (-22). *ERROR* radeon: cp isn't working(-22). radeon 0000:01:00.0: failed initializing CP (-22). or: *ERROR* radeon: failed to get scratch reg (-22). *ERROR* radeon: failed testing IB on GFX ring (-22). *ERROR* ib ring test failed (-22). The chain of calls on boot for all except r600 is: radeon_init -> ... -> (rXXX_init) -> rXXX_startup -> r100_cp_init The chain of calls on resume for all except r600 is: rXXX_resume -> rXXX_startup -> r100_cp_init. R600 correctly allocates rptr_save_reg in r600_init (ie once only, not in resume). However moving the code into the init functions for all drivers means touching 4 drivers. So instead, this patch just adds a test in r100_cp_init to avoid reallocating on resume. As the rdev structure is allocated via kzalloc in radeon_driver_load_kms, and zero is not a valid registerid, zero safely implies not-yet-allocated. This issue appears to have been introduced in c7eff978 (3.6.0-rcN) Signed-off-by: Simon Kitching <skitching@vonos.net> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2012-09-17Revert "drm/radeon: rework pll selection (v3)"Alex Deucher1-129/+34
This reverts commit 985f61f7ee647ad570c05eab0b74915da2ac8e19. This commit fixed certain cases, but ended up regressing others due to limitations in the current KMS API. A proper fix is too invasive for 3.6. Push it back to 3.7. Reported-by: Andres Freund <andres@anarazel.de> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2012-09-13drm/radeon: make 64bit fences more robust v3Christian König1-3/+5
Only increase the higher 32bits if we really detect a wrap around. v2: instead of increasing the higher 32bits just use the higher 32bits from the last emitted fence. v3: also use last emitted fence value as upper limit. The intention of this patch is to make fences as robust as they where before introducing 64bit fences. This is necessary because on older systems it looks like the fence value gets corrupted on initialization. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=51344 Should also fix: https://bugs.freedesktop.org/show_bug.cgi?id=54129 https://bugs.freedesktop.org/show_bug.cgi?id=54662 https://bugzilla.redhat.com/show_bug.cgi?id=846505 https://bugzilla.redhat.com/show_bug.cgi?id=845639 3.5 needs a separate patch due to changes in the fence code. Will send that out separately. Signed-off-by: Christian König <deathsimple@vodafone.de> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2012-09-13drm/radeon: rework pll selection (v3)Alex Deucher1-34/+129
For DP we can use the same PPLL for all active DP encoders. Take advantage of that to prevent cases where we may end up sharing a PPLL between DP and non-DP which won't work. Also clean up the code a bit. v2: - fix missing pll_id assignment in crtc init v3: - fix DP PPLL check - document functions - break in main encoder search loop after matching. no need to keep checking additional encoders. fixes: https://bugs.freedesktop.org/show_bug.cgi?id=54471 Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2012-08-29drm/radeon: fix dig encoder selection on DCE61Alex Deucher1-5/+26
Was using the DCE41 code which was wrong. Fixes blank displays on a number of Trinity systems. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2012-08-29drm/radeon: fix double free in radeon_gpu_resetChristian König1-0/+3
radeon_ring_restore is freeing the memory for the saved ring data. We need to remember that, otherwise we try to restore the ring data again on the next try. Additional to that it shouldn't try the reset infinitely if we have saved ring data. Signed-off-by: Christian König <deathsimple@vodafone.de> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2012-08-29drm/radeon: force dma32 to fix regression rs4xx,rs6xx,rs740Jerome Glisse1-1/+1
It seems some of those IGP dislike non dma32 page despite what documentation says. Fix regression since we allowed non dma32 pages. It seems it only affect some revision of those IGP chips as we don't know which one just force dma32 for all of them. https://bugzilla.redhat.com/show_bug.cgi?id=785375 Signed-off-by: Jerome Glisse <jglisse@redhat.com> Cc: <stable@vger.kernel.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2012-08-29drm/radeon: rework panel mode setupAlex Deucher1-17/+12
Adjust the panel mode setup to match the behavior of the vbios. Rather than checking for specific bridge chip ids, just check the eDP configuration register. This saves extra aux transactions and works across DP bridge chips without requiring additional per chip id checking. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2012-08-29drm/radeon/atom: powergating fixes for DCE6Alex Deucher1-20/+2
Power gating is per crtc pair, but the powergating registers should be called individually. The hw handles power up/down properly. The pair is powered up if either crtc in the pair is powered up and the pair is not powered down until both crtcs in the pair are powered down. This simplifies programming and should save additional power as the previous code never actually power gated the crtc pair. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2012-08-29drm/radeon/atom: rework DIG modesetting on DCE3+Alex Deucher1-62/+47
The ordering is important and the current drm code wasn't cutting it for modern DIG encoders. We need to have information about crtc before setting up the encoders so I've shifted the ordering a bit. Probably we'll need a full rework akin to danvet's recent intel patchs. This patch fixes numerous issues with DP bridge chips and makes link training much more reliable. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2012-08-29drm/radeon: don't disable plls that are in use by other crtcsAlex Deucher1-0/+14
Some plls are shared for DP. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2012-08-29drm/radeon: add proper checking of RESOLVE_BOX command for r600-r700Marek Olšák4-4/+27
Checking of the second colorbuffer was skipped on r700, because CB_TARGET_MASK was 0xf. With r600, CB_TARGET_MASK is changed to 0xff, so we must set the number of samples of the second colorbuffer to 1 in order to pass the CS checker. The DRM version is bumped, because RESOLVE_BOX is always rejected without this fix on r600. Signed-off-by: Marek Olšák <maraeo@gmail.com> Reviewed-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2012-08-29drm/radeon: initialize tracked CS stateMarek Olšák1-1/+8
This should help catch uninitialized registers and reject commands because of that. Signed-off-by: Marek Olšák <maraeo@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2012-08-29drm/radeon: fix reading CB_COLORn_MASK from the CSMarek Olšák1-1/+1
Signed-off-by: Marek Olšák <maraeo@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2012-08-21drm/radeon/ss: use num_crtc rather than hardcoded 6Alex Deucher1-1/+1
When checking if a pll is in use. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2012-08-21Revert "drm/radeon: fix bo creation retry path"Alex Deucher1-2/+1
This reverts commit d1c7871ddb1f588b8eb35affd9ee1a3d5e11cd0c. ttm_bo_init() destroys the BO on failure. So this patch makes the retry path work with freed memory. This ends up causing kernel panics when this path is hit. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2012-08-20drm/radeon: split ATRM support out from the ATPX handler (v3)Alex Deucher3-74/+77
There are systems that use ATRM, but not ATPX. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=41265 V2: fix #ifdefs as per Greg's comments V3: fix it harder Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2012-08-20drm/radeon: convert radeon vfct code to use acpi_get_table_with_sizeAlex Deucher1-4/+2
Allows us to verify the table size. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2012-08-20drm/radeon: implement ACPI VFCT vbios fetch (v3)David Lamparter1-0/+60
This is required for pure UEFI systems. The vbios is stored in ACPI rather than at the legacy vga location. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=26891 V2: fix #ifdefs as per Greg's comments V3: fix it harder Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Jerome Glisse <jglisse@redhat.com> Cc: stable@vger.kernel.org
2012-08-20drm/radeon/kms: extend the Fujitsu D3003-S2 board connector quirk to cover ↵Tvrtko Ursulin1-1/+1
later silicon stepping There is a more recent APU stepping with a new PCI ID shipping in the same board by Fujitsu which needs the same quirk to correctly mark the back plane connectors. Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@onelan.co.uk> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2012-08-20drm/radeon: fix checking of MSAA renderbuffers on r600-r700Marek Olšák1-5/+6
The MSAA checking was mostly unimplemented on r600-r700. The userspace submits GPU commands and the kernel driver computes how much memory the GPU will access and checks if it's all within buffer bounds the userspace allocated. This patch fixes the computations of the size of MSAA surfaces in memory. Signed-off-by: Marek Olšák <maraeo@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2012-08-20drm/radeon: allow CMASK and FMASK in the CS checker on r600-r700Marek Olšák4-21/+101
MSAA is impossible without them. Signed-off-by: Marek Olšák <maraeo@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Jerome Glisse <jglisse@redhat.com>
2012-08-20drm/radeon: init lockup timeout on ring initChristian König1-0/+1
Reset the lockup timeout on ring (re-)initialisation. Otherwise we get error messages like this on gpu resets: [ 1559.949177] radeon 0000:01:00.0: GPU lockup CP stall for more than 1482270msec Signed-off-by: Christian König <deathsimple@vodafone.de> cc: stable@vger.kernel.org Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2012-08-20drm/radeon: avoid turning off spread spectrum for used pllJerome Glisse1-4/+21
If spread spectrum is enabled and in use for a given pll we should not turn it off as it will lead to turning off display for crtc that use the pll (this behavior was observed on chelsea edp). Signed-off-by: Jerome Glisse <jglisse@redhat.com> Cc: stable@vger.kernel.org Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2012-08-13drm/radeon: fix typo in function header commentDmitrii Cherkasov1-1/+1
Signed-off-by: Dmitrii Cherkasov <DCherkasov@luxsoft.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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