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2015-01-22radeon/audio: consolidate audio_fini() functionsSlava Grigorev1-1/+1
Reviewed-by: Christian König <[email protected]> Signed-off-by: Slava Grigorev <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-01-22radeon/audio: consolidate audio_init() functionsSlava Grigorev1-1/+2
Reviewed-by: Christian König <[email protected]> Signed-off-by: Slava Grigorev <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-01-08drm/radeon: fix VM flush on SI (v3)Alex Deucher1-0/+10
We need to wait for the GPUVM flush to complete. There was some confusion as to how this mechanism was supposed to work. The operation is not atomic. For GPU initiated invalidations you need to read back a VM register to introduce enough latency for the update to complete. v2: drop gart changes v3: just read back rather than polling Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2014-12-02Merge tag 'v3.18-rc7' into drm-nextDave Airlie1-0/+3
This fixes a bunch of conflicts prior to merging i915 tree. Linux 3.18-rc7 Conflicts: drivers/gpu/drm/exynos/exynos_drm_drv.c drivers/gpu/drm/i915/i915_drv.c drivers/gpu/drm/i915/intel_pm.c drivers/gpu/drm/tegra/dc.c
2014-11-20drm/radeon: use one VMID for each ringChristian König1-3/+3
Use multiple VMIDs for each VM, one for each ring. That allows us to execute flushes separately on each ring, still not ideal cause in a lot of cases rings can share IDs. Signed-off-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2014-11-20drm/radeon: rework vm_flush parametersChristian König1-11/+7
Use ring structure instead of index and provide vm_id and pd_addr separately. Signed-off-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2014-11-06drm/radeon: make sure mode init is complete in bandwidth_updateAlex Deucher1-0/+3
The power management code calls into the display code for certain things. If certain power management sysfs attributes are called before the driver has finished initializing all of the hardware we can run into problems with uninitialized modesetting state. Add a check to make sure modesetting init has completed to the bandwidth update callbacks to fix this. Can be triggered by the tlp and laptop start up scripts depending on the timing. bugs: https://bugzilla.kernel.org/show_bug.cgi?id=83611 https://bugs.freedesktop.org/show_bug.cgi?id=85771 Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2014-10-14Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linuxLinus Torvalds1-1/+7
Pull drm updates from Dave Airlie: "This is the main git pull for the drm, I pretty much froze major pulls at -rc5/6 time, and haven't had much fallout, so will probably continue doing that. Lots of changes all over, big internal header cleanup to make it clear drm features are legacy things and what are things that modern KMS drivers should be using. Also big move to use the new generic fences in all the TTM drivers. core: atomic prep work, vblank rework changes, allows immediate vblank disables major header reworking and cleanups to better delinate legacy interfaces from what KMS drivers should be using. cursor planes locking fixes ttm: move to generic fences (affects all TTM drivers) ppc64 caching fixes radeon: userptr support, uvd for old asics, reset rework for fence changes better buffer placement changes, dpm feature enablement hdmi audio support fixes intel: Cherryview work, 180 degree rotation, skylake prep work, execlist command submission full ppgtt prep work cursor improvements edid caching, vdd handling improvements nouveau: fence reworking kepler memory clock work gt21x clock work fan control improvements hdmi infoframe fixes DP audio ast: ppc64 fixes caching fix rcar: rcar-du DT support ipuv3: prep work for capture support msm: LVDS support for mdp4, new panel, gpu refactoring exynos: exynos3250 SoC support, drop bad mmap interface, mipi dsi changes, and component match support" * 'drm-next' of git://people.freedesktop.org/~airlied/linux: (640 commits) drm/mst: rework payload table allocation to conform better. drm/ast: Fix HW cursor image drm/radeon/kv: add uvd/vce info to dpm debugfs output drm/radeon/ci: add uvd/vce info to dpm debugfs output drm/radeon: export reservation_object from dmabuf to ttm drm/radeon: cope with foreign fences inside the reservation object drm/radeon: cope with foreign fences inside display drm/core: use helper to check driver features drm/radeon/cik: write gfx ucode version to ucode addr reg drm/radeon/si: print full CS when we hit a packet 0 drm/radeon: remove unecessary includes drm/radeon/combios: declare legacy_connector_convert as static drm/radeon/atombios: declare connector convert tables as static drm/radeon: drop btc_get_max_clock_from_voltage_dependency_table drm/radeon/dpm: drop clk/voltage dependency filters for BTC drm/radeon/dpm: drop clk/voltage dependency filters for CI drm/radeon/dpm: drop clk/voltage dependency filters for SI drm/radeon/dpm: drop clk/voltage dependency filters for NI drm/radeon: disable audio when we disable hdmi (v2) drm/radeon: split audio enable between eg and r600 (v2) ...
2014-10-01drm/radeon/si: print full CS when we hit a packet 0Alex Deucher1-1/+7
We should never have a packet 0 in the command stream. Dump the full command stream to help debug. bug: https://bugs.freedesktop.org/show_bug.cgi?id=84500 Signed-off-by: Alex Deucher <[email protected]>
2014-09-22drm/radeon: Update IH_RB_RPTR register after each processed interruptMichel Dänzer1-1/+1
This might decrease the chance of IH ring buffer overflows. Signed-off-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2014-09-22drm/radeon: Make IH ring overflow debugging output more usefulMichel Dänzer1-2/+2
Use the same format for all ring indices, and fix the calculation of the post-overflow RPTR. Signed-off-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2014-09-22drm/radeon: Clear RB_OVERFLOW bit earlierMichel Dänzer1-1/+1
Otherwise the bit remains set in rdev->ih.rptr, so the wptr can never match that and we still have an infinite loop. This fix allows me to successfully recover from an IH ring buffer overflow. Signed-off-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2014-08-27radeon: Test for PCI root bus before assuming bus->selfAlex Williamson1-1/+5
If we assign a Radeon device to a virtual machine, we can no longer assume a fixed hardware topology, like the GPU having a parent device. This patch simply adds a few pci_is_root_bus() tests to avoid passing a NULL pointer to PCI access functions, allowing the radeon driver to work in a QEMU 440FX machine with an assigned HD8570 on the emulated PCI root bus. Signed-off-by: Alex Williamson <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2014-08-26drm/radeon: save/restore the PD addr on suspend/resumeChristian König1-2/+13
This fixes a problem with GPU resets and TLB flushes on SI/CIK. Signed-off-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2014-08-19drm/radeon: fix active_cu mask on SI and CIK after re-init (v3)Alex Deucher1-0/+1
Need to initialize the mask to 0 on init, otherwise it keeps increasing. bug: https://bugzilla.kernel.org/show_bug.cgi?id=82581 v2: also fix cu count v3: split count fix into separate patch Signed-off-by: Alex Deucher <[email protected]> Reviewed-by: Michel Dänzer <[email protected]> Cc: [email protected]
2014-08-19drm/radeon: fix active cu count for SI and CIKAlex Deucher1-5/+3
This fixes the CU count reported to userspace for OpenCL. bug: https://bugzilla.kernel.org/show_bug.cgi?id=82581 Signed-off-by: Alex Deucher <[email protected]> Reviewed-by: Michel Dänzer <[email protected]> Cc: [email protected]
2014-08-18drm/radeon: Only flush HDP cache for indirect buffers from userspaceMichel Dänzer1-3/+3
It isn't necessary for command streams generated by the kernel (at least not while we aren't storing ring or indirect buffers in VRAM). Signed-off-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2014-08-15drm/radeon: use pfp for all vm_flush related updatesAlex Deucher1-2/+2
May fix hangs in some cases. Signed-off-by: Alex Deucher <[email protected]>
2014-08-05drm/radeon: Use pflip irqs for pageflip completion if possible. (v2)Mario Kleiner1-1/+2
Skip the "manual" pageflip completion checks via polling and guessing in the vblank handler radeon_crtc_handle_vblank() on asics which are known to reliably support hw pageflip completion irqs. Those pflip irqs are a more reliable and race-free method of handling pageflip completion detection, whereas the "classic" polling method has some small races in combination with dpm on, and with the reworked pageflip implementation since Linux 3.16. On old asics without pflip irqs, the classic method is used. On asics with known good pflip irqs, only pflip irqs are used by default, but a new module parameter "use_pflipirqs" allows to override this in case we encounter asics in the wild with unreliable or faulty pflip irqs. A module parameter of 0 allows to use the classic method only in such a case. A parameter of 1 allows to use both classic method and pflip irqs as additional band-aid to avoid some small races which could happen with the classic method alone. The setting 1 gives Linux 3.16 behaviour. Hw pflip irqs are available since R600. Tested on DCE-4, AMD Cedar - FirePro 2270. v2: agd5f: only enable pflip interrupts on DCE4+ as they are not reliable on older asics. Signed-off-by: Mario Kleiner <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2014-08-05drm/radeon: set VM base addr using the PFP v2Christian König1-1/+1
Seems to make VM flushes more stable on SI and CIK. v2: only use the PFP on the GFX ring on CIK Signed-off-by: Christian König <[email protected]> Cc: [email protected] Signed-off-by: Alex Deucher <[email protected]>
2014-08-05drm/radeon: Remove radeon_gart_restore()Michel Dänzer1-1/+0
Doesn't seem necessary, the GART table memory should be persistent. Signed-off-by: Michel Dänzer <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2014-08-05drm/radeon/si: Add support for new ucode format (v3)Alex Deucher1-120/+334
This adds SI support for the new ucode format. v2: add size validation, integrate debug info v3: update to latest version Signed-off-by: Alex Deucher <[email protected]>
2014-07-23drm/radeon: fix irq ring buffer overflow handlingChristian König1-0/+1
We must mask out the overflow bit as well, otherwise the wptr will never match the rptr again and the interrupt handler will loop forever. Signed-off-by: Christian König <[email protected]> Cc: [email protected] Signed-off-by: Alex Deucher <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
2014-07-10drm/radeon: only print meaningful VM faultsChristian König1-2/+4
Signed-off-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2014-06-09drm/radeon: add query for number of active CUsAlex Deucher1-1/+10
Query to find out how many compute units on a GPU. Useful for OpenCL usermode drivers. Signed-off-by: Alex Deucher <[email protected]>
2014-06-09drm/radeon: make vm_block_size a module parameterChristian König1-1/+1
Signed-off-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2014-06-09drm/radeon: use lower_32_bits where appropriateChristian König1-2/+2
Replace occurrences of "v & 0xffffffff" with lower_32_bits(v) when it's next to an upper_32_bits(v). Also remove unnecessary "upper_32_bits(v) & 0xffffffff" code snippets. Signed-off-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2014-06-05Merge commit '9e9a928eed8796a0a1aaed7e0b676db86ba84594' into drm-nextDave Airlie1-7/+21
Merge drm-fixes into drm-next. Both i915 and radeon need this done for later patches. Conflicts: drivers/gpu/drm/drm_crtc_helper.c drivers/gpu/drm/i915/i915_drv.h drivers/gpu/drm/i915/i915_gem.c drivers/gpu/drm/i915/i915_gem_execbuffer.c drivers/gpu/drm/i915/i915_gem_gtt.c
2014-06-02drm/radeon: separate vblank and pflip crtc handlingChristian König1-6/+6
Signed-off-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2014-06-02drm/radeon: add proper support for RADEON_VM_BLOCK_SIZE v2Christian König1-0/+1
This patch makes it possible to decide how many address bits are spend on the page directory vs the page tables. v2: remove unintended change Signed-off-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2014-06-02drm/radeon: add large PTE support for NI, SI and CIK v5Christian König1-1/+4
This patch implements support for VRAM page table entry compression. PTE construction is enhanced to identify physically contiguous page ranges and mark them in the PTE fragment field. L1/L2 TLB support is enabled for 64KB (SI/CIK) and 256KB (NI) PTE fragments, significantly improving TLB utilization for VRAM allocations. Linear store bandwidth is improved from 60GB/s to 125GB/s on Pitcairn. Unigine Heaven 3.0 sees an average improvement from 24.7 to 27.7 FPS on default settings at 1920x1200 resolution with vsync disabled. See main comment in radeon_vm.c for a technical description. v2 (chk): rebased and simplified. v3 (chk): add missing hw setup v4 (chk): rebased on current drm-fixes-3.15 v5 (chk): fix comments and commit text Signed-off-by: Jay Cornwall <[email protected]> Signed-off-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2014-05-01drm/radeon: use pflip irq on R600+ v2Christian König1-7/+21
Testing the update pending bit directly after issuing an update is nonsense cause depending on the pixel clock the CRTC needs a bit of time to execute the flip even when we are in the VBLANK period. This is just a non invasive patch to solve the problem at hand, a more complete and cleaner solution should follow in the next merge window. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=76564 v2: fix source IDs for CRTC2-6 Signed-off-by: Christian König <[email protected]> Cc: [email protected]
2014-04-17drm/radeon/si: make sure mc ucode is loaded before checking the sizeAlex Deucher1-1/+3
Avoid a possible segfault. Noticed-by: Dan Carpenter <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2014-04-17drm/radeon: add support for newer mc ucode on SI (v2)Alex Deucher1-13/+22
May fix stability issues with some newer cards. v2: print out mc firmware version used and size Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2014-03-18Merge tag 'v3.14-rc7' into drm-nextDave Airlie1-1/+2
Linux 3.14-rc7 Backmerge to help out Intel guys.
2014-03-06drm/radeon: resume old pm lateAlex Deucher1-1/+2
Moving the pm resume up in the init order to fix dpm seems to have regressed somes cases with the old pm code. Move it back to late resume. Signed-off-by: Alex Deucher <[email protected]>
2014-02-18drm/radeon: drop radeon_ring_force_activityChristian König1-2/+0
The reason for the false positives was fixed quite some time ago and since most engines can still execute NOPs while being locked up it leads to false negatives. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
2014-02-18drm/radeon: drop drivers copy of the rptrChristian König1-7/+1
In all cases where it really matters we are using the read functions anyway. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
2014-02-06drm/radeon: fix UVD IRQ support on SIChristian König1-0/+4
Otherwise decoding isn't really useable. bug: https://bugs.freedesktop.org/show_bug.cgi?id=71448 Signed-off-by: Christian König <[email protected]> Cc: [email protected] Signed-off-by: Alex Deucher <[email protected]>
2014-01-29drm/radeon: fix DAC interrupt handling on DCE5+Alex Deucher1-1/+1
DCE5 and newer hardware only has 1 DAC. Use the correct offset. This may fix display problems on certain board configurations. Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2014-01-29drm/radeon: clean up active vram sizingAlex Deucher1-1/+5
If we are not able to properly initialize one of the gpu engines for buffer paging, we limit vram to the size of the cpu visible aperture. We generally either use the gfx or dma engine to do this. Clean up the size limiting code to only adjust the size based on what ring is selected for buffer paging rather than making assumptions about which engine is selected for paging. Signed-off-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]>
2014-01-20drm/radeon: write gfx pg bases even when gfx pg is disabledAlex Deucher1-0/+3
For consistency. These buffers aren't used when pg is disabled. Signed-off-by: Alex Deucher <[email protected]>
2014-01-20Merge branch 'drm-intel-next' of ↵Dave Airlie1-5/+7
git://people.freedesktop.org/~danvet/drm-intel into drm-next drm-intel-next-2014-01-10: - final bits for runtime D3 on Haswell from Paul (now enabled fully) - parse the backlight modulation freq information in the VBT from Jani (but not yet used) - more watermark improvements from Ville for ilk-ivb and bdw - bugfixes for fastboot from Jesse - watermark fix for i830M (but not yet everything) - vlv vga hotplug w/a (Imre) - piles of other small improvements, cleanups and fixes all over Note that the pull request includes a backmerge of the last drm-fixes pulled into Linus' tree - things where getting a bit too messy. So the shortlog also contains a bunch of patches from Linus tree. Please yell if you want me to frob it for you a bit. * 'drm-intel-next' of git://people.freedesktop.org/~danvet/drm-intel: (609 commits) drm/i915/bdw: make sure south port interrupts are enabled properly v2 drm/i915: Include more information in disabled hotplug interrupt warning drm/i915: Only complain about a rogue hotplug IRQ after disabling drm/i915: Only WARN about a stuck hotplug irq ONCE drm/i915: s/hotplugt_status_gen4/hotplug_status_g4x/
2014-01-08drm/radeon: implement pci config reset for SI (v2)Alex Deucher1-0/+109
pci config reset is a low level reset that resets the entire chip from the bus interface. It can be more reliable if soft reset fails. v2: hide behind module parameter Signed-off-by: Alex Deucher <[email protected]>
2013-12-24drm/radeon: remove generic rptr/wptr functions (v2)Alex Deucher1-8/+0
Fill in asic family specific versions rather than using the generic version. This lets us handle asic specific differences more easily. In this case, we disable sw swapping of the rtpr writeback value on r6xx+ since the hw does it for us. Fixes bogus rptr readback on BE systems. v2: remove missed cpu_to_le32(), add comments Signed-off-by: Alex Deucher <[email protected]>
2013-12-24drm/radeon/pm: move pm handling into the asic specific codeAlex Deucher1-5/+14
We need more control over the ordering of dpm init with respect to the rest of the asic. Specifically, the SMC has to be initialized before the rlc and cg/pg. The pm code currently initializes late in the driver, but we need it to happen much earlier so move pm handling into the asic specific callbacks. This makes dpm more reliable and makes clockgating work properly on CIK parts and should help on SI parts as well. Signed-off-by: Alex Deucher <[email protected]>
2013-12-24drm/radeon: re-order firmware loading in preparation for dpm reworkAlex Deucher1-9/+9
We need to reorder the driver init sequence to better accomodate dpm which needs to be loaded earlier in the init sequence. Move fw init up so that it's available for dpm init. Signed-off-by: Alex Deucher <[email protected]>
2013-12-24drm/radeon/si: drop cg_update from dpm codeAlex Deucher1-2/+2
I'm not entirely sure this is required and it won't work with the dpm restructing anyway. Signed-off-by: Alex Deucher <[email protected]>
2013-12-23drm/radeon: expose render backend mask to the userspaceMarek Olšák1-0/+2
This will allow userspace to correctly program the PA_SC_RASTER_CONFIG register, so it can be considered a fix. Signed-off-by: Marek Olšák <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2013-12-23drm/radeon: fix render backend setup for SI and CIKMarek Olšák1-5/+5
Only the render backends of the first shader engine were enabled. The others were erroneously disabled. Enabling the other render backends improves performance a lot. Unigine Sanctuary on Bonaire: Before: 15 fps After: 90 fps Judging from the fan noise, the GPU was also underclocked when the other render backends were disabled, resulting in horrible performance. The fan is a lot noisy under load now. Signed-off-by: Marek Olšák <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
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