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2020-01-02drm/msm/dpu: Remove unneeded semicolon in dpu_plane.czhengbin1-1/+1
Fixes coccicheck warning: drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c:741:2-3: Unneeded semicolon Reported-by: Hulk Robot <[email protected]> Signed-off-by: zhengbin <[email protected]> Reviewed-by: Jordan Crouse <[email protected]> Signed-off-by: Rob Clark <[email protected]>
2020-01-02drm/msm/mdp5: Remove unneeded semicolonzhengbin1-1/+1
Fixes coccicheck warning: drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c:905:2-3: Unneeded semicolon Reported-by: Hulk Robot <[email protected]> Signed-off-by: zhengbin <[email protected]> Reviewed-by: Jordan Crouse <[email protected]> Signed-off-by: Rob Clark <[email protected]>
2020-01-02drm/msm/hdmi: Remove unneeded semicolonzhengbin1-1/+1
Fixes coccicheck warning: drivers/gpu/drm/msm/hdmi/hdmi_connector.c:104:3-4: Unneeded semicolon Reported-by: Hulk Robot <[email protected]> Signed-off-by: zhengbin <[email protected]> Reviewed-by: Jordan Crouse <[email protected]> Signed-off-by: Rob Clark <[email protected]>
2020-01-02drm: msm: mdp4: Adjust indentation in mdp4_dsi_encoder_enableNathan Chancellor1-1/+1
Clang warns: ../drivers/gpu/drm/msm/disp/mdp4/mdp4_dsi_encoder.c:124:3: warning: misleading indentation; statement is not part of the previous 'if' [-Wmisleading-indentation] mdp4_crtc_set_config(encoder->crtc, ^ ../drivers/gpu/drm/msm/disp/mdp4/mdp4_dsi_encoder.c:121:2: note: previous statement is here if (mdp4_dsi_encoder->enabled) ^ This warning occurs because there is a space after the tab on this line. Remove it so that the indentation is consistent with the Linux kernel coding style and clang no longer warns. Fixes: 776638e73a19 ("drm/msm/dsi: Add a mdp4 encoder for DSI") Link: https://github.com/ClangBuiltLinux/linux/issues/792 Signed-off-by: Nathan Chancellor <[email protected]> Reviewed-by: Nick Desaulniers <[email protected]> Signed-off-by: Rob Clark <[email protected]>
2020-01-02drm/msm/dpu: Remove unnecessary NULL checksDrew Davenport2-96/+17
The dpu_encoder_phys * argument passed to these functions will never be NULL so don't check. Signed-off-by: Drew Davenport <[email protected]> Signed-off-by: Rob Clark <[email protected]>
2020-01-02drm/msm/dpu: Remove unreachable codeDrew Davenport1-2/+0
The return statement follows another return statement, so will never be reached. Signed-off-by: Drew Davenport <[email protected]> Signed-off-by: Rob Clark <[email protected]>
2020-01-02drm/msm/dpu: Remove unnecessary NULL checkDrew Davenport1-95/+60
dpu_encoder_virt.phys_encs[0:num_phys_encs-1] will not be NULL so don't check. Also fix multiline strings that caused checkpatch warning. Signed-off-by: Drew Davenport <[email protected]> Signed-off-by: Rob Clark <[email protected]>
2020-01-02drm/msm/dpu: Remove unnecessary NULL checksDrew Davenport1-10/+3
dpu_crtc_mixer.hw_lm will never be NULL, so don't check. Signed-off-by: Drew Davenport <[email protected]> Signed-off-by: Rob Clark <[email protected]>
2020-01-02drm/msm/dpu: Remove unnecessary NULL checksDrew Davenport1-4/+2
dpu_crtc_mixer.lm_ctl will never be NULL, so don't bother checking Signed-off-by: Drew Davenport <[email protected]> Signed-off-by: Rob Clark <[email protected]>
2020-01-02drm/msm/dpu: Remove unnecessary NULL checksDrew Davenport3-17/+13
dpu_hw_ctl* is checked for NULL when passed as an argument to several functions. It will never be NULL, so remove the checks. Signed-off-by: Drew Davenport <[email protected]> Signed-off-by: Rob Clark <[email protected]>
2020-01-02drm: msm: a6xx: Dump GBIF registers, debugbus in gpu stateSharat Masetty2-13/+55
Add the relevant GBIF registers and the debug bus to the a6xx gpu state. This comes in pretty handy when debugging GPU bus related issues. Signed-off-by: Sharat Masetty <[email protected]> Signed-off-by: Rob Clark <[email protected]>
2020-01-02drm: msm: a6xx: Add support for A618Sharat Masetty5-13/+154
This patch adds support for enabling Graphics Bus Interface(GBIF) used in multiple A6xx series chipets. Also makes changes to the PDC/RSC sequencing specifically required for A618. This is needed for proper interfacing with RPMH. Signed-off-by: Sharat Masetty <[email protected]> Signed-off-by: Rob Clark <[email protected]>
2020-01-02drm: msm: Add 618 gpu to the adreno gpu listSharat Masetty1-0/+11
This patch adds Adreno 618 entry and its associated properties to the gpulist entries. Signed-off-by: Sharat Masetty <[email protected]> Signed-off-by: Rob Clark <[email protected]>
2020-01-02drm/msm/dsi: Delay drm_panel_enable() until dsi_mgr_bridge_enable()Stephan Gerhold1-21/+41
At the moment, the MSM DSI driver calls drm_panel_enable() rather early from the DSI bridge pre_enable() function. At this point, the encoder (e.g. MDP5) is not enabled, so we have not started transmitting video data. However, the drm_panel_funcs documentation states that enable() should be called on the panel *after* video data is being transmitted: The .prepare() function is typically called before the display controller starts to transmit video data. [...] After the display controller has started transmitting video data, it's safe to call the .enable() function. This will typically enable the backlight to make the image on screen visible. Calling drm_panel_enable() too early causes problems for some panels: The TFT LCD panel used in the Samsung Galaxy Tab A 9.7 (2015) (APQ8016) uses the MIPI_DCS_SET_DISPLAY_BRIGHTNESS command to control backlight/brightness of the screen. The enable sequence is therefore: drm_panel_enable() drm_panel_funcs.enable(): backlight_enable() backlight_ops.update_status(): mipi_dsi_dcs_set_display_brightness(dsi, bl->props.brightness); The panel seems to silently ignore the MIPI_DCS_SET_DISPLAY_BRIGHTNESS command if it is sent too early. This prevents setting the initial brightness, causing the display to be enabled with minimum brightness instead. Adding various delays in the panel initialization code does not result in any difference. On the other hand, moving drm_panel_enable() to dsi_mgr_bridge_enable() fixes the problem, indicating that the panel requires the video stream to be active before the brightness command is accepted. Therefore: Move drm_panel_enable() to dsi_mgr_bridge_enable() to delay calling it until video data is being transmitted. Move drm_panel_disable() to dsi_mgr_bridge_disable() for similar reasons. (This is not strictly required for the panel affected above...) Tested-by: Jasper Korten <[email protected]> Signed-off-by: Stephan Gerhold <[email protected]> Tested-by: Jeffrey Hugo <[email protected]> Reviewed-by: Jeffrey Hugo <[email protected]> Signed-off-by: Rob Clark <[email protected]>
2020-01-02msm:disp:dpu1: Fix core clk rate in display driverShubhashree Dhar1-0/+1
Fix max core clk rate during dt parsing in display driver. Signed-off-by: Shubhashree Dhar <[email protected]> Signed-off-by: Rob Clark <[email protected]>
2020-01-02msm:disp:dpu1: add scaler support on SC7180 displayShubhashree Dhar5-12/+39
Add scaler support for display driver. This patch has dependency on the below series https://patchwork.kernel.org/patch/11260267/ Co-developed-by: Raviteja Tamatam <[email protected]> Signed-off-by: Raviteja Tamatam <[email protected]> Signed-off-by: Shubhashree Dhar <[email protected]> Signed-off-by: Rob Clark <[email protected]>
2020-01-02msm:disp:dpu1: add mixer selection for display topologyKalyan Thota3-3/+21
mixer selection in the display topology is based on multiple factors 1) mixers available in the hw 2) interfaces to be enabled 3) merge capability change will pickup mixer as per the topology need. Signed-off-by: Kalyan Thota <[email protected]> Signed-off-by: Rob Clark <[email protected]>
2020-01-02msm:disp:dpu1: setup display datapath for SC7180 targetKalyan Thota6-5/+159
Add changes to setup display datapath on SC7180 target. Changes in v1: - Add changes to support ctl_active on SC7180 target. - While selecting the number of mixers in the topology consider the interface width. Changes in v2: - Spawn topology mixer selection into separate patch (Rob Clark). - Add co-developed-by tags in the commit msg (Stephen Boyd). Changes in v3: - Fix kernel checkpatch errors in v2. This patch has dependency on the below series https://patchwork.kernel.org/patch/11253747/ Co-developed-by: Shubhashree Dhar <[email protected]> Signed-off-by: Shubhashree Dhar <[email protected]> Co-developed-by: Raviteja Tamatam <[email protected]> Signed-off-by: Raviteja Tamatam <[email protected]> Signed-off-by: Kalyan Thota <[email protected]> Signed-off-by: Rob Clark <[email protected]>
2020-01-02msm:disp:dpu1: add support for display for SC7180 targetKalyan Thota5-13/+188
Add display hw catalog changes for SC7180 target. Changes in v1: - Configure register offsets and capabilities for the display hw blocks. Changes in v2: - mdss_irq data type has changed in the dependent patch, accommodate the necessary changes. - Add co-developed-by tags in the commit msg (Stephen Boyd). Changes in v3: - fix kernel checkpatch errors in v2 Changes in v4: - move documentation into seperate patch (Rob Herring). This patch has dependency on the below series https://patchwork.kernel.org/patch/11253647/ Co-developed-by: Shubhashree Dhar <[email protected]> Signed-off-by: Shubhashree Dhar <[email protected]> Co-developed-by: Raviteja Tamatam <[email protected]> Signed-off-by: Raviteja Tamatam <[email protected]> Signed-off-by: Kalyan Thota <[email protected]> [rebase on hw catalog const'ification, and add more const's] Signed-off-by: Rob Clark <[email protected]>
2020-01-02msm: disp: dpu1: add support to access hw irqs regs depending on revisionShubhashree Dhar4-6/+21
Current code assumes that all the irqs registers offsets can be accessed in all the hw revisions; this is not the case for some targets that should not access some of the irq registers. This change adds the support to selectively remove the irqs that are not supported in some of the hw revisions. Changes in v1: - Add support to selectively remove the hw irqs that are not not supported. Changes in v2: - Remove unrelated changes. Changes in v3: - Remove change-id (Stephen Boyd). - Add colon in variable description to match kernel-doc (Stephen Boyd). - Change macro-y way of variable description (Jordon Crouse). - Remove unnecessary if checks (Jordon Crouse). - Remove extra blank line (Jordon Crouse). Changes in v4: - Remove checkpatch errors. Signed-off-by: Shubhashree Dhar <[email protected]> Signed-off-by: Rob Clark <[email protected]>
2020-01-02drm/msm/dpu: Add UBWC support for RGB8888 formatsFritz Koenig2-0/+20
Hardware only natively supports BGR8888 UBWC. UBWC support for RGB8888 can be had by pretending that the buffer is BGR. Signed-off-by: Fritz Koenig <[email protected]> Reviewed-by: Rob Clark <[email protected]> Acked-by: Daniel Vetter <[email protected]> Signed-off-by: Rob Clark <[email protected]>
2020-01-02drm/msm/dpu: Mark various data tables as constStephen Boyd14-58/+58
These structures look like a bunch of data tables that aren't going to change after boot. Let's move them to the const RO section of memory so that they can't be modified at runtime on modern machines. Signed-off-by: Stephen Boyd <[email protected]> Signed-off-by: Rob Clark <[email protected]>
2020-01-02drm/msm/a4xx: set interconnect bandwidth voteBrian Masney1-0/+8
Set the two interconnect paths for the GPU to maximum speed for now to work towards getting the GPU working upstream. We can revisit a later time to optimize this for battery life. Signed-off-by: Brian Masney <[email protected]> Reviewed-by: Bjorn Andersson <[email protected]> Signed-off-by: Rob Clark <[email protected]>
2020-01-02drm/msm/a3xx: set interconnect bandwidth voteBrian Masney1-0/+8
Set the two interconnect paths for the GPU to maximum speed for now to work towards getting the GPU working upstream. We can revisit a later time to optimize this for battery life. Signed-off-by: Brian Masney <[email protected]> Reviewed-by: Bjorn Andersson <[email protected]> Signed-off-by: Rob Clark <[email protected]>
2020-01-02drm/msm/gpu: add support for ocmem interconnect pathBrian Masney2-1/+20
Some A3xx and all A4xx Adreno GPUs do not have GMEM inside the GPU core and must use the On Chip MEMory (OCMEM) in order to be functional. There's a separate interconnect path that needs to be setup to OCMEM. Add support for this second path to the GPU core. In the downstream MSM 3.4 sources, the two interconnect paths for the GPU are between: - MSM_BUS_MASTER_GRAPHICS_3D and MSM_BUS_SLAVE_EBI_CH0 - MSM_BUS_MASTER_V_OCMEM_GFX3D and MSM_BUS_SLAVE_OCMEM Signed-off-by: Brian Masney <[email protected]> Reviewed-by: Bjorn Andersson <[email protected]> Signed-off-by: Rob Clark <[email protected]>
2020-01-02drm/msm/adreno: fix zap vs no-zap handlingRob Clark2-4/+18
We can have two cases, when it comes to "zap" fw. Either the fw requires zap fw to take the GPU out of secure mode at boot, or it does not and we can write RBBM_SECVID_TRUST_CNTL directly. Previously we decided based on whether zap fw load succeeded, but this is not a great plan because: 1) we could have zap fw in the filesystem on a device where it is not required 2) we could have the inverse case Instead, shift to deciding based on whether we have a 'zap-shader' node in dt. In practice, there is only one device (currently) with upstream dt that does not use zap (cheza), and it already has a /delete-node/ for the zap-shader node. Fixes: abccb9fe3267 ("drm/msm/a6xx: Add zap shader load") Signed-off-by: Rob Clark <[email protected]>
2020-01-02drm/msm/a6xx: restore previous freq on resumeRob Clark2-2/+9
Previously, if the freq were overriden (ie. via sysfs), it would get reset to max on resume. Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Jordan Crouse <[email protected]>
2020-01-02drm/msm/dpu: ignore NULL clocksRob Clark1-19/+7
This isn't an error. Also the clk APIs handle the NULL case, so we can just delete the check. Signed-off-by: Rob Clark <[email protected]> Tested-by: Matthias Kaehlcke <[email protected]> Reviewed-by: Linus Walleij <[email protected]> Acked-by: Stephen Boyd <[email protected]>
2019-12-18drm/msm: avoid using 'timespec'Arnd Bergmann1-2/+1
The timespec structure and associated interfaces are deprecated and will be removed in the future because of the y2038 overflow. The use of ktime_to_timespec() in timeout_to_jiffies() does not suffer from that overflow, but is easy to avoid by just converting the ktime_t into jiffies directly. Reviewed-by: Jordan Crouse <[email protected]> Signed-off-by: Arnd Bergmann <[email protected]>
2019-12-17drm/msm: Use dma_resv locking wrappersDaniel Vetter1-5/+5
I'll add more fancy logic to them soon, so everyone really has to use them. Plus they already provide some nice additional debug infrastructure on top of direct ww_mutex usage for the fences tracked by dma_resv. Reviewed-by: Eric Anholt <[email protected]> Signed-off-by: Daniel Vetter <[email protected]> Cc: Rob Clark <[email protected]> Cc: Sean Paul <[email protected]> Cc: [email protected] Cc: [email protected] Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-12-17Merge tag 'drm-misc-next-2019-12-16' of ↵Daniel Vetter6-10/+21
git://anongit.freedesktop.org/drm/drm-misc into drm-next drm-misc-next for v5.6: UAPI Changes: - Add support for DMA-BUF HEAPS. Cross-subsystem Changes: - mipi dsi definition updates, pulled into drm-intel as well. - Add lockdep annotations for dma_resv vs mmap_sem and fs_reclaim. - Remove support for dma-buf kmap/kunmap. - Constify fb_ops in all fbdev drivers, including drm drivers and drm-core, and media as well. Core Changes: - Small cleanups to ttm. - Fix SCDC definition. - Assorted cleanups to core. - Add todo to remove load/unload hooks, and use generic fbdev emulation. - Assorted documentation updates. - Use blocking ww lock in ttm fault handler. - Remove drm_fb_helper_fbdev_setup/teardown. - Warning fixes with W=1 for atomic. - Use drm_debug_enabled() instead of drm_debug flag testing in various drivers. - Fallback to nontiled mode in fbdev emulation when not all tiles are present. (Later on reverted) - Various kconfig indentation fixes in core and drivers. - Fix freeing transactions in dp-mst correctly. - Sean Paul is steping down as core maintainer. :-( - Add lockdep annotations for atomic locks vs dma-resv. - Prevent use-after-free for a bad job in drm_scheduler. - Fill out all block sizes in the P01x and P210 definitions. - Avoid division by zero in drm/rect, and fix bounds. - Add drm/rect selftests. - Add aspect ratio and alternate clocks for HDMI 4k modes. - Add todo for drm_framebuffer_funcs and fb_create cleanup. - Drop DRM_AUTH for prime import/export ioctls. - Clear DP-MST payload id tables downstream when initializating. - Fix for DSC throughput definition. - Add extra FEC definitions. - Fix fake offset in drm_gem_object_funs.mmap. - Stop using encoder->bridge in core directly - Handle bridge chaining slightly better. - Add backlight support to drm/panel, and use it in many panel drivers. - Increase max number of y420 modes from 128 to 256, as preparation to add the new modes. Driver Changes: - Small fixes all over. - Fix documentation in vkms. - Fix mmap_sem vs dma_resv in nouveau. - Small cleanup in komeda. - Add page flip support in gma500 for psb/cdv. - Add ddc symlink in the connector sysfs directory for many drivers. - Add support for analogic an6345, and fix small bugs in it. - Add atomic modesetting support to ast. - Fix radeon fault handler VMA race. - Switch udl to use generic shmem helpers. - Unconditional vblank handling for mcde. - Miscellaneous fixes to mcde. - Tweak debug output from komeda using debugfs. - Add gamma and color transform support to komeda for DOU-IPS. - Add support for sony acx424AKP panel. - Various small cleanups to gma500. - Use generic fbdev emulation in udl, and replace udl_framebuffer with generic implementation. - Add support for Logic PD Type 28 panel. - Use drm_panel_* wrapper functions in exynos/tegra/msm. - Add devicetree bindings for generic DSI panels. - Don't include drm_pci.h directly in many drivers. - Add support for begin/end_cpu_access in udmabuf. - Stop using drm_get_pci_dev in gma500 and mga200. - Fixes to UDL damage handling, and use dma_buf_begin/end_cpu_access. - Add devfreq thermal support to panfrost. - Fix hotplug with daisy chained monitors by removing VCPI when disabling topology manager. - meson: Add support for OSD1 plane AFBC commit. - Stop displaying garbage when toggling ast primary plane on/off. - More cleanups and fixes to UDL. - Add D32 suport to komeda. - Remove globle copy of drm_dev in gma500. - Add support for Boe Himax8279d MIPI-DSI LCD panel. - Add support for ingenic JZ4770 panel. - Small null pointer deference fix in ingenic. - Remove support for the special tfp420 driver, as there is a generic way to do it. Signed-off-by: Daniel Vetter <[email protected]> From: Maarten Lankhorst <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-12-09drm/panel: decouple connector from drm_panelSam Ravnborg2-2/+2
To facilitate moving connector creation to display drivers, decouple the drm_connector from drm_panel. This patch adds a connector argument to drm_panel_get_modes(). All users of drm_panel_get_modes() already had the connector available, so updating users was trivial. With this patch drm_panel no longer keeps a reference to the drm_connector. Signed-off-by: Sam Ravnborg <[email protected]> Reviewed-by: Laurent Pinchart <[email protected]> Reviewed-by: Linus Walleij <[email protected]> Acked-by: Jeffrey Hugo <[email protected]> Cc: Thierry Reding <[email protected]> Cc: Laurent Pinchart <[email protected]> Cc: Sam Ravnborg <[email protected]> Cc: Andrzej Hajda <[email protected]> Cc: Neil Armstrong <[email protected]> Cc: Jonas Karlman <[email protected]> Cc: Jernej Skrabec <[email protected]> Cc: Maarten Lankhorst <[email protected]> Cc: Maxime Ripard <[email protected]> Cc: David Airlie <[email protected]> Cc: Daniel Vetter <[email protected]> Cc: Inki Dae <[email protected]> Cc: Joonyoung Shim <[email protected]> Cc: Seung-Woo Kim <[email protected]> Cc: Kyungmin Park <[email protected]> Cc: Kukjin Kim <[email protected]> Cc: Krzysztof Kozlowski <[email protected]> Cc: Stefan Agner <[email protected]> Cc: Alison Wang <[email protected]> Cc: Philipp Zabel <[email protected]> Cc: Shawn Guo <[email protected]> Cc: Sascha Hauer <[email protected]> Cc: Pengutronix Kernel Team <[email protected]> Cc: Fabio Estevam <[email protected]> Cc: NXP Linux Team <[email protected]> Cc: CK Hu <[email protected]> Cc: Matthias Brugger <[email protected]> Cc: Marek Vasut <[email protected]> Cc: Tomi Valkeinen <[email protected]> Cc: Kieran Bingham <[email protected]> Cc: Sandy Huang <[email protected]> Cc: "Heiko Stübner" <[email protected]> Cc: Benjamin Gaignard <[email protected]> Cc: Vincent Abriou <[email protected]> Cc: Chen-Yu Tsai <[email protected]> Cc: Jonathan Hunter <[email protected]> Cc: Torsten Duwe <[email protected]> Cc: Vasily Khoruzhick <[email protected]> Cc: Icenowy Zheng <[email protected]> Cc: Sean Paul <[email protected]> Cc: Linus Walleij <[email protected]> Cc: Boris Brezillon <[email protected]> Cc: Hariprasad Kelam <[email protected]> Cc: Alexios Zavras <[email protected]> Cc: Brian Masney <[email protected]> Cc: Rob Clark <[email protected]> Cc: Thomas Gleixner <[email protected]> Cc: Allison Randal <[email protected]> Cc: Shayenne Moura <[email protected]> Cc: Abhinav Kumar <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-12-09drm: Stop accessing encoder->bridge directlyBoris Brezillon1-2/+8
We are about to replace the single-linked bridge list by a double-linked one based on list.h, leading to the suppression of the encoder->bridge field. But before we can do that we must provide a drm_bridge_chain_get_first_bridge() bridge helper and patch all drivers and core helpers to use it instead of directly accessing encoder->bridge. Note that we still have 2 drivers (VC4 and Exynos) manipulating the encoder->bridge field directly because they need to cut the bridge chain in order to control the enable/disable sequence. This is definitely not something we want to encourage, so let's keep those 2 oddities around until we find a better solution. Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Laurent Pinchart <[email protected]> Reviewed-by: Neil Armstrong <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-12-05drm: constify fb ops across all driversJani Nikula1-1/+1
Now that the fbops member of struct fb_info is const, we can start making the ops const as well. Cc: [email protected] Reviewed-by: Daniel Vetter <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/59b43629ac60031c5bbf961d8c49695019bc9c6f.1575390740.git.jani.nikula@intel.com
2019-12-02Merge tag 'drm-msm-next-2019-11-05' of ↵Dave Airlie37-306/+426
https://gitlab.freedesktop.org/drm/msm into drm-next + OCMEM support to enable the couple generations that had shared OCMEM rather than GMEM exclusively for the GPU (late a3xx and I think basically all of a4xx). Bjorn and Brian decided to land this through the drm tree to avoid having to coordinate merge requests. + a510 support, and various associated display support + the usual misc cleanups and fixes Signed-off-by: Dave Airlie <[email protected]> From: Rob Clark <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/ <CAF6AEGv-JWswEJRxe5AmnGQO1SZnpxK05kO1E29K6UUzC9GMMw@mail.gmail.com
2019-12-01drm/msm: fix opencoded use of drm_panel_*Sam Ravnborg1-1/+1
Use the function drm_panel_get_modes(). Signed-off-by: Sam Ravnborg <[email protected]> Reviewed-by: Emil Velikov <[email protected]> Cc: Alexios Zavras <[email protected]> Cc: Thomas Gleixner <[email protected]> Cc: Allison Randal <[email protected]> Cc: Enrico Weigelt <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-11-21drm/msm: Don't init ww_mutec acquire ctx before neededDaniel Vetter1-3/+6
For locking semantics it really doesn't matter when we grab the ticket. But for lockdep validation it does: the acquire ctx is a fake lockdep. Since other drivers might want to do a full multi-lock dance in their fault-handler, not just lock a single dma_resv. Therefore we must init the acquire_ctx only after we've done all the copy_*_user or anything else that might trigger a pagefault. For msm this means we need to move it past submit_lookup_objects. Aside: Why is msm still using struct_mutex, it seems to be using dma_resv_lock for general buffer state protection? v2: - Add comment to explain why the ww ticket setup is separate (Rob) - Fix up error handling, we need to make sure we don't call ww_acquire_fini without _init. Reviewed-by: Maarten Lankhorst <[email protected]> Reviewed-and-tested-by: Rob Clark <[email protected]> Signed-off-by: Daniel Vetter <[email protected]> Cc: Rob Clark <[email protected]> Cc: Sean Paul <[email protected]> Cc: [email protected] Cc: [email protected] Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-11-13drm/msm: fix memleak on releaseJohan Hovold1-5/+1
If a process is interrupted while accessing the "gpu" debugfs file and the drm device struct_mutex is contended, release() could return early and fail to free related resources. Note that the return value from release() is ignored. Fixes: 4f776f4511c7 ("drm/msm/gpu: Convert the GPU show function to use the GPU state") Cc: stable <[email protected]> # 4.18 Cc: Jordan Crouse <[email protected]> Cc: Rob Clark <[email protected]> Reviewed-by: Rob Clark <[email protected]> Signed-off-by: Johan Hovold <[email protected]> Signed-off-by: Sean Paul <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-11-07drm/msm/hdmi: Provide ddc symlink in hdmi connector sysfs directoryAndrzej Pietrasiewicz1-2/+4
Use the ddc pointer provided by the generic connector. Signed-off-by: Andrzej Pietrasiewicz <[email protected]> Acked-by: Sam Ravnborg <[email protected]> Reviewed-by: Emil Velikov <[email protected]> Acked-by: Sean Paul <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/ <1e343b02195757bfbf60ca8999cadeb376db204e.1566845537.git.andrzej.p@collabora.com
2019-11-06drm: msm: a6xx: fix debug bus register configurationSharat Masetty1-12/+12
Fix the cx debugbus related register configuration, to collect accurate bus data during gpu snapshot. This helps with complete snapshot dump and also complete proper GPU recovery. Fixes: 1707add81551 ("drm/msm/a6xx: Add a6xx gpu state") Reviewed-by: Rob Clark <[email protected]> Signed-off-by: Sharat Masetty <[email protected]> Signed-off-by: Sean Paul <[email protected]> Link: https://patchwork.freedesktop.org/patch/339165
2019-11-04drm/msm/adreno: Add support for Adreno 510 GPUAngeloGioacchino Del Regno4-14/+86
The Adreno 510 GPU is a stripped version of the Adreno 5xx, found in low-end SoCs like 8x56 and 8x76, which has 256K of GMEM, with no GPMU nor ZAP. Also, since the Adreno 5xx part of this driver seems to be developed with high-end Adreno GPUs in mind, and since this is a lower end one, add a comment making clear which GPUs which support is not implemented yet is not using the GPMU related hw init code, so that future developers will not go crazy with that. By the way, the lower end Adreno GPUs with no GPMU are: A505/A506/A510 (usually no ZAP firmware) A508/A509/A512 (usually with ZAP firmware) Signed-off-by: AngeloGioacchino Del Regno <[email protected]> Signed-off-by: Rob Clark <[email protected]>
2019-11-04drm/msm/dsi: Add configuration for 8x76AngeloGioacchino Del Regno2-0/+23
MSM8976, MSM8976 and APQ variants have DSI version 3:10040002 (DSI 6G V1.4.2), featuring two DSIs. They need three clocks (mdp_core, iface, bus), one GDSC and two vregs, VDDA at 1.2V and VDDIO at 1.8V. Signed-off-by: AngeloGioacchino Del Regno <[email protected]> Signed-off-by: Rob Clark <[email protected]>
2019-11-04drm/msm/dsi: Add configuration for 28nm PLL on family BAngeloGioacchino Del Regno3-0/+21
The 28nm PLL has a different iospace on MSM/APQ family B SoCs: add a new configuration and use it when the DT reports the "qcom,dsi-phy-28nm-hpm-fam-b" compatible. Signed-off-by: AngeloGioacchino Del Regno <[email protected]> Signed-off-by: Rob Clark <[email protected]>
2019-11-04drm/msm/mdp5: Add configuration for msm8x76AngeloGioacchino Del Regno1-0/+98
Add the configuration entries for the MDP5 v1.11, found on MSM8956, MSM8976 and APQ variants. Signed-off-by: AngeloGioacchino Del Regno <[email protected]> Signed-off-by: Rob Clark <[email protected]>
2019-11-02drm/msm/mdp5: Add optional TBU and TBU_RT clocksAngeloGioacchino Del Regno2-0/+12
Some SoCs, like MSM8956/8976 (and APQ variants), do feature these clocks and we need to enable them in order to get both of the hw (mdp5/rot) Translation Buffer Units (TBUs) to properly work. Signed-off-by: AngeloGioacchino Del Regno <[email protected]> Signed-off-by: Rob Clark <[email protected]>
2019-11-02drm/msm: always dump buffer base/sizeRob Clark1-4/+6
Even if we are not dumping the buffer's contents, it is useful to log their base address and size. This makes it easier to see when different gpu pointers point to a single buffer, for example higher mipmap levels of a single texture. Signed-off-by: Rob Clark <[email protected]>
2019-11-02drm/msm: fix rd dumping for split-IB1Rob Clark1-1/+5
When IB1 is split into multiple cmd buffers, we'd emit multiple RD_CMDSTREAM_ADDR per submit. But after this packet is handled by the cffdump parser, it resets it's known buffers on the next GPUADDR packet, so subsequent RD_CMDSTREAM_ADDR packets from the same submit would not find their buffers. Re-work the loop to snapshot all buffers before RD_CMDSTREAM_ADDR to avoid this problem. Signed-off-by: Rob Clark <[email protected]>
2019-11-02drm/msm/hdmi: silence -EPROBE_DEFER warningBrian Masney1-2/+6
Silence a warning message due to an -EPROBE_DEFER error to help cleanup the system boot log. Signed-off-by: Brian Masney <[email protected]> Reviewed-by: Linus Walleij <[email protected]> Signed-off-by: Rob Clark <[email protected]>
2019-10-24drm/msm/dsi: Implement qcom, dsi-phy-regulator-ldo-mode for 28nm PHYStephan Gerhold1-8/+34
The DSI PHY regulator supports two regulator modes: LDO and DCDC. This mode can be selected using the "qcom,dsi-phy-regulator-ldo-mode" device tree property. However, at the moment only the 20nm PHY driver actually implements that option. Add a check in the 28nm PHY driver to program the registers correctly for LDO mode. Tested-by: Nikita Travkin <[email protected]> # l8150 Signed-off-by: Stephan Gerhold <[email protected]> Signed-off-by: Sean Paul <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-10-23drm/msm: edp: Avoid drm_dp_link helpersThierry Reding1-21/+49
During the discussion of patches that enhance the drm_dp_link helpers it was concluded that these helpers aren't very useful to begin with. Start pushing the equivalent code into individual drivers to ultimately remove them. Signed-off-by: Thierry Reding <[email protected]> Reviewed-by: Daniel Vetter <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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