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It can happen that the mmsys clock drivers aren't probed before the
platform driver gets invoked. The platform driver used to print a warning
that the driver failed to get the clocks. Omit this error on
the defered probe path.
Signed-off-by: Matthias Brugger <[email protected]>
Reviewed-by: CK Hu <[email protected]>
Signed-off-by: Enric Balletbo i Serra <[email protected]>
Signed-off-by: Matthias Brugger <[email protected]>
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This change enables XR24 format to be displayed as an overlay on top of
the primary plane.
Suggested-by: Sean Paul <[email protected]>
To: CK Hu <[email protected]>
To: [email protected]
Cc: Daniele Castagna <[email protected]>
Cc: Philipp Zabel <[email protected]>
Cc: David Airlie <[email protected]>
Cc: Daniel Vetter <[email protected]>
Cc: Matthias Brugger <[email protected]>
Cc: [email protected]
Cc: [email protected]
Signed-off-by: Mark Yacoub <[email protected]>
Signed-off-by: CK Hu <[email protected]>
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If the plane pending state is disabled, call mtk_ovl_layer_off then
return.
This guarantees that that the state is valid for all operations when the
pending state is enabled.
Suggested-by: Sean Paul <[email protected]>
To: CK Hu <[email protected]>
To: [email protected]
Cc: Daniele Castagna <[email protected]>
Cc: Philipp Zabel <[email protected]>
Cc: David Airlie <[email protected]>
Cc: Daniel Vetter <[email protected]>
Cc: Matthias Brugger <[email protected]>
Cc: [email protected]
Cc: [email protected]
Signed-off-by: Mark Yacoub <[email protected]>
Reviewed-by: Sean Paul <[email protected]>
Signed-off-by: CK Hu <[email protected]>
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The CMDQ (Command Queue) in some Mediatek SoC is used
to help update all relevant display controller registers
with critical time limation.
This patch add cmdq interface in ddp_comp interface,
let all ddp_comp interface can support cpu/cmdq function
at the same time.
Signed-off-by: YT Shen <[email protected]>
Signed-off-by: Philipp Zabel <[email protected]>
Signed-off-by: Bibby Hsieh <[email protected]>
Signed-off-by: Yongqiang Niu <[email protected]>
Signed-off-by: CK Hu <[email protected]>
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layer_on and layer_off both are unused external function,
remove them from mtk_ddp_comp_funcs structure.
Signed-off-by: Bibby Hsieh <[email protected]>
Signed-off-by: CK Hu <[email protected]>
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Now that we support both reflections, we can expose 180 degree rotation
and rely on the simplify routine to convert that into REFLECT_X |
REFLECT_Y
Signed-off-by: Sean Paul <[email protected]>
Signed-off-by: CK Hu <[email protected]>
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Add support for REFLECT_X rotations.
Cc: Fritz Koenig <[email protected]>
Cc: Daniele Castagna <[email protected]>
Cc: Miguel Casas <[email protected]>
Cc: Mark Yacoub <[email protected]>
Signed-off-by: Sean Paul <[email protected]>
Signed-off-by: CK Hu <[email protected]>
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Expose the rotation property and handle REFLECT_Y rotations.
Cc: Fritz Koenig <[email protected]>
Cc: Daniele Castagna <[email protected]>
Cc: Miguel Casas <[email protected]>
Cc: Mark Yacoub <[email protected]>
Signed-off-by: Sean Paul <[email protected]>
Signed-off-by: CK Hu <[email protected]>
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distinguish ovl and ovl_2l by layer_nr when get comp
id
Signed-off-by: Yongqiang Niu <[email protected]>
Signed-off-by: CK Hu <[email protected]>
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This patch add background color input select function for ovl/ovl_2l
ovl include 4 DRAM layer and 1 background color layer
ovl_2l include 4 DRAM layer and 1 background color layer
DRAM layer frame buffer data from render hardware, GPU for example.
backgournd color layer is embed in ovl/ovl_2l, we can only set
it color, but not support DRAM frame buffer.
for ovl0->ovl0_2l direct link usecase,
we need set ovl0_2l background color intput select from ovl0
if render send DRAM buffer layer number <=4, all these layer read
by ovl.
layer0 is at the bottom of all layers.
layer3 is at the top of all layers.
if render send DRAM buffer layer numbfer >=4 && <=6
ovl0 read layer0~3
ovl0_2l read layer4~5
layer5 is at the top ot all these layers.
the decision of how to setting ovl0/ovl0_2l read these layer data
is controlled in mtk crtc, which will be another patch
Signed-off-by: Yongqiang Niu <[email protected]>
Signed-off-by: CK Hu <[email protected]>
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This patch add layer_nr for ovl private data
ovl_2l almost same with with ovl hardware, except the
layer number for ovl_2l is 2 and ovl is 4.
this patch is a preparation for ovl-2l and
ovl share the same driver.
Signed-off-by: Yongqiang Niu <[email protected]>
Signed-off-by: CK Hu <[email protected]>
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This patch add gmc_bits for ovl private data
GMC register was set RDMA ultra and pre-ultra threshold.
10bit GMC register define is different with other SOC, gmc_thrshd_l not
used.
Signed-off-by: Yongqiang Niu <[email protected]>
Signed-off-by: CK Hu <[email protected]>
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Drop use of the deprecated drmP.h header file.
While touching the include files divide them up in blocks
in the typical order:
\#include <linux/*>
\#include <video/*>
\#include <drm/*>
\#include ""
And sort the includes in the blocks
Add the necessary includes to fix build after removal of drmP.h
Signed-off-by: Sam Ravnborg <[email protected]>
Acked-by: Emil Velikov <[email protected]>
Reviewed-by: CK Hu <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Cc: Philipp Zabel <[email protected]>
Cc: David Airlie <[email protected]>
Cc: Daniel Vetter <[email protected]>
Cc: Matthias Brugger <[email protected]>
Cc: [email protected]
Cc: [email protected]
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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Based on 1 normalized pattern(s):
this program is free software you can redistribute it and or modify
it under the terms of the gnu general public license version 2 as
published by the free software foundation this program is
distributed in the hope that it will be useful but without any
warranty without even the implied warranty of merchantability or
fitness for a particular purpose see the gnu general public license
for more details
extracted by the scancode license scanner the SPDX license identifier
GPL-2.0-only
has been chosen to replace the boilerplate/reference in 655 file(s).
Signed-off-by: Thomas Gleixner <[email protected]>
Reviewed-by: Allison Randal <[email protected]>
Reviewed-by: Kate Stewart <[email protected]>
Reviewed-by: Richard Fontana <[email protected]>
Cc: [email protected]
Link: https://lkml.kernel.org/r/[email protected]
Signed-off-by: Greg Kroah-Hartman <[email protected]>
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This patch add function to return OVL layer number
For now, MT8173, MT2712, MT2701 OVL all has 4 layer.
Signed-off-by: Stu Hsieh <[email protected]>
Signed-off-by: CK Hu <[email protected]>
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This patch add the comment about color format setting for OVL
Signed-off-by: Stu Hsieh <[email protected]>
Signed-off-by: CK Hu <[email protected]>
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Now that we have a custom printf format specifier, convert users of
full_name to use %pOF instead. This is preparation to remove storing
of the full path string for each node.
Signed-off-by: Rob Herring <[email protected]>
Cc: Russell King <[email protected]>
Cc: David Airlie <[email protected]>
Cc: Daniel Vetter <[email protected]>
Cc: Jani Nikula <[email protected]>
Cc: Sean Paul <[email protected]>
Cc: Inki Dae <[email protected]>
Cc: Joonyoung Shim <[email protected]>
Cc: Seung-Woo Kim <[email protected]>
Cc: Kyungmin Park <[email protected]>
Cc: Kukjin Kim <[email protected]>
Cc: Krzysztof Kozlowski <[email protected]>
Cc: Javier Martinez Canillas <[email protected]>
Cc: Xinliang Liu <[email protected]>
Cc: Rongrong Zou <[email protected]>
Cc: Xinwei Kong <[email protected]>
Cc: Chen Feng <[email protected]>
Cc: CK Hu <[email protected]>
Cc: Philipp Zabel <[email protected]>
Cc: Matthias Brugger <[email protected]>
Cc: Neil Armstrong <[email protected]>
Cc: Carlo Caione <[email protected]>
Cc: Kevin Hilman <[email protected]>
Cc: Thierry Reding <[email protected]>
Cc: Laurent Pinchart <[email protected]>
Cc: Mark Yao <[email protected]>
Cc: Heiko Stuebner <[email protected]>
Cc: Maxime Ripard <[email protected]>
Cc: Chen-Yu Tsai <[email protected]>
Cc: Jyri Sarha <[email protected]>
Cc: Tomi Valkeinen <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Partially-Reviewed-by: Laurent Pinchart <[email protected]>
Reviewed-by: Philipp Zabel <[email protected]>
Acked-by: Maxime Ripard <[email protected]>
[seanpaul changed subject prefix and fixed conflict in stm/ltdc.c]
Signed-off-by: Sean Paul <[email protected]>
Signed-off-by: Daniel Vetter <[email protected]>
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MT8173 overlay can support UYVY and YUYV format,
we add the format in DRM driver.
Signed-off-by: Bibby Hsieh <[email protected]>
Reviewed-by: Daniel Kurtz <[email protected]>
Signed-off-by: CK Hu <[email protected]>
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This patch add support for the Mediatek MT2701 DISP subsystem.
There is only one OVL engine in MT2701.
Signed-off-by: YT Shen <[email protected]>
Acked-by: CK Hu <[email protected]>
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There are some hardware settings changed, between MT8173 & MT2701:
DISP_OVL address offset changed, color format definition changed.
DISP_RDMA fifo size changed.
DISP_COLOR offset changed.
MIPI_TX pll setting changed.
And add prefix for mtk_ddp_main & mtk_ddp_ext & mutex_mod.
Signed-off-by: YT Shen <[email protected]>
Acked-by: CK Hu <[email protected]>
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define helpers for converting from 'mtk_ddp_comp' to 'mtk_disp_ovl'
define helpers for converting from 'mtk_ddp_comp' to 'mtk_disp_rdma'
Signed-off-by: YT Shen <[email protected]>
Acked-by: CK Hu <[email protected]>
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The probe function requests the interrupt before initializing
the ddp component. Which leads to a null pointer dereference at boot.
Fix this by requesting the interrput after all components got
initialized properly.
Fixes: 119f5173628a ("drm/mediatek: Add DRM Driver for Mediatek SoC
MT8173.")
Signed-off-by: Matthias Brugger <[email protected]>
Change-Id: I57193a7ab554dfb37c35a455900689333adf511c
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To make sure that the first vblank IRQ after enabling
vblank isn't too short or immediate, we have to clear
the IRQ status before enable OVL interrupt.
Signed-off-by: Bibby Hsieh <[email protected]>
Acked-by: CK Hu <[email protected]>
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Some panels only accept bpc (bit per color) 6-bit.
But, the default bpc in mt8173 display data path is 8-bit.
If we didn't enable dithering function to convert bpc,
display cannot show the smooth grayscale image.
In mt8173, the dithering function in OD (OverDrive) and
GAMMA module, we have to config them with
connector->display_mode.bpc when CRTC initial.
1. Clear the default value at *_DITHER_5 and *_DITHER_7 register.
2. Calculate the LSB_ERR_SHIFT bits and ADD_LSHIFT bits two values.
i.e. Input bpc of OD is 10 bits, we assume the bpc of panel is 6-bit,
so, we need to set 4-bit to LSB_ERR_SHIFT and ADD_LSHIFT bits respectively.
3. Then, set the OD or GAMMA to dithering mode depends on path-1 or path-2.
Signed-off-by: Bibby Hsieh <[email protected]>
Signed-off-by: Philipp Zabel <[email protected]>
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This patch adds an initial DRM driver for the Mediatek MT8173 DISP
subsystem. It currently supports two fixed output streams from the
OVL0/OVL1 sources to the DSI0/DPI0 sinks, respectively.
Signed-off-by: CK Hu <[email protected]>
Signed-off-by: YT Shen <[email protected]>
Signed-off-by: Daniel Kurtz <[email protected]>
Signed-off-by: Bibby Hsieh <[email protected]>
Signed-off-by: Mao Huang <[email protected]>
Signed-off-by: Philipp Zabel <[email protected]>
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