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2024-06-05drm/i915: Add a separate definition for PIPE_CRC_RES_HSWVille Syrjälä2-1/+6
On hsw+ we only have one CRC result register, instead of the five we have on ivb, and some of the others have been repurposed to serve other CRC related purposes. Since the hsw+ vs. pre-hsw register operate quite differently let's add a separate definition for the hsw+ variant to make the situation a bit more clear. Also since we only use this from a hsw+ codepath there is no real benefit to be had with reusing the ivb register definition. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Jani Nikula <[email protected]>
2024-06-05drm/i915: Regroup pipe CRC regsVille Syrjälä1-20/+23
Put all the definitions related to a single pipe CRC register in one place, instead of the current approach where things are spread all over the place. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Jani Nikula <[email protected]>
2024-06-05drm/i915: Switch PIPE_CRC_RES_*_IVB to _MMIO_PIPE()Ville Syrjälä2-11/+11
PIPE_CRC_RES_*_IVB are proper pipe registers, and only valid for IVB+ where pipe register blocks are equally spaced, so we can switch from _MMIO_TRANS2() to the simpler _MMIO_PIPE() for these. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Jani Nikula <[email protected]>
2024-06-05drm/i915: Extract intel_pipe_crc_regs.hVille Syrjälä4-81/+94
The CRC registers are a pretty self contained bunch. Extract them to a separate header to declutter i915_reg.h. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Jani Nikula <[email protected]>
2024-06-05drm/i915/dsb: Use intel_color_uses_dsb()Ville Syrjälä1-1/+3
Use intel_color_uses_dsb() instead of open coding it in intel_vblank_evade_init(). Make the logic around DSB a bit more isolated from the rest of the code. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Rodrigo Vivi <[email protected]>
2024-06-05drm/i915/dsb: Pass DSB engine ID to intel_dsb_prepare()Ville Syrjälä3-3/+6
Allow the caller of intel_dsb_prepare() to determine which DSB engine (out of the three possible per pipe) to use. This will let us utilize multiple DSB engines during the same commit. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Rodrigo Vivi <[email protected]>
2024-06-05drm/i915/dsb: Move DSB ID definition to the headerVille Syrjälä2-8/+8
We're going to need to make the DSB ID visible outside the DSB code, so that we eg. can use multiple DSB engines in parallel. to that end move the definition to intel_dsb.h. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Rodrigo Vivi <[email protected]>
2024-06-05drm/i915/dsb: Polish the DSB ID enumVille Syrjälä1-11/+11
Namespace the DSB ID enum properly, and make the naming match other such enums in general. Also make the names 0 based as that's what Bspec uses for DSB (unlike eg. planes where it uses 1 based indexing). We'll throw out INVALID_DSB while at it since we have no use for it at the moment. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Rodrigo Vivi <[email protected]>
2024-06-04drm/i915: Fix assert on pending async-put power domain work when it requeues ↵Imre Deak1-6/+6
itself Commit dd839aa857eb ("drm/i915: Fix incorrect assert about pending power domain async-put work") fixed the assert about a pending work dropping a display power reference asynchronously, leading to the drm_WARN_ON(!queue_delayed_work(&power_domains->async_put_work)); warn next time around a power reference was put asynchronously, due to a stale instance of the work still being pending. However the fix didn't consider the case where multiple power reference was acquired and put, requiring the work to requeue itself. Extend the fix for this case as well canceling the pending instance of the work before it requeues itself. Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10915 Signed-off-by: Imre Deak <[email protected]> Reviewed-by: Jouni Högander <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-06-03drm/i915/psr: Add Early Transport into psr debugfs interfaceJouni Högander1-8/+27
We want to have sink Early Transport capability and usage in our psr debugfs status interface. v4: use su_region_et_enabled instead of psr2_su_region_et_valid v3: remove extra space from "PSR mode: disabled" v2: printout "Selective Update enabled (Early Transport)" instead of "Selective Update Early Transport enabled" Reviewed-by: Animesh Manna <[email protected]> Signed-off-by: Jouni Högander <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-06-03drm/i915/psr: Allow setting I915_PSR_DEBUG_SU_REGION_ET_DISABLE via debugfsJouni Högander1-3/+10
Currently setting I915_PSR_DEBUG_SU_REGION_ET_DISABLE (0x20) via psr_debug debugfs interface is not allowed. This patch allows it. v3: - ensure psr is disabled/enabled if enable_psr2_su_region_et changes - remove extra space v2: ensure that fastset is performed when the bit changes Reviewed-by: Animesh Manna <[email protected]> Signed-off-by: Jouni Högander <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-06-03drm/i915/display: Selective fetch Y position on Region Early TransportJouni Högander1-1/+5
Selective fetch Y position differs when Region Early Transport is used. Use formula from Bspec for this. Bspec: 68927 Reviewed-by: Animesh Manna <[email protected]> Signed-off-by: Jouni Högander <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-06-03drm/i915/psr: Use enable boolean from intel_crtc_state for Early TransportJouni Högander1-1/+1
When enabling Early Transport use intel_crtc_state->enable_psr2_su_region_et instead of psr2_su_region_et_valid. Reviewed-by: Animesh Manna <[email protected]> Fixes: 467e4e061c44 ("drm/i915/psr: Enable psr2 early transport as possible") Signed-off-by: Jouni Högander <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-06-03drm/i915/psr: Get Early Transport status in intel_psr_pipe_get_configJouni Högander1-0/+2
We are currently not getting Early Transport status information in intel_psr_pipe_get_config. Fix this. Reviewed-by: Animesh Manna <[email protected]> Fixes: 467e4e061c44 ("drm/i915/psr: Enable psr2 early transport as possible") Signed-off-by: Jouni Högander <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-06-03drm/i915/psr: Add Early Transport status boolean into intel_psrJouni Högander2-1/+4
Currently we are purely relying on psr2_su_region_et_valid. Add new boolean value into intel_psr struct indicating whether Early Transport is enabled or not and use it instead of psr2_su_region_et_valid for getting Early Transport status information. Reviewed-by: Animesh Manna <[email protected]> Signed-off-by: Jouni Högander <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-05-31drm: move i915_hdcp_interface.h under include/drm/intelJani Nikula3-3/+3
Clean up the top level include/drm directory by grouping all the Intel specific files under a common subdirectory. Cc: Daniel Vetter <[email protected]> Cc: Dave Airlie <[email protected]> Cc: Lucas De Marchi <[email protected]> Cc: Tomas Winkler <[email protected]> Acked-by: Lucas De Marchi <[email protected]> Acked-by: Rodrigo Vivi <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/5f53384118e33123d3c87b94cc8835360237698b.1717075103.git.jani.nikula@intel.com
2024-05-31drm: move i915_pciids.h under include/drm/intelJani Nikula3-3/+3
Clean up the top level include/drm directory by grouping all the Intel specific files under a common subdirectory. Cc: Daniel Vetter <[email protected]> Cc: Dave Airlie <[email protected]> Cc: Lucas De Marchi <[email protected]> Cc: Bjorn Helgaas <[email protected]> Acked-by: Lucas De Marchi <[email protected]> Acked-by: Rodrigo Vivi <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/a19cebc0f03588b9627dcaaebe69a9fef28c27f0.1717075103.git.jani.nikula@intel.com
2024-05-31drm: move i915_pxp_tee_interface.h under include/drm/intelJani Nikula1-1/+1
Clean up the top level include/drm directory by grouping all the Intel specific files under a common subdirectory. Cc: Daniel Vetter <[email protected]> Cc: Dave Airlie <[email protected]> Cc: Lucas De Marchi <[email protected]> Cc: Tomas Winkler <[email protected]> Acked-by: Lucas De Marchi <[email protected]> Acked-by: Rodrigo Vivi <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/5c1626978d2552ef5732dcf9427c903046afb9c1.1717075103.git.jani.nikula@intel.com
2024-05-31drm: move i915_drm.h under include/drm/intelJani Nikula5-5/+5
Clean up the top level include/drm directory by grouping all the Intel specific files under a common subdirectory. v2: Also fix comment in intel_pci_config.h (Ilpo) Cc: Daniel Vetter <[email protected]> Cc: Dave Airlie <[email protected]> Cc: Lucas De Marchi <[email protected]> Cc: Bjorn Helgaas <[email protected]> Cc: Hans de Goede <[email protected]> Cc: Ilpo Järvinen <[email protected]> Acked-by: Lucas De Marchi <[email protected]> Acked-by: Rodrigo Vivi <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/0e344a72e9be596ac2b8b55a26fd674a96f03cdc.1717075103.git.jani.nikula@intel.com
2024-05-31drm: move intel_lpe_audio.h under include/drm/intelJani Nikula2-2/+2
Clean up the top level include/drm directory by grouping all the Intel specific files under a common subdirectory. Cc: Daniel Vetter <[email protected]> Cc: Dave Airlie <[email protected]> Cc: Lucas De Marchi <[email protected]> Cc: Jaroslav Kysela <[email protected]> Cc: Takashi Iwai <[email protected]> Reviewed-by: Andi Shyti <[email protected]> Acked-by: Lucas De Marchi <[email protected]> Acked-by: Rodrigo Vivi <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/2d645970a65cfd13e01fd8195b35bf9483ae9c2f.1717075103.git.jani.nikula@intel.com
2024-05-31drm: move i915_component.h under include/drm/intelJani Nikula4-4/+4
Clean up the top level include/drm directory by grouping all the Intel specific files under a common subdirectory. v2: Also change Documentation/gpu/i915.rst (Andi) Cc: Daniel Vetter <[email protected]> Cc: Dave Airlie <[email protected]> Cc: Lucas De Marchi <[email protected]> Cc: Tomas Winkler <[email protected]> Cc: Jaroslav Kysela <[email protected]> Cc: Takashi Iwai <[email protected]> Acked-by: Lucas De Marchi <[email protected]> Acked-by: Rodrigo Vivi <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/a8c07233a8234858eb6711140482ef8db4c91cf4.1717075103.git.jani.nikula@intel.com
2024-05-31drm: move i915_gsc_proxy_mei_interface.h under include/drm/intelJani Nikula1-1/+1
Clean up the top level include/drm directory by grouping all the Intel specific files under a common subdirectory. Cc: Daniel Vetter <[email protected]> Cc: Dave Airlie <[email protected]> Cc: Lucas De Marchi <[email protected]> Cc: Tomas Winkler <[email protected]> Reviewed-by: Andi Shyti <[email protected]> Acked-by: Lucas De Marchi <[email protected]> Acked-by: Rodrigo Vivi <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/461662d528c3f327c81b764b7c883cd4519d8729.1717075103.git.jani.nikula@intel.com
2024-05-31drm: move intel-gtt.h under include/drm/intelJani Nikula3-3/+3
Clean up the top level include/drm directory by grouping all the Intel specific files under a common subdirectory. Cc: Daniel Vetter <[email protected]> Cc: Dave Airlie <[email protected]> Cc: Lucas De Marchi <[email protected]> Reviewed-by: Andi Shyti <[email protected]> Acked-by: Lucas De Marchi <[email protected]> Acked-by: Rodrigo Vivi <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/ae224504d99cc6428da6dced9dcde2b7953624ef.1717075103.git.jani.nikula@intel.com
2024-05-31drm/i915: reduce includes in intel_clock_gating.cJani Nikula1-4/+0
With the refactoring in the file, some excessive includes were left behind and are now unnecessary. Remove. Reviewed-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Signed-off-by: Jani Nikula <[email protected]>
2024-05-31drm/i915: drop unnecessary i915_reg.h includesJani Nikula7-7/+0
With the register header refactoring, some of the includes of i915_reg.h have become unnecessary. Remove. Reviewed-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Signed-off-by: Jani Nikula <[email protected]>
2024-05-31drm/i915: remove intermediate _PCH_DP_* macrosJani Nikula1-8/+3
The intermediate macros are unused. Remove them. Reviewed-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/0145043ff9767de93cc3dc5119f0e7152965ebe6.1716894910.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <[email protected]>
2024-05-31drm/i915: move PCH DP AUX CH regs to intel_dp_aux_regs.hJani Nikula2-7/+8
Move the macros where they belong. Reviewed-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/9bc3a7bb34edc5dc17ffcb2a9e64edcef8c7a7b8.1716894910.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <[email protected]>
2024-05-31drm/i915: rearrange DP AUX register macrosJani Nikula1-4/+6
Follow the recommended style for grouping register macros. Reviewed-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/8ace710d8a1edac7e1af1ed12122fb6bc68114e9.1716894910.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <[email protected]>
2024-05-31drm/i915: remove unused DP AUX CH register macrosJani Nikula1-14/+0
The intermediate macros are no longer needed. Reviewed-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/c97134b22d802ae82b19c299b79807ee60d9fae5.1716894909.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <[email protected]>
2024-05-31drm/i915/gvt: use proper macros for DP AUX CH CTL registersJani Nikula2-23/+20
Use the proper helpers for DP AUX CH CTL registers, instead of reinventing the wheels. Reviewed-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/f30d35f28ef106d6fb2faf100fe1c5e3a42dfa20.1716894909.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <[email protected]>
2024-05-31drm/i915: Switch intel_usecs_to_scanlines() to 64bit mathsVille Syrjälä1-2/+2
Dotclocks can reach ~1GHz these days, so intel_usecs_to_scanlines(), with its 32bit maths, is currently limited to a few milliseconds. I want bigger numbers in DSB selftests, so switch over to 64bit maths. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Jani Nikula <[email protected]>
2024-05-31drm/i915: Move intel_crtc_scanline_offset()Ville Syrjälä1-38/+38
I want to use intel_crtc_scanline_offset() in intel_crtc_scanline_to_hw(). Relocate intel_crtc_scanline_offset() a bit to avoid a forward declaration. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Jani Nikula <[email protected]>
2024-05-31drm/i915: Simplify scanline_offset handling for gen2Ville Syrjälä1-5/+3
Currently intel_crtc_scanline_offset() is careful to always return a positive offset. That is not actually necessary as long as we take care of negative values when applying the offset in __intel_get_crtc_scanline(). This simplifies intel_crtc_scanline_offset(), and makes the scanline_offfset arithmetic more symmetric between the forward (__intel_get_crtc_scanline()) and reverse (intel_crtc_scanline_to_hw()) directions. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Jani Nikula <[email protected]>
2024-05-31drm/i915: Extract intel_mode_vtotal()Ville Syrjälä2-23/+18
We have several copies of code calculating the hardware's idea of vtotal. Pull that to a helper, similar to intel_mode_vblank_{start,end}(). Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Jani Nikula <[email protected]>
2024-05-31drm/i915: Extract intel_mode_vblank_end()Ville Syrjälä2-4/+13
Extract intel_mode_vblank_end() in the same vein as intel_mode_vblank_start(). While we have only one use of this it seems nicer to unify the approach. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Jani Nikula <[email protected]>
2024-05-31drm/i915: Reuse intel_mode_vblank_start()Ville Syrjälä3-13/+9
Replace a few hand rolled copies of intel_mode_vblank_start() with the real thing. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Jani Nikula <[email protected]>
2024-05-31drm/i915: Plumb the full atomic state into skl_ddb_add_affected_planes()Ville Syrjälä1-10/+9
skl_ddb_add_affected_planes() needs the full atomic state. Instead of digging that out from dubious sources plumb it in explicitly. The wm counterpart (skl_wm_add_affected_planes()) already does things in the proper way. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Jani Nikula <[email protected]>
2024-05-31drm/i915: Plumb the full atomic state into icl_check_nv12_planes()Ville Syrjälä1-5/+6
icl_check_nv12_planes() needs the full atomic state. Instead of digging that out from dubious sources plumb it in explicitly. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Jani Nikula <[email protected]>
2024-05-31drm/i915/cdclk: Plumb the full atomic state deeperVille Syrjälä1-25/+35
Various parts of the cdclk code need access the full atomic state. Currently it's being dug out via the cdclk_state->base.state pointer, which is not great as that pointer isn't always valid. Instead plumb the full atomic state from the top so that it's clear that it is in fact valid. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Jani Nikula <[email protected]>
2024-05-31drm/i915/display: add probe messageJani Nikula1-0/+5
Add an info message about which display device was probed. Reviewed-by: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/f9a4d015a2981ace2ef5b40b189efeaf6b18fb29.1716399081.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <[email protected]>
2024-05-31drm/i915/display: add support for subplatformsJani Nikula2-0/+230
Add support for subplatforms. This is similar to what the xe driver is doing. The subplatform is an enum and it's exclusive, i.e. only one subplatform can match, and it completely identifies the platform and subplatform. This is different from i915 core, and is notable in the handling of ULT/ULX and RPL/RPL-U. Reviewed-by: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/8c04e32648395c0b745bc31a1edd4ef6f574bb70.1716399081.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <[email protected]>
2024-05-31drm/i915/display: identify platforms with enum and nameJani Nikula2-0/+106
Add enum intel_display_platform and add that and name to all platform descriptors. Reviewed-by: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/5dec70931217cd93e3ef34f7a57f949f6683f048.1716399081.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <[email protected]>
2024-05-31drm/i915/display: change display probe to identify GMD ID based platformsJani Nikula1-18/+26
We'll need to identify all platforms, including the ones that have display defined by GMD ID. Add MTL and LNL. Their display info will still be probed via GMD ID. Reviewed-by: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/e26f6a1a0aa2b051f49d76242194f819be3d83fd.1716399081.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <[email protected]>
2024-05-31drm/i915/display: add platform descriptorsJani Nikula1-232/+326
We'll need to start identifying the platforms independently in display code in order to break free from the i915 and xe IS_<PLATFORM>() macros. This is fairly straightforward, as we already identify most platforms by PCI ID in display probe anyway. As the first step, add platform descriptors with pointers to display info. We'll have more platforms than display info, so minimize duplication: - Add separate skl/kbl/cfl/cml descriptors while they share the display info. - Add separate jsl/ehl descriptors while they share the display info. Identify ADL-P (and derivatives) and DG2 descriptors by their names even though their display info is Xe LPD or HPD. Reviewed-by: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/45425c155608403efc149d4a022c0b443aa71200.1716399081.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <[email protected]>
2024-05-31drm/i915/display: change GMD ID display ip ver propagation at probeJani Nikula2-25/+17
Add a name to the display ip version structure, and pass that around instead of a triplet of u16's. Reviewed-by: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/1610e9f5675b4d0d4f16ecd10a86486ce309a283.1716399081.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <[email protected]>
2024-05-31drm/i915/display: check platforms without display one level higherJani Nikula1-5/+6
The main change here is that the check for platforms without display is now also done for GMD ID based platforms. However, without matches, the end result is the same. Reviewed-by: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/78d5d326c4c89f1942f120655c279c9274e96bfb.1716399081.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <[email protected]>
2024-05-31drm/i915/display: change probe for no display caseJani Nikula1-5/+13
Return NULL for errors, and handle the no display case in one location. This will make subsequent changes easier. Reviewed-by: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/8dfac3532a72ca6494c9955987166d9c6e0919bd.1716399081.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <[email protected]>
2024-05-31drm/i915/display: move params copy at probe earlierJani Nikula1-2/+2
Copy the parameters earlier to make subsequent changes easier. Reviewed-by: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/a0c3e74d824d8a7c02fa1461c3d5518a71171256.1716399081.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <[email protected]>
2024-05-31drm/i915/alpm: Add debugfs for LOBFAnimesh Manna3-0/+53
For validation purpose add debugfs for LOBF. v1: Initial version. v2: Add aux-wake/less info along with lobf status. [Jouni] Reviewed-by: Jouni Högander <[email protected]> Signed-off-by: Animesh Manna <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-05-31drm/i915/alpm: Enable lobf from source in ALPM_CTLAnimesh Manna3-8/+14
Set the Link Off Between Frames Enable bit in ALPM_CTL register. Note: Lobf need to be enabled adaptive sync fixed refresh mode where vmin = vmax = flipline, which will arise after cmmr feature enablement. Will add enabling sequence in a separate patch. v1: Initial version. v2: Condition check modified in alpm_configure(). [Jouni] Reviewed-by: Jouni Högander <[email protected]> Signed-off-by: Animesh Manna <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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