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2018-01-30drm/i915: Downgrade hdcp logs from INFO to DEBUG_KMSSean Paul1-4/+5
HDCP was a bit too chatty to get along with the rest of the i915 driver. Suggested-by: Daniel Vetter <[email protected]> Reviewed-by: Daniel Vetter <[email protected]> Signed-off-by: Sean Paul <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-01-30drm/i915: Restore HDCP DRM_INFO when with no downstreamSean Paul1-3/+2
The commit below returned earlier than before, but failed to move the info message when authenticating without downstream devices. This patch restores the message on authentication success. Changes in v2: - s/no downstream devices/no repeater present/ (Ram) Fixes: 87eb3ec818fa ("drm/i915: II stage HDCP auth for repeater only") Cc: Ramalingam C <[email protected]> Cc: Sean Paul <[email protected]> Cc: Jani Nikula <[email protected]> Cc: Joonas Lahtinen <[email protected]> Cc: Rodrigo Vivi <[email protected]> Cc: [email protected] Reviewed-by: Daniel Vetter <[email protected]> Signed-off-by: Sean Paul <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-01-30drm/i915: Add WA for planes ending close to left screen edgeImre Deak1-4/+8
While running the kms_plane clipping test I noticed a similar problem to the one described in Display WA #1175. In this case, similarly for planes other than the cursor, with 1 or 3 pixels visible from the left edge of the screen to the end of the plane and an odd plane X offset used for clipping causes the same kind of underflow and display corruption as described for WA #1175. Fix this in a similar way as that WA rejecting planes ending <4 pixels from the left screen edge. v2: - Rebase on v2 of patch 1/1. Testcase: igt/kms_plane/plane-clipping-pipe-*-planes Signed-off-by: Imre Deak <[email protected]> Reviewed-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-01-30drm/i915: Add display WA #1175 for planes ending close to right screen edgeImre Deak3-6/+27
As described in the WA on GLK and CNL planes on the right edge of the screen that have less than 4 pixels visible from the beginning of the plane to the edge of the screen can cause FIFO underflow and display corruption. On GLK/CNL I could trigger the problem only if the plane was at the same time also aligned to the top edge of the screen (after clipping) and there were exactly 2 pixels visible from the start of the plane to the right edge of the screen (so couldn't trigger it with 1 or 3 pixels visible). Nevertheless, to be sure, I also applied the WA for these cases. I also couldn't see any problem with the cursor plane and later Art confirmed that it's not affected, so the WA is applied only for the other plane types. v2: - Use -ERANGE instead of -EINVAL. (Chris) Signed-off-by: Imre Deak <[email protected]> Reviewed-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-01-29drm/i915/cnp: Properly handle VBT ddc pin out of bounds.Rodrigo Vivi1-2/+3
If the table result is out of bounds on the array map there is something really wrong with VBT pin so we don't return that vbt_pin, but only return 0 instead. This basically reverts commit 'a8e6f3888b05 ("drm/i915/cnp: Ignore VBT request for know invalid DDC pin.")' Also this properly fixes commit 9c3b2689d01f ("drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin.") v2: Do in a way that we don't break other platforms. (Jani) v3: Keep debug message (Jani) v4: Don't mess with 0 mapping was noticed by Jani and addressed with a simple solution suggested by Lucas that makes this even simpler. Fixes: a8e6f3888b05 ("drm/i915/cnp: Ignore VBT request for know invalid DDC pin.") Fixes: 9c3b2689d01f ("drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin.") Cc: Radhakrishna Sripada <[email protected]> Cc: Jani Nikula <[email protected]> Cc: Kai Heng Feng <[email protected]> Cc: Lucas De Marchi <[email protected]> Suggested-by: Lucas De Marchi <[email protected]> Signed-off-by: Rodrigo Vivi <[email protected]> Reviewed-by: Lucas De Marchi <[email protected]> Tested-by: Kai-Heng Feng <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-01-29drm/i915: Provide a device level .mode_valid() hookVille Syrjälä7-19/+28
We never support certain mode flags etc. Reject those early on in the mode_config.mode_valid() hook. That allows us to remove some duplicated checks from the connector .mode_valid() hooks, and it guarantees that we never see those flags even from user mode as the mode_config.mode_valid() hooks gets executed for those as well. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Daniel Vetter <[email protected]>
2018-01-29drm/i915: Assert that we do not try to unsubmit a completed requestChris Wilson1-0/+2
Assert that we do not try to unsubmit a completed request, as should we try to resubmit it later, the ring is already past the request's breadcrumb and the breadcrumb will not be updated. Signed-off-by: Chris Wilson <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Michał Winiarski <[email protected]>
2018-01-29drm/i915: Simplify guard logic for setup_scratch_page()Chris Wilson1-36/+33
Older gcc is complaining it can't follow the guards and thinks that addr may be used uninitialised In the process, we can simplify down to one loop, add/remove: 0/0 grow/shrink: 0/1 up/down: 0/-131 (-131) Function old new delta setup_scratch_page 545 414 -131 Reported-by: Geert Uytterhoeven <[email protected]> Signed-off-by: Chris Wilson <[email protected]> Cc: Matthew Auld <[email protected]> Reviewed-by: Matthew Auld <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-01-29Merge drm-next into drm-intel-next-queuedJoonas Lahtinen2-3/+6
Pull 4.15 into drm-intel-next-queued for next feature pull. Signed-off-by: Joonas Lahtinen <[email protected]>
2018-01-29Revert "drm/i915: mark all device info struct with __initconst"Lionel Landwerlin1-48/+48
This reverts commit 5b54eddd3920e9f6f1a6d972454baf350cbae77e. Conflicts: drivers/gpu/drm/i915/i915_pci.c Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104805 Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Chris Wilson <[email protected]> Fixes: 5b54eddd3920 ("drm/i915: mark all device info struct with __initconst") Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-01-26drm/i915/lrc: Remove superfluous WARN_ONChris Wilson1-7/+7
Remove the WARN_ON(ce->state) inside the static function only called when ce->state == NULL and downgrade the w/a batch setup warning into a developer only mode (GEM_WARN_ON). v2: Move the deferred alloc guard into the callee, eliminating the need for the WARN_ON: add/remove: 0/0 grow/shrink: 0/1 up/down: 0/-1 (-1) Function old new delta execlists_context_pin 1819 1818 -1 Signed-off-by: Chris Wilson <[email protected]> Cc: Tvrtko Ursulin <[email protected]> Reviewed-by: Tvrtko Ursulin <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-01-25drm/i915/lrc: Clear context restore/save inhibit flags for new contextsChris Wilson1-0/+8
CTX_CONTEXT_CONTROL (CTX_SR_CTL) operates as a masked register and so will only apply the bits that are selected by the upper half. In the case of selectively enabling sr inhibit, this may mean the context keeps the current setting (so forgetting to save the context later, eventually leading to a very upset GPU!). Fixes: 517aaffe0c1b ("drm/i915/execlists: Inhibit context save/restore for the fake preempt context") Signed-off-by: Chris Wilson <[email protected]> Cc: Michal Winiarski <[email protected]> Cc: Michel Thierry <[email protected]> Cc: Michal Wajdeczko <[email protected]> Cc: Tvrtko Ursulin <[email protected]> Cc: Mika Kuoppala <[email protected]> Cc: Joonas Lahtinen <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Michel Thierry <[email protected]>
2018-01-24drm/i915/guc: Fix comments style in intel_guc_log.cSagar Arun Kamble1-15/+30
Use consistent multi-line comment style as per guideline. v2: Reverted comments prefix update to kernel-doc comment. (Chris) Suggested-by: Michal Wajdeczko <[email protected]> Signed-off-by: Sagar Arun Kamble <[email protected]> Cc: Michal Wajdeczko <[email protected]> Cc: Chris Wilson <[email protected]> Reviewed-by: Chris Wilson <[email protected]> Signed-off-by: Chris Wilson <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-01-24drm/i915/guc: Update name and prototype of i915_guc_log_controlSagar Arun Kamble3-7/+7
i915_guc_log_control is GuC interface and GuC APIs that are not user facing should be named with "intel_guc" prefix hence we change name to intel_guc_log_control. Also changed the parameter to intel_guc struct. v2: Move log vma check to intel_guc_log_control (Michal) Return -ENODEV when log isn't initialized. (Chris) Suggested-by: Michal Wajdeczko <[email protected]> Signed-off-by: Sagar Arun Kamble <[email protected]> Cc: Michal Wajdeczko <[email protected]> Cc: Chris Wilson <[email protected]> Reviewed-by: Michal Wajdeczko <[email protected]> Signed-off-by: Chris Wilson <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-01-24drm/i915/guc: Fix lockdep due to log relay channel handling under struct_mutexSagar Arun Kamble8-66/+172
This patch fixes lockdep issue due to circular locking dependency of struct_mutex, i_mutex_key, mmap_sem, relay_channels_mutex. For GuC log relay channel we create debugfs file that requires i_mutex_key lock and we are doing that under struct_mutex. So we introduced newer dependency as: &dev->struct_mutex --> &sb->s_type->i_mutex_key#3 --> &mm->mmap_sem However, there is dependency from mmap_sem to struct_mutex. Hence we separate the relay create/destroy operation from under struct_mutex. Also added runtime check of relay buffer status. Reviewed-by: Chris Wilson <[email protected]> ====================================================== WARNING: possible circular locking dependency detected 4.15.0-rc6-CI-Patchwork_7614+ #1 Not tainted ------------------------------------------------------ debugfs_test/1388 is trying to acquire lock: (&dev->struct_mutex){+.+.}, at: [<00000000d5e1d915>] i915_mutex_lock_interruptible+0x47/0x130 [i915] but task is already holding lock: (&mm->mmap_sem){++++}, at: [<0000000029a9c131>] __do_page_fault+0x106/0x560 which lock already depends on the new lock. the existing dependency chain (in reverse order) is: -> #3 (&mm->mmap_sem){++++}: _copy_to_user+0x1e/0x70 filldir+0x8c/0xf0 dcache_readdir+0xeb/0x160 iterate_dir+0xdc/0x140 SyS_getdents+0xa0/0x130 entry_SYSCALL_64_fastpath+0x1c/0x89 -> #2 (&sb->s_type->i_mutex_key#3){++++}: start_creating+0x59/0x110 __debugfs_create_file+0x2e/0xe0 relay_create_buf_file+0x62/0x80 relay_late_setup_files+0x84/0x250 guc_log_late_setup+0x4f/0x110 [i915] i915_guc_log_register+0x32/0x40 [i915] i915_driver_load+0x7b6/0x1720 [i915] i915_pci_probe+0x2e/0x90 [i915] pci_device_probe+0x9c/0x120 driver_probe_device+0x2a3/0x480 __driver_attach+0xd9/0xe0 bus_for_each_dev+0x57/0x90 bus_add_driver+0x168/0x260 driver_register+0x52/0xc0 do_one_initcall+0x39/0x150 do_init_module+0x56/0x1ef load_module+0x231c/0x2d70 SyS_finit_module+0xa5/0xe0 entry_SYSCALL_64_fastpath+0x1c/0x89 -> #1 (relay_channels_mutex){+.+.}: relay_open+0x12c/0x2b0 intel_guc_log_runtime_create+0xab/0x230 [i915] intel_guc_init+0x81/0x120 [i915] intel_uc_init+0x29/0xa0 [i915] i915_gem_init+0x182/0x530 [i915] i915_driver_load+0xaa9/0x1720 [i915] i915_pci_probe+0x2e/0x90 [i915] pci_device_probe+0x9c/0x120 driver_probe_device+0x2a3/0x480 __driver_attach+0xd9/0xe0 bus_for_each_dev+0x57/0x90 bus_add_driver+0x168/0x260 driver_register+0x52/0xc0 do_one_initcall+0x39/0x150 do_init_module+0x56/0x1ef load_module+0x231c/0x2d70 SyS_finit_module+0xa5/0xe0 entry_SYSCALL_64_fastpath+0x1c/0x89 -> #0 (&dev->struct_mutex){+.+.}: __mutex_lock+0x81/0x9b0 i915_mutex_lock_interruptible+0x47/0x130 [i915] i915_gem_fault+0x201/0x790 [i915] __do_fault+0x15/0x70 __handle_mm_fault+0x677/0xdc0 handle_mm_fault+0x14f/0x2f0 __do_page_fault+0x2d1/0x560 page_fault+0x4c/0x60 other info that might help us debug this: Chain exists of: &dev->struct_mutex --> &sb->s_type->i_mutex_key#3 --> &mm->mmap_sem Possible unsafe locking scenario: CPU0 CPU1 ---- ---- lock(&mm->mmap_sem); lock(&sb->s_type->i_mutex_key#3); lock(&mm->mmap_sem); lock(&dev->struct_mutex); *** DEADLOCK *** 1 lock held by debugfs_test/1388: #0: (&mm->mmap_sem){++++}, at: [<0000000029a9c131>] __do_page_fault+0x106/0x560 stack backtrace: CPU: 2 PID: 1388 Comm: debugfs_test Not tainted 4.15.0-rc6-CI-Patchwork_7614+ #1 Hardware name: To Be Filled By O.E.M. To Be Filled By O.E.M./J4205-ITX, BIOS P1.10 09/29/2016 Call Trace: dump_stack+0x5f/0x86 print_circular_bug.isra.18+0x1d0/0x2c0 __lock_acquire+0x14ae/0x1b60 ? lock_acquire+0xaf/0x200 lock_acquire+0xaf/0x200 ? i915_mutex_lock_interruptible+0x47/0x130 [i915] __mutex_lock+0x81/0x9b0 ? i915_mutex_lock_interruptible+0x47/0x130 [i915] ? i915_mutex_lock_interruptible+0x47/0x130 [i915] ? i915_mutex_lock_interruptible+0x47/0x130 [i915] i915_mutex_lock_interruptible+0x47/0x130 [i915] ? __pm_runtime_resume+0x4f/0x80 i915_gem_fault+0x201/0x790 [i915] __do_fault+0x15/0x70 ? _raw_spin_unlock+0x29/0x40 __handle_mm_fault+0x677/0xdc0 handle_mm_fault+0x14f/0x2f0 __do_page_fault+0x2d1/0x560 ? page_fault+0x36/0x60 page_fault+0x4c/0x60 v2: Added lock protection to guc->log.runtime.relay_chan (Chris) Fixed locking inside guc_flush_logs uncovered by new lockdep. v3: Locking guc_read_update_log_buffer entirely with relay_lock. (Chris) Prepared intel_guc_init_early. Moved relay_lock inside relay_create relay_destroy, relay_file_create, guc_read_update_log_buffer. (Michal) Removed struct_mutex lock around guc_log_flush and removed usage of guc_log_has_relay() from runtime_create path as it needs struct_mutex lock. v4: Handle NULL relay sub buffer pointer earlier in read_update_log_buffer (Chris). Fixed comment suffix **/. (Michal) Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104693 Testcase: igt/debugfs_test/read_all_entries # with enable_guc=1 and guc_log_level=1 Signed-off-by: Sagar Arun Kamble <[email protected]> Cc: Michal Wajdeczko <[email protected]> Cc: Daniele Ceraolo Spurio <[email protected]> Cc: Tvrtko Ursulin <[email protected]> Cc: Chris Wilson <[email protected]> Cc: Joonas Lahtinen <[email protected]> Cc: Marta Lofstedt <[email protected]> Cc: Michal Winiarski <[email protected]> Signed-off-by: Chris Wilson <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-01-24drm/i915/guc: Enable interrupts before resuming GuC during runtime resumeSagar Arun Kamble1-4/+9
GuC log streaming needs interrupts enabled prior to GuC resume but runtime pm interrupt setup was happening post GuC resume. Fix it. While at it, fix the unwinding of steps in the runtime suspend path. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104695 Signed-off-by: Sagar Arun Kamble <[email protected]> Cc: Chris Wilson <[email protected]> Cc: Michal Wajdeczko <[email protected]> Cc: Michał Winiarski <[email protected]> Cc: Joonas Lahtinen <[email protected]> Cc: Marta Lofstedt <[email protected]> Reviewed-by: Chris Wilson <[email protected]> Signed-off-by: Chris Wilson <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-01-24drm/i915/guc: Grab RPM wakelock while disabling GuC interruptsSagar Arun Kamble2-0/+9
Disabling GuC interrupts involves access to GuC IRQ control registers hence ensure device is RPM awake. v1-v2: old changelog 1: Add comment about need to synchronize flush work and log runtime destroy 2: Moved patch earlier in the series and removed comment about future work. (Tvrtko) v3: Added assert_rpm_wakelock_held() to gen9_*_guc_interrupts. (Chris) Signed-off-by: Sagar Arun Kamble <[email protected]> Cc: Michal Wajdeczko <[email protected]> Cc: Daniele Ceraolo Spurio <[email protected]> Cc: Tvrtko Ursulin <[email protected]> Cc: Chris Wilson <[email protected]> Cc: Joonas Lahtinen <[email protected]> Reviewed-by: Chris Wilson <[email protected]> Signed-off-by: Chris Wilson <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-01-24drm/i915: Add a comment exlaining CCS hsub/vsubVille Syrjälä1-0/+14
Let's document why we claim hsub==8,vsub==16 for CCS. v2: Replace my explanation with Jason's Cc: Daniel Vetter <[email protected]> Cc: Ben Widawsky <[email protected]> Cc: Jason Ekstrand <[email protected]> Cc: Daniel Stone <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Jason Ekstrand <[email protected]>
2018-01-24drm/i915: Implement display w/a #1143Ville Syrjälä2-2/+48
Apparently SKL/KBL/CFL need some manual help to get the programmed HDMI vswing to stick. Implement the relevant workaround (display w/a #1143). Note that the relevant chicken bits live in a transcoder register even though the bits affect a specific DDI port rather than a specific transcoder. Hence we must pick the correct transcoder register instance based on the port rather than based on the cpu_transcoder. Also note that for completeness I included support for DDI A/E in the code even though we never have HDMI on those ports. v2: CFL needs the w/a as well (Rodrigo and Art) Cc: Rodrigo Vivi <[email protected]> Cc: Art Runyan <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Rodrigo Vivi <[email protected]>
2018-01-24drm/i915: Use enum plane_id for frontbuffer trackingVille Syrjälä4-12/+7
Replace the ad-hoc plane indexing scheme used by the frontbuffer tracking with enum plane_id. The old video overlay not being part of the plane_id namespace will just be given the high bit. v2: Drop the unintended whitespace change (Chris) Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Chris Wilson <[email protected]>
2018-01-24drm/i915: Shrink the GEM kmem_caches upon idlingChris Wilson1-0/+79
When we finally decide the gpu is idle, that is a good time to shrink our kmem_caches. v3: Defer until an rcu grace period after we idle. v4: Think about epoch wraparound and how likely that is. v5: Use I915_EPOCH_INVALID magic. Signed-off-by: Chris Wilson <[email protected]> Cc: Tvrtko Ursulin <[email protected]> Reviewed-by: Tvrtko Ursulin <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-01-24drm/i915: Track the number of times we have woken the GPU upChris Wilson3-3/+12
By counting the number of times we have woken up, we have a very simple means of defining an epoch, which will come in handy if we want to perform deferred tasks at the end of an epoch (i.e. while we are going to sleep) without imposing on the next activity cycle. v2: No reason to specify precise number of bits here. v3: Take Tvrtko's advice and reserve 0 as an invalid epoch. Signed-off-by: Chris Wilson <[email protected]> Reviewed-by: Tvrtko Ursulin <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-01-24drm/i915/execlists: Inhibit context save/restore for the fake preempt contextChris Wilson2-0/+5
We only use the preempt context to inject an idle point into execlists. We never need to reference its logical state, so tell the GPU never to load it or save it. v2: BIT(2) for save-inhibit. N.B. Daniele mentioned this bit mbz for ICL, and has been moved into the submission process rather than the context image. Suggested-by: Daniele Ceraolo Spurio <[email protected]> Signed-off-by: Chris Wilson <[email protected]> Cc: Michal Winiarski <[email protected]> Cc: Michel Thierry <[email protected]> Cc: Michal Wajdeczko <[email protected]> Cc: Tvrtko Ursulin <[email protected]> Cc: Mika Kuoppala <[email protected]> Cc: Daniele Ceraolo Spurio <[email protected]> Reviewed-by: Michel Thierry <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-01-24drm/i915: Move LRC register offsets to a header fileMichel Thierry2-54/+68
Newer platforms may have subtle offset changes, which will increase the number of defines, so it is probably better to start moving them to its own header file. Also move the macros used while setting the reg state. v2: Rename to intel_lrc_reg.h, to be consistent with i915_reg.h and intel_guc_reg.h (Chris) v3: License notice shenanigans. v4: Documentation/process/coding-style.rst is always right (Chris) v5: Rebase. Signed-off-by: Michel Thierry <[email protected]> Cc: Michal Wajdeczko <[email protected]> Cc: Lucas De Marchi <[email protected]> Cc: Chris Wilson <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Chris Wilson <[email protected]> Signed-off-by: Chris Wilson <[email protected]>
2018-01-24drm/i915/lrc: Update reg_state macros to pass checkpatchMichel Thierry1-8/+13
The macros we use to init the reg_state had the following issues reported by checkpatch --strict. Macro argument reuse 'reg_state' - possible side-effects Macro argument reuse 'pos' - possible side-effects Macro argument reuse 'ppgtt' - possible side-effects spaces preferred around that '+' (ctx:VxV) So fix these issues before they are moved to a new header file. Suggested-by: Chris Wilson <[email protected]> Signed-off-by: Michel Thierry <[email protected]> Cc: Chris Wilson <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Chris Wilson <[email protected]> Signed-off-by: Chris Wilson <[email protected]>
2018-01-24drm/i915/pmu: Fix sysfs exported counter configTvrtko Ursulin1-1/+1
We need to generate the event config value using the uAPI class and not the driver internal one. Signed-off-by: Tvrtko Ursulin <[email protected]> Fixes: 109ec558370f ("drm/i915/pmu: Only enumerate available counters in sysfs") Cc: Tvrtko Ursulin <[email protected]> Cc: Chris Wilson <[email protected]> Cc: Jani Nikula <[email protected]> Cc: Joonas Lahtinen <[email protected]> Cc: Rodrigo Vivi <[email protected]> Reviewed-by: Chris Wilson <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-01-23drm/i915/cnl: Fix aux selection for WA 1178Rodrigo Vivi1-1/+1
Current code always select _CNL_AUX_ANAOVRD1_B register regardless the pw in use. CNL_DISP_PW_AUX_B = 9 CNL_DISP_PW_AUX_C = 10 CNL_DISP_PW_AUX_D = 11 And for pick we want B = 0 C = 1 D = 2 Fixes: ddd39e4b3f8f ("drm/i915/cnl: apply Display WA #1178 to fix type C dongles") Cc: Lucas De Marchi <[email protected]> Signed-off-by: Rodrigo Vivi <[email protected]> Acked-by: Lucas De Marchi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-01-23drm/i915/cnp: Ignore VBT request for know invalid DDC pin.Rodrigo Vivi1-3/+8
Let's ignore VBT request if the pin is clearly wrong. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104139 Cc: Kai Heng Feng <[email protected]> Signed-off-by: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Radhakrishna Sripada <[email protected]>
2018-01-23drm/i915: Use drm_mode_get_hv_timing() to populate plane clip rectangleVille Syrjälä4-13/+18
Use drm_mode_get_hv_timing() to fill out the plane clip rectangle. No functional changes since pipe_src_w/h are already filled via drm_mode_get_hv_timing(). Once everyone agrees on this we can move the clip handling into drm_atomic_helper_check_plane_state(). Cc: Laurent Pinchart <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Daniel Vetter <[email protected]> Reviewed-by: Thierry Reding <[email protected]>
2018-01-23drm/i915: Reject odd pipe source width with double wide/dual linkVille Syrjälä1-3/+12
In order to guarantee that pipe_src_w/h matches the user mode h/vdisplay we must not adjust pipe_src_w to accommodate double wide/dual link. Instead just reject the mode outright. This will allows us to rely on crtc_state->mode for plane clipping. Cc: Laurent Pinchart <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Daniel Vetter <[email protected]> Reviewed-by: Thierry Reding <[email protected]>
2018-01-22drm/i915/execlists: Skip forcewake for ELSP submissionChris Wilson1-6/+12
Now that we can read the CSB from the HWSP, we may avoid having to perform mmio reads entirely and so forgo the rigmarole of the forcewake dance. v2: Include forcewake hint for GEM_TRACE readback of mmio. If we don't hold fw ourselves, the reads may return garbage. Signed-off-by: Chris Wilson <[email protected]> Cc: Tvrtko Ursulin <[email protected]> Reviewed-by: Tvrtko Ursulin <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-01-22drm/i915: Increase render/media power gating hysteresis for gen9+Chris Wilson1-3/+23
On gen9+, after an idle period the HW will disable the entire power well to conserve power (by preventing current leakage). It takes around a 100 microseconds to bring the power well back online afterwards. With the current hysteresis value of 25us (really 25 * 1280ns), we do not have sufficient time to respond to an interrupt and schedule the next execution before the HW powers itself down. (At present, we prevent this by grabbing the forcewake for prolonged periods of time, but that overkill fixed in the next patch.) The minimum we want to set the power gating hysteresis to is the length of time it takes us to service the GPU, which across a broad spectrum of machines is about 250us. (Note this also brings guc latency into the same ballpark as execlists.) v2: Include some notes on where I plucked the numbers from. Testcase: igt/gem_exec_nop/sequential Signed-off-by: Chris Wilson <[email protected]> Cc: Joonas Lahtinen <[email protected]> Cc: Michal Wajdeczko <[email protected]> Cc: Sagar Arun Kamble <[email protected]> Cc: Michel Thierry <[email protected]> Cc: Michal Winiarski <[email protected]> Reviewed-by: Sagar Arun Kamble <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-01-22drm/i915: Per-engine scratch VMA is mandatoryTvrtko Ursulin1-1/+1
We fail engine initialization if the scratch VMA cannot be created so there is no point in error handle it later. If the initialization ordering gets messed up, we can explode during development just as well. Signed-off-by: Tvrtko Ursulin <[email protected]> Reviewed-by: Chris Wilson <[email protected]> Reviewed-by: Michel Thierry <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-01-22drm/i915: Downgrade incorrect engine constructor usage warnings to developmentTvrtko Ursulin2-2/+3
Render engine constructor helpers must only be called from the render engine constructors, but there is no need to burden the production binaries with warnings which can only be triggered during development. Signed-off-by: Tvrtko Ursulin <[email protected]> Cc: Michel Thierry <[email protected]> Reviewed-by: Chris Wilson <[email protected]> Reviewed-by: Michel Thierry <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-01-22drm/i915/edp: Do not do link training fallback or prune modes on EDPManasi Navare1-9/+17
In case of eDP because the panel has a fixed mode, the link rate and lane count at which it is trained corresponds to the link BW required to support the native resolution of the panel. In case of panles with lower resolutions where fewer lanes are hooked up internally, that number is reflected in the MAX_LANE_COUNT DPCD register of the panel. So it is pointless to fallback to lower link rate/lane count in case of link training failure on eDP connector since the lower link BW will not support the native resolution of the panel and we cannot prune the preferred mode on the eDP connector. In case of Link training failure on the eDP panel, something is wrong in the HW internally and hence driver errors out with a loud and clear DRM_ERROR message. v2: * Fix the DEBUG_ERROR and add {} in else (Ville Syrjala) Cc: Clinton Taylor <[email protected]> Cc: Jim Bride <[email protected]> Cc: Jani Nikula <[email protected]> Cc: Ville Syrjala <[email protected]> Cc: Dave Airlie <[email protected]> Cc: Daniel Vetter <[email protected]> Signed-off-by: Manasi Navare <[email protected]> Reviewed-by: Ville Syrjala <[email protected]> Reference: https://bugs.freedesktop.org/show_bug.cgi?id=103369 Signed-off-by: Imre Deak <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-01-22drm/i915: Protect WC stash allocation against direct reclaimChris Wilson1-7/+25
As we attempt to allocate pages for use in a new WC stash, direct reclaim may run underneath us and fill up the WC stash. We have to be careful then not to overflow the pvec. Fixes: 66df1014efba ("drm/i915: Keep a small stash of preallocated WC pages") Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103109 Signed-off-by: Chris Wilson <[email protected]> Cc: Matthew Auld <[email protected]> Cc: Joonas Lahtinen <[email protected]> Reviewed-by: Matthew Auld <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-01-19drm/i915/psr: Don't name status or debug registers like control registers.Dhinakaran Pandiyan3-17/+17
Avoids some typo pitfalls. Cc: Chris Wilson <[email protected]> Cc: Rodrigo Vivi <[email protected]> Signed-off-by: Dhinakaran Pandiyan <[email protected]> Reviewed-by: Rodrigo Vivi <[email protected]> Signed-off-by: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-01-19drm/i915: Shrink the request kmem_cache on allocation errorChris Wilson1-0/+11
If we fail to allocate a new request, make sure we recover the pages that are in the process of being freed by inserting an RCU barrier. v2: Comment before the shrink and barrier in the error path. Signed-off-by: Chris Wilson <[email protected]> Cc: Tvrtko Ursulin <[email protected]> Reviewed-by: Tvrtko Ursulin <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-01-19drm/i915/guc: Keep GuC log disabled by defaultMichal Wajdeczko1-1/+1
It looks that GuC log functionality is not fully functional yet and causes issues when enabled by auto(-1) modparam on debug builds. For example, but not limited to: [ 30.062893] ====================================================== [ 30.062894] WARNING: possible circular locking dependency detected [ 30.062895] 4.15.0-rc8-CI-CI_DRM_3648+ #1 Tainted: G U [ 30.062896] ------------------------------------------------------ [ 30.062897] debugfs_test/1268 is trying to acquire lock: [ 30.062898] (&dev->struct_mutex){+.+.}, at: [<00000000e4213449>] i915_mutex_lock_interruptible+0x47/0x130 [i915] [ 30.062921] but task is already holding lock: [ 30.062921] (&mm->mmap_sem){++++}, at: [<00000000dd7adc93>] __do_page_fault+0x106/0x560 [ 30.062924] which lock already depends on the new lock. References: 0ed87953532652 ("drm/i915/guc: Redefine guc_log_level modparam values") Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104693 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104694 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104695 Signed-off-by: Michal Wajdeczko <[email protected]> Cc: Chris Wilson <[email protected]> Cc: Jani Saarinen <[email protected]> Cc: Tomi Sarvela <[email protected]> Cc: Marta Lofstedt <[email protected]> Cc: Michal Winiarski <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Michal Winiarski <[email protected]> Signed-off-by: Chris Wilson <[email protected]>
2018-01-19drm/i915/icl: Gen11 render context sizeTvrtko Ursulin1-0/+3
Gen11 removes the Resource Streamer, which frees up a big chunk of the context image. BSpec indicates 12544 DWORDs (13 pages), plus one page for PPHWSP. Please notice that, when looking at the BSpec context image table, the right filter has to be applied as some rows are excluded for specific GENs. Also, some rows apply per-subslice (for the calculation above, we have supposed I915_MAX_SUBSLICES = 8). v2: Rebase. v3: Use the right size as per the BSpec. v4: - Rebased on top of the default context size (Rodrigo) - Clarify in the commit message where the subslice calculation comes from. v5: s/12538/12544/ (Daniele) BSpec: 18907 Cc: Rodrigo Vivi <[email protected]> Acked-by: Ben Widawsky <[email protected]> (older version) Reviewed-by: Daniele Ceraolo Spurio <[email protected]> Signed-off-by: Tvrtko Ursulin <[email protected]> Signed-off-by: Oscar Mateo <[email protected]> Signed-off-by: Paulo Zanoni <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-01-19drm/i915: Return a default RCS context sizeOscar Mateo1-0/+2
Instead of returning whatever size the latest GEN used. This is because context sizes for new GENs can go up or down, but the only safe thing to do for missing cases is to use the largest known one, whatever that is. Suggested-by: Rodrigo Vivi <[email protected]> Reviewed-by: Daniele Ceraolo Spurio <[email protected]> Signed-off-by: Oscar Mateo <[email protected]> Signed-off-by: Paulo Zanoni <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-01-19drm/i915/icl: Icelake interrupt register addresses and bitsTvrtko Ursulin1-0/+63
MMIO addresses and register definition for the new interrupt registers in Gen11. v2: Removed spelt out VCS and VECS bit definitions. (Daniel Vetter) v3: Adjust VCS and VECS. (Daniele Ceraolo Spurio) v4: Bikeshedding (Paulo). Cc: Daniele Ceraolo Spurio <[email protected]> Reviewed-by: Paulo Zanoni <[email protected]> Signed-off-by: Tvrtko Ursulin <[email protected]> Signed-off-by: Rodrigo Vivi <[email protected]> Signed-off-by: Paulo Zanoni <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-01-19drm/i915/icp: Add the ID for ICL PCH - ICPAnusha Srivatsa2-0/+5
Add the PCI ID for the ICL PCH - ICP. v2: rebased. v3: rebased. v4: fix ICP name. v5: fix the ID mask (Fei Li). v6 (from Paulo): bikesheds. Cc: Li, Fei <[email protected]> Reviewed-by: Paulo Zanoni <[email protected]> Signed-off-by: Anusha Srivatsa <[email protected]> Signed-off-by: Paulo Zanoni <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-01-19drm/i915/icp: add ICP gmbus and gpio supportAnusha Srivatsa3-3/+54
In ICP, there are three TC ports and 3 DDI ports. v2: - Correct Pin mapping. v3: - Update pin mapping into per platform implementation rather than previous approach of port wise mapping. v4: - Update GMBUS_NUM_PINS (Paulo) v5: - rebase. v6: - Update function name, GMBUS_PIN_NUM (Paulo) v7 (from Paulo): - Make it apply. v8 (from Paulo): - Maintain consistent if ladder ordering. Suggested by: Ville Syrjala <[email protected]> Cc: Jani Nikula <[email protected]> Reviewed-by: Paulo Zanoni <[email protected]> Signed-off-by: Anusha Srivatsa <[email protected]> Signed-off-by: Paulo Zanoni <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-01-19drm/i915/icp: Add backlight Support for ICPAnusha Srivatsa1-4/+4
ICP has two backlight controllers - similar to previous platforms like BXT -, but we only use one controller for now, so we can just reuse the CNP code. v2: Remove the usage of ICP_SECOND_PPS_BACKLIGHT register.(Jani) Reuse CNP code since it is very similar.(Ville) v3 (from Paulo): Rebase. v4 (from Paulo): adjust commit message (James) and comment (Rodrigo). Cc: Jani Nikula <[email protected]> Cc: Ville Syrjala <[email protected]> Acked-by: Rodrigo Vivi <[email protected]> Acked-by: James Ausmus <[email protected]> Reviewed-by: Paulo Zanoni <[email protected]> Signed-off-by: Anusha Srivatsa <[email protected]> Signed-off-by: Paulo Zanoni <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Signed-off-by: Paulo Zanoni <[email protected]>
2018-01-19drm/i915/icp: Add Panel Power Sequencing SupportAnusha Srivatsa1-6/+12
ICP, like BXT, has has two panel power sequencers. v2: Simplify the code. Remove unwanted register definitions. Make code as close to BXT style as possible. (Ville) Also, remove the use of ICP_SECOND_PPS_BACKLIGHT for now. Moving forward, if we are sure we need to set this register, we can access it. v3: Use INTEL_GEN(dev_priv), make code more readeable. (Ville) v4 (from Paulo): - Coding style fixes. - Add a missing HAS_PCH_CNP -> gen10+ check. - Rebase. v5: Use per platform checks rather than INTEL_GEN(). v4 of this patch breaks on CoffeeLake, since CFL uses CNP and per platform check makes sense in that case. v6 (from Paulo): - v5 was a patch on top of v4, not a new version. Now v6 is correctly a new version of the original patch. Cc: Ville Syrjala <[email protected]> Reviewed-by: Paulo Zanoni <[email protected]> Signed-off-by: Anusha Srivatsa <[email protected]> Signed-off-by: Paulo Zanoni <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-01-19drm/i915/icp: Get/set proper Raw clock frequency on ICPAnusha Srivatsa2-2/+29
Add register definitions for setting the rawclock. Set the numerator,denominator and divider values. v2: Simplify the commit message. Simplify the math. Add register bits for numerator. (Paulo) v3 (from Paulo): coding style bikesheds. Reviewed-by: Paulo Zanoni <[email protected]> Signed-off-by: Anusha Srivatsa <[email protected]> Signed-off-by: Paulo Zanoni <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-01-19drm/i915/icp: Introduce Ice Lake PCHAnusha Srivatsa1-0/+2
Add the enum additions to ICP PCH. v2 (from Paulo): don't set any platforms to it yet since ICP support is incomplete. v3 (from Rodrigo): Fix ICP name. Reviewed-by: Paulo Zanoni <[email protected]> Signed-off-by: Anusha Srivatsa <[email protected]> Signed-off-by: Paulo Zanoni <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-01-19drm/i915/icl: Add initial Icelake definitions.Rodrigo Vivi4-0/+18
Icelake is an Intel® Processor containing an Intel® Graphics Controller. This is just an initial Icelake definition. PCI IDs, Icelake support and new features coming in following patches. v2: Add .ddb_size and .has_guc (Michal Wajdeczko). v3: Add the ICL_FEATURES macro (Kelvin Gardiner). v4 (from Paulo): Add missing __initconst (Paulo) and say "graphics controller" instead of something that looks like an official marketing name but isn't (Chris). Reviewed-by: Rodrigo Vivi <[email protected]> Reviewed-by: Paulo Zanoni <[email protected]> Signed-off-by: Rodrigo Vivi <[email protected]> Signed-off-by: Paulo Zanoni <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-01-19drm/i915/cnl: Add Port F definition.Rodrigo Vivi4-0/+14
Some Cannonlake SKUs will come with a full split between port A and port E. This will be called port F although it is not a 6th port, but only a split. Note this patch alone is not sufficient for port F enabling, it's just the first step. v2: Fix size of dvo_ports found by Ander. v3: Adding missing cases from intel_bios.c for Port_F v4: Adding other missing cases and fix the commit message. v5: Rebase on top of display headers rework. v6 (from Paulo): improve commit message, bikeshed bit definitions. Cc: Lucas De Marchi <[email protected]> Cc: Manasi Navare <[email protected]> Acked-by: Rodrigo Vivi <[email protected]> Reviewed-by: Paulo Zanoni <[email protected]> Signed-off-by: Rodrigo Vivi <[email protected]> Signed-off-by: Paulo Zanoni <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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