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2023-10-02drm/i915/display: Include i915_active header in frontbuffer tracking codeJouni Högander1-0/+1
Intel frontbuffer tracking code is using i915_active functions -> include i915_active.h directly instead of relying getting indirectly included. Cc: Jani Nikula <[email protected]> Signed-off-by: Jouni Högander <[email protected]> Reviewed-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-09-30drm/i915: Enable GGTT updates with binder in MTLNirmoy Das1-1/+2
MTL can hang because of a HW bug while parallel reading/writing from/to LMEM/GTTMMADR BAR so try to reduce GGTT update related pci transactions with blitter command as recommended for Wa_13010847436 and Wa_14019519902. Signed-off-by: Nirmoy Das <[email protected]> Reviewed-by: Oak Zeng <[email protected]> Reviewed-by: Andi Shyti <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-09-30drm/i915: Toggle binder context ready statusNirmoy Das1-0/+4
Toggle binder context ready status when needed. To issue gpu commands, the driver must be primed to receive requests. Maintain binder-based GGTT update disablement until driver probing completes. Moreover, implement a temporary disablement of blitter prior to entering suspend, followed by re-enablement post-resume. This is acceptable as those transition periods are mostly single threaded. v2: move changes to lower levels from i915_driver.c(Jani). use new function for setting context ready status. Signed-off-by: Nirmoy Das <[email protected]> Signed-off-by: Oak Zeng <[email protected]> Reviewed-by: Andi Shyti <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-09-30drm/i915: Implement GGTT update method with MI_UPDATE_GTTNirmoy Das1-0/+235
Implement GGTT update method with blitter command, MI_UPDATE_GTT and install those handlers if a platform requires that. v2: Make sure we hold the GT wakeref and Blitter engine wakeref before we call mutex_lock/intel_context_enter below. When GT/engine are not awake, the intel_context_enter calls into some runtime pm function which can end up with kmalloc/fs_reclaim. But trigger fs_reclaim holding a mutex lock is not allowed because shrinker can also try to hold the same mutex lock. It is a circular lock. So hold the GT/blitter engine wakeref before calling mutex_lock, to fix the circular lock. Signed-off-by: Nirmoy Das <[email protected]> Signed-off-by: Oak Zeng <[email protected]> Acked-by: Oak Zeng <[email protected]> Reviewed-by: Andi Shyti <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-09-30drm/i915: Parameterize binder context creationNirmoy Das3-1/+7
Add i915_ggtt_require_binder() to indicate that i915 needs to create binder context which will be used by subsequent patch to enable i915_address_space vfuncs that will use GPU commands to update GGTT. Signed-off-by: Nirmoy Das <[email protected]> Reviewed-by: Oak Zeng <[email protected]> Reviewed-by: Andi Shyti <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-09-30drm/i915: Implement for_each_sgt_daddr_nextNirmoy Das2-0/+13
Implement a way to iterate over sgt with pre-initialized sgt_iter state. Signed-off-by: Nirmoy Das <[email protected]> Reviewed-by: Oak Zeng <[email protected]> Reviewed-by: Andi Shyti <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-09-30drm/i915: Create a kernel context for GGTT updatesNirmoy Das5-3/+94
Create a separate kernel context if a platform requires GGTT updates using MI_UPDATE_GTT blitter command. Subsequent patch will introduce methods to update GGTT using this bind context and MI_UPDATE_GTT blitter command. v2: fix context leak on err(Oak) v3: improve err handling and improve function names(Andi) add docs for few functions. Signed-off-by: Nirmoy Das <[email protected]> Reviewed-by: Oak Zeng <[email protected]> Reviewed-by: Andi Shyti <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-09-30drm/i915: Lift runtime-pm acquire callbacks out of intel_wakeref.mutexChris Wilson1-25/+27
When runtime pm is first woken, it will synchronously call the registered callbacks for the device. These callbacks may pull in their own forest of locks, which we do not want to conflate with the intel_wakeref.mutex. A second minor benefit to reducing the coverage of the mutex, is that it will reduce contention for frequent sleeps and wakes (such as when being used for soft-rc6). v2: remove usage of fetch_and_zero() and other improvements(Jani) Signed-off-by: Chris Wilson <[email protected]> Signed-off-by: Nirmoy Das <[email protected]> Reviewed-by: Andi Shyti <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-09-30drm/i915/gem: Make i915_gem_shrinker multi-gt awareJonathan Cavitt1-18/+26
Where applicable, use for_each_gt instead of to_gt in the i915_gem_shrinker functions to make them apply to more than just the primary GT. Specifically, this ensure i915_gem_shrink_all retires all requests across all GTs, and this makes i915_gem_shrinker_vmap unmap VMAs from all GTs. v2: Pass correct GT to intel_gt_retire_requests(Andrzej). v3: Remove unnecessary braces(Andi) v4: Undo v3 to fix build failure. Signed-off-by: Jonathan Cavitt <[email protected]> Signed-off-by: Nirmoy Das <[email protected]> Reviewed-by: Andrzej Hajda <[email protected]> Reviewed-by: Andi Shyti <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-09-29drm/i915/display: add I915 conditional build to vlv_dsi_pll.hJani Nikula1-0/+9
Add stubs for !I915. Not all the functions need to be stubbed. Signed-off-by: Jani Nikula <[email protected]> Reviewed-by: Rodrigo Vivi <[email protected]> Acked-by: Dave Airlie <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/930c8d332d425a54dae7af16aed26ec293f80afd.1694514689.git.jani.nikula@intel.com
2023-09-29drm/i915/display: add I915 conditional build to intel_tv.hJani Nikula1-0/+6
Add stubs for !I915. Signed-off-by: Jani Nikula <[email protected]> Reviewed-by: Rodrigo Vivi <[email protected]> Acked-by: Dave Airlie <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/290e555ac87ea11cd6021c1338b75ad64c42ae98.1694514689.git.jani.nikula@intel.com
2023-09-29drm/i915/display: add I915 conditional build to intel_sdvo.hJani Nikula1-0/+13
Add stubs for !I915. Signed-off-by: Jani Nikula <[email protected]> Reviewed-by: Rodrigo Vivi <[email protected]> Acked-by: Dave Airlie <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/c34ea1f470590488acf40512da3892ca153f482a.1694514689.git.jani.nikula@intel.com
2023-09-29drm/i915/display: add I915 conditional build to intel_dvo.hJani Nikula1-0/+6
Add stubs for !I915. Signed-off-by: Jani Nikula <[email protected]> Reviewed-by: Rodrigo Vivi <[email protected]> Acked-by: Dave Airlie <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/d43b27742297083b37d52222c4bb72b062ef4967.1694514689.git.jani.nikula@intel.com
2023-09-29drm/i915/display: add I915 conditional build to g4x_hdmi.hJani Nikula1-0/+12
Add stubs for !I915. Signed-off-by: Jani Nikula <[email protected]> Reviewed-by: Rodrigo Vivi <[email protected]> Acked-by: Dave Airlie <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/ba2eea7ac081d0858a573062f197e00f3b186faf.1694514689.git.jani.nikula@intel.com
2023-09-29drm/i915/display: add I915 conditional build to i9xx_wm.hJani Nikula1-0/+17
Add stubs for !I915. Signed-off-by: Jani Nikula <[email protected]> Reviewed-by: Rodrigo Vivi <[email protected]> Acked-by: Dave Airlie <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/bf15b14d3d060fdb256c78d4b8514d642a8958e6.1694514689.git.jani.nikula@intel.com
2023-09-29drm/i915/display: add I915 conditional build to vlv_dsi.hJani Nikula1-0/+13
Add stubs for !I915. Signed-off-by: Jani Nikula <[email protected]> Reviewed-by: Rodrigo Vivi <[email protected]> Acked-by: Dave Airlie <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/9f538824f15096b0c1444ee50d175a0a22d7bd5e.1694514689.git.jani.nikula@intel.com
2023-09-29drm/i915/display: add I915 conditional build to intel_crt.hJani Nikula1-0/+14
Add stubs for !I915. Signed-off-by: Jani Nikula <[email protected]> Reviewed-by: Rodrigo Vivi <[email protected]> Acked-by: Dave Airlie <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/89a6daca98f87ed1a8a54367a977f146216330d2.1694514689.git.jani.nikula@intel.com
2023-09-29drm/i915/display: add I915 conditional build to intel_dpio_phy.hJani Nikula1-0/+96
Add stubs for !I915. Signed-off-by: Jani Nikula <[email protected]> Reviewed-by: Rodrigo Vivi <[email protected]> Acked-by: Dave Airlie <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/978bc7263e8de10ffc1ef16086341dd629347c8e.1694514689.git.jani.nikula@intel.com
2023-09-29drm/i915/display: add I915 conditional build to g4x_dp.hJani Nikula1-0/+26
Add stubs for !I915. Signed-off-by: Jani Nikula <[email protected]> Reviewed-by: Rodrigo Vivi <[email protected]> Acked-by: Dave Airlie <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/ba92fc1dee1f71018179dbe10b91982c9c93e7e6.1694514689.git.jani.nikula@intel.com
2023-09-29drm/i915/display: add I915 conditional build to intel_overlay.hJani Nikula1-0/+35
Add stubs for !I915. Signed-off-by: Jani Nikula <[email protected]> Reviewed-by: Rodrigo Vivi <[email protected]> Acked-by: Dave Airlie <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/45a127d37816ac97dfe493beeed060e323047014.1694514689.git.jani.nikula@intel.com
2023-09-29drm/i915/display: add I915 conditional build to intel_sprite.hJani Nikula1-0/+8
Add stubs for !I915. Signed-off-by: Jani Nikula <[email protected]> Reviewed-by: Rodrigo Vivi <[email protected]> Acked-by: Dave Airlie <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/b9680203b0b93dc3472260d7e4128984e533b421.1694514689.git.jani.nikula@intel.com
2023-09-29drm/i915/display: add I915 conditional build to intel_pch_display.hJani Nikula1-0/+53
Add stubs for !I915. Signed-off-by: Jani Nikula <[email protected]> Reviewed-by: Rodrigo Vivi <[email protected]> Acked-by: Dave Airlie <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/02de0089de58c9fb19b6b56121f6c917f51b4561.1694514689.git.jani.nikula@intel.com
2023-09-29drm/i915/display: add I915 conditional build to intel_pch_refclk.hJani Nikula1-0/+23
Add stubs for !I915. Signed-off-by: Jani Nikula <[email protected]> Reviewed-by: Rodrigo Vivi <[email protected]> Acked-by: Dave Airlie <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/4359b34cbcff6199b5e42b5311c815aa6f4a167c.1694514689.git.jani.nikula@intel.com
2023-09-29drm/i915/display: add I915 conditional build to intel_lpe_audio.hJani Nikula1-0/+18
Add stubs for !I915. Signed-off-by: Jani Nikula <[email protected]> Reviewed-by: Rodrigo Vivi <[email protected]> Acked-by: Dave Airlie <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/7c10d8c4a2a628cba17b3b0f89b657dfbc91eaa9.1694514689.git.jani.nikula@intel.com
2023-09-29drm/i915/display: add I915 conditional build to i9xx_plane.hJani Nikula1-0/+23
Add stubs for !I915. Signed-off-by: Jani Nikula <[email protected]> Reviewed-by: Rodrigo Vivi <[email protected]> Acked-by: Dave Airlie <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/4ad1864c66adcf691906c37b554f640d04069fb2.1694514689.git.jani.nikula@intel.com
2023-09-29drm/i915/display: add I915 conditional build to hsw_ips.hJani Nikula1-0/+35
Add stubs for !I915. Signed-off-by: Jani Nikula <[email protected]> Reviewed-by: Rodrigo Vivi <[email protected]> Acked-by: Dave Airlie <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/04469b92be51b8394d74a508174f041aa7e011e8.1694514689.git.jani.nikula@intel.com
2023-09-29drm/i915/display: add I915 conditional build to intel_lvds.hJani Nikula1-0/+19
Add stubs for !I915. Signed-off-by: Jani Nikula <[email protected]> Reviewed-by: Rodrigo Vivi <[email protected]> Acked-by: Dave Airlie <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/f06a88a69b7e326ff0914baca5e6a0e5f06e1867.1694514689.git.jani.nikula@intel.com
2023-09-29drm/i915: define I915 during i915 driver buildJani Nikula1-0/+4
The xe driver will reuse i915 display code by compiling it separately as part of xe. We'll want to be able to distinguish between building the i915 display code for i915 and xe. Define I915 when building i915. Cc: David Airlie <[email protected]> Cc: Daniel Vetter <[email protected]> Cc: Joonas Lahtinen <[email protected]> Cc: Rodrigo Vivi <[email protected]> Cc: Tvrtko Ursulin <[email protected]> Cc: Lucas De Marchi <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Reviewed-by: Rodrigo Vivi <[email protected]> Acked-by: Dave Airlie <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/97558201836115b91cbe32840239df855d0c2e4c.1694514689.git.jani.nikula@intel.com
2023-09-29drm/i915: Update DRIVER_DATE to 20230929Jani Nikula1-2/+2
Signed-off-by: Jani Nikula <[email protected]>
2023-09-29drm/i915: Warn on if set frontbuffer return value is not NULL on releaseJouni Högander1-2/+3
i915_gem_object_set_frontbuffer returns set frontbuffer pointer. When we are releasing frontbuffer we are clearing the pointer from the object. Warn on if return value is not null. v3: Check i915_gem_object_set_frontbuffer return value separately v2: Instead of ignoring do drm_WARN_ON Cc: Rodrigo Vivi <[email protected]> Cc: Jani Nikula <[email protected]> Signed-off-by: Jouni Högander <[email protected]> Reviewed-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-09-29drm/i915/mtl: Skip MCR ops for ring fault registerNirmoy Das3-2/+23
On MTL GEN12_RING_FAULT_REG is not replicated so don't do mcr based operation for this register. v2: use MEDIA_VER() instead of GRAPHICS_VER()(Matt). v3: s/"MEDIA_VER(i915) == 13"/"MEDIA_VER(i915) >= 13"(Matt) improve comment. v4: improve the comment further(Andi) Signed-off-by: Nirmoy Das <[email protected]> Reviewed-by: Matt Roper <[email protected]> Reviewed-by: Andi Shyti <[email protected]> Reviewed-by: Andrzej Hajda <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-09-29drm/i915: Clean steer semaphore on resumeNirmoy Das1-0/+10
During resume, the steer semaphore on GT1 was observed to be held. The hardware team has confirmed the safety of clearing steer semaphores for all GTs during driver load/resume, as no lock acquisitions can occur in this process by other agents. v2: reset on resume not in intel_gt_init(). v3: do the reset on intel_gt_resume_early() v4: do general sanitization for all GTs(Matt) Signed-off-by: Nirmoy Das <[email protected]> Reviewed-by: Andi Shyti <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-09-29drm/i915: Introduce the intel_gt_resume_early()Nirmoy Das3-4/+9
Move early resume functions of gt to a proper file. Signed-off-by: Nirmoy Das <[email protected]> Reviewed-by: Andi Shyti <[email protected]> Reviewed-by: Andrzej Hajda <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-09-29drm/i915: Introduce intel_gt_mcr_lock_sanitize()Nirmoy Das2-0/+23
Implement intel_gt_mcr_lock_sanitize() to provide a mechanism for cleaning the steer semaphore when absolutely necessary. v2: remove unnecessary lock(Andi, Matt) improve the kernel doc(Matt) s/intel_gt_mcr_lock_clear/intel_gt_mcr_lock_sanitize Signed-off-by: Nirmoy Das <[email protected]> Reviewed-by: Andi Shyti <[email protected]> Reviewed-by: Matt Roper <[email protected]> Reviewed-by: Andrzej Hajda <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-09-29Merge tag 'drm-misc-next-2023-09-27' of ↵Dave Airlie1-20/+3
git://anongit.freedesktop.org/drm/drm-misc into drm-next drm-misc-next for v6.7-rc1: UAPI Changes: - drm_file owner is now updated during use, in the case of a drm fd opened by the display server for a client, the correct owner is displayed. - Qaic gains support for the QAIC_DETACH_SLICE_BO ioctl to allow bo recycling. Cross-subsystem Changes: - Disable boot logo for au1200fb, mmpfb and unexport logo helpers. Only fbcon should manage display of logo. - Update freescale in MAINTAINERS. - Add some bridge files to bridge in MAINTAINERS. - Update gma500 driver repo in MAINTAINERS to point to drm-misc. Core Changes: - Move size computations to drm buddy allocator. - Make drm_atomic_helper_shutdown(NULL) a nop. - Assorted small fixes in drm_debugfs, DP-MST payload addition error handling. - Fix DRM_BRIDGE_ATTACH_NO_CONNECTOR handling. - Handle bad (h/v)sync_end in EDID by clipping to htotal. - Build GPUVM as a module. Driver Changes: - Simple drivers don't need to cache prepared result. - Call drm_atomic_helper_shutdown() in shutdown/unbind for a whole lot more drm drivers. - Assorted small fixes in amdgpu, ssd130x, bridge/it6621, accel/qaic, nouveau, tc358768. - Add NV12 for komeda writeback. - Add arbitration lost event to synopsis/dw-hdmi-cec. - Speed up s/r in nouveau by not restoring some big bo's. - Assorted nouveau display rework in preparation for GSP-RM, especially related to how the modeset sequence works and the DP sequence in relation to link training. - Update anx7816 panel. - Support NVSYNC and NHSYNC in tegra. - Allow multiple power domains in simple driver. Signed-off-by: Dave Airlie <[email protected]> From: Maarten Lankhorst <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-09-28vfio: use __aligned_u64 in struct vfio_device_gfx_plane_infoStefan Hajnoczi1-1/+1
The memory layout of struct vfio_device_gfx_plane_info is architecture-dependent due to a u64 field and a struct size that is not a multiple of 8 bytes: - On x86_64 the struct size is padded to a multiple of 8 bytes. - On x32 the struct size is only a multiple of 4 bytes, not 8. - Other architectures may vary. Use __aligned_u64 to make memory layout consistent. This reduces the chance of 32-bit userspace on a 64-bit kernel breakage. This patch increases the struct size on x32 but this is safe because of the struct's argsz field. The kernel may grow the struct as long as it still supports smaller argsz values from userspace (e.g. applications compiled against older kernel headers). Suggested-by: Jason Gunthorpe <[email protected]> Reviewed-by: Kevin Tian <[email protected]> Signed-off-by: Stefan Hajnoczi <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Alex Williamson <[email protected]>
2023-09-28drm/i915/fdi: Recompute state for affected CRTCs on FDI linksImre Deak3-0/+52
Recompute the state of all CRTCs on an FDI link during a modeset that may be affected by the modeset of other CRTCs on the same link. This ensures that each CRTC on the link maximizes its BW use (after another CRTC is disabled). In practice this means recomputing pipe B's config on IVB if pipe C gets disabled. v2: - Add the change recomputing affected CRTC states in a separate patch. (Ville) v3: (Ville) - Constify old and new crtc states. - Check for fused off pipe C. - Fix new vs. old crtc state mixup. - Drop check for pipe C's enabled state. Cc: Ville Syrjälä <[email protected]> Reviewed-by: Ville Syrjälä <[email protected]> Signed-off-by: Imre Deak <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-09-28drm/i915/fdi: Improve FDI BW sharing between pipe B and CImre Deak9-40/+140
At the moment modesetting pipe C on IVB will fail if pipe B uses 4 FDI lanes. Make the BW sharing more dynamic by trying to reduce pipe B's link bpp in this case, until pipe B uses only up to 2 FDI lanes. For this instead of the encoder compute config retry loop - which reduced link bpp only for the encoder's pipe - reduce the maximum link bpp for pipe B/C as required after all CRTC states are computed and recompute the CRTC states with the new bpp limit. Atm, all FDI encoder's compute config function returns an error if a BW constrain prevents increasing the pipe bpp value. The corresponding crtc_state->bw_constrained check can be replaced with checking crtc_state->max_link_bpp_x16, add TODO comments for this. SDVO is an exception where this case is only handled in the outer config retry loop, failing the modeset with a WARN, add a FIXME comment to handle this in the encoder code similarly to other encoders. v2: - Don't assume that a CRTC is already in the atomic state, while reducing its link bpp. - Add DocBook description to intel_fdi_atomic_check_link(). v3: - Enable BW management for FDI links in a separate patch. (Ville) v4: (Ville) - Fail the SDVO encoder config computation if it doesn't support the link bpp limit. - Add TODO: comments about checking link_bpp_x16 instead of bw_constrained. v5: - Replace link bpp limit check with a FIXME: comment in intel_sdvo_compute_config(). (Ville) Cc: Ville Syrjälä <[email protected]> Reviewed-by: Ville Syrjälä <[email protected]> [Amended commit message wrt. changes in v5] Signed-off-by: Imre Deak <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-09-28drm/i915: Add helpers for BW management on shared display linksImre Deak7-5/+311
At the moment a modeset fails if the config computation of a pipe can't fit its required BW to the available link BW even though the limitation may be resolved by reducing the BW requirement of other pipes. To improve the above this patch adds helper functions checking the overall BW limits after all CRTC states have been computed. If the check fails the maximum link bpp for a selected pipe will be reduced and all the CRTC states will be recomputed until either the overall BW limit check passes, or further bpp reduction is not possible (because all pipes/encoders sharing the link BW reached their minimum link bpp). Atm, the MST encoder allocates twice the required BW for YUV420 format streams. A follow-up patchset will fix that, add a code comment about this. This change prepares for upcoming patches enabling the above BW management on FDI and MST links. v2: - Rename intel_crtc_state::max_link_bpp to max_link_bpp_x16 and intel_link_bw_limits::max_bpp to max_bpp_x16. (Jani) v3: - Add the helper functions in a separate patch. (Ville) - Add the functions to intel_link_bw.c instead of intel_atomic.c (Ville) - Return -ENOSPC instead of -EINVAL to userspace in case of a link BW limit failure. v4: - Make intel_atomic_check_config() static. v5: (Ville) - Rename intel_link_bw_limits::min_bpp_pipes to min_bpp_reached_pipes and intel_link_bw_reset_pipe_limit_to_min() to intel_link_bw_set_min_bpp_for_pipe(). - Rename pipe_bpp to link_bpp in intel_link_bw_reduce_bpp(). - Add FIXME: comment about MST encoder's YUV420 BW allocation and tracking the link bpp limit accordingly. v6: - Move intel_link_bw_compute_pipe_bpp() to intel_fdi.c (Ville) - WARN_ON(BIT(pipe) & min_bpp_reached_pipes) in intel_link_bw_set_bpp_limit_for_pipe(). (Ville) - Rename intel_link_bw_set_min_bpp_for_pipe() to intel_link_bw_set_bpp_limit_for_pipe() and intel_link_bw_limits::min_bpp_reached_pipes to bpp_limit_reached_pipes. (Ville) - Remove unused header includes. Cc: Jani Nikula <[email protected]> Cc: Ville Syrjälä <[email protected]> Reviewed-by: Ville Syrjälä <[email protected]> Signed-off-by: Imre Deak <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-09-28drm/i915: Factor out a helper to check/compute all the CRTC statesImre Deak1-32/+46
Factor out intel_atomic_check_config() to check and compute all the CRTC states. This will be used by a follow up patch to recompute/check the state until required by BW limitations between CRTCs. Reviewed-by: Ville Syrjälä <[email protected]> Signed-off-by: Imre Deak <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-09-28drm/i915: Rename intel_modeset_all_pipes() to intel_modeset_all_pipes_late()Imre Deak4-7/+7
Rename intel_modeset_all_pipes() to intel_modeset_all_pipes_late() to clarify when the function can be called (vs. intel_modeset_pipes_in_mask_early()). Cc: Ville Syrjälä <[email protected]> Reviewed-by: Ville Syrjälä <[email protected]> Signed-off-by: Imre Deak <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-09-28drm/i915: Add helper to modeset a set of pipesImre Deak2-21/+83
Add intel_modeset_pipes_in_mask_early() to modeset a provided set of pipes, used in a follow-up patch. As opposed to intel_modeset_all_pipes() which modesets only the active pipes - others don't requiring programming the HW - modeset all enabled pipes in intel_modeset_pipes_in_mask_early() which may need to recompute their state even if they are not active (that is in the DPMS off state). While at it add DocBook descriptions for the two exported functions. v2: - Add a flag controlling if active planes are force updated as well. - Add DockBook descriptions. v3: - For clarity use _early/_late suffixes for the exported functions instead of the update_active_planes parameter. (Ville) v4: - In intel_modeset_pipes_in_mask_early() update only the crtc flags relevant to the early phase. (Ville) - Rename intel_modeset_all_pipes() in a separate patch. Cc: Ville Syrjälä <[email protected]> Reviewed-by: Ville Syrjälä <[email protected]> Signed-off-by: Imre Deak <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-09-28drm/i915/dp: Limit the output link bpp in DSC modeImre Deak3-0/+12
Limit the output link bpp in DSC mode to the link_config_limits link.min_bpp_x16 .. max_bpp_x16 range the same way it's done in non-DSC mode. Atm this doesn't make a difference, the link bpp range being 0 .. max pipe bpp, but a follow-up patch will need a way to reduce max link bpp below its current value. v2: - Add to_bpp_int_roundup() instead of open coding it. (Jani) Cc: Jani Nikula <[email protected]> Reviewed-by: Ville Syrjälä <[email protected]> Signed-off-by: Imre Deak <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-09-28drm/i915/dp: Update the link bpp limits for DSC modeImre Deak4-22/+108
In non-DSC mode the link bpp can be set in 2*3 bpp steps in the pipe bpp range, while in DSC mode it can be set in 1/16 bpp steps to any value up to the maximum pipe bpp. Update the limits accordingly in both modes to prepare for a follow-up patch which may need to reduce the max link bpp value and starts to check the link bpp limits in DSC mode as well. While at it add more detail to the link limit debug print and print it also for DSC mode. v2: - Add to_bpp_frac_dec() instead of open coding it. (Jani) v3: (Ville) - Add BPP_X16_FMT / BPP_X16_ARG. - Add TODO: comment about initializing the DSC link bpp limits earlier. Cc: Jani Nikula <[email protected]> Cc: Ville Syrjälä <[email protected]> Reviewed-by: Ville Syrjälä <[email protected]> Signed-off-by: Imre Deak <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-09-28drm/i915/dp: Skip computing a non-DSC link config if DSC is neededImre Deak2-14/+33
Computing the non-DSC mode link config is redundant once it's determined that DSC will be needed, so skip computing it. In a follow-up patch this simplifies setting the link limits which are dependent on the DSC vs. non-DSC mode. While at it sanitize the debug print about the MST DSC fallback path, making it similar to the SST DSC one. Reviewed-by: Ville Syrjälä <[email protected]> Signed-off-by: Imre Deak <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-09-28drm/i915/dp: Track the pipe and link bpp limits separatelyImre Deak4-18/+45
A follow-up patch will need to limit the output link bpp both in the non-DSC and DSC configuration, so track the pipe and link bpp limits separately in the link_config_limits struct. Use .4 fixed point format for link bpp matching the 1/16 bpp granularity in DSC mode and for now keep this limit matching the pipe bpp limit. v2: (Jani) - Add to_bpp_int(), to_bpp_x16() helpers instead of opencoding them. - Rename link_config_limits::link.min/max_bpp to min/max_bpp_x16. Cc: Jani Nikula <[email protected]> Reviewed-by: Luca Coelho <[email protected]> Reviewed-by: Ville Syrjälä <[email protected]> Signed-off-by: Imre Deak <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-09-28drm/i915/dp: Factor out helpers to compute the link limitsImre Deak2-45/+68
Factor out helpers that DP / DP_MST encoders can use to compute the link rate/lane count and bpp limits. A follow-up patch will call these to recalculate the limits if DSC compression is required. Reviewed-by: Ville Syrjälä <[email protected]> Signed-off-by: Imre Deak <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-09-28drm/i915: Don't set PIPE_CONTROL_FLUSH_L3 for aux invalNirmoy Das1-1/+10
PIPE_CONTROL_FLUSH_L3 is not needed for aux invalidation so don't set that. Fixes: ad8ebf12217e ("drm/i915/gt: Ensure memory quiesced before invalidation") Cc: Jonathan Cavitt <[email protected]> Cc: Andi Shyti <[email protected]> Cc: <[email protected]> # v5.8+ Cc: Andrzej Hajda <[email protected]> Cc: Tvrtko Ursulin <[email protected]> Cc: Matt Roper <[email protected]> Cc: Tejas Upadhyay <[email protected]> Cc: Lucas De Marchi <[email protected]> Cc: Prathap Kumar Valsan <[email protected]> Cc: Tapani Pälli <[email protected]> Cc: Mark Janes <[email protected]> Cc: Rodrigo Vivi <[email protected]> Signed-off-by: Nirmoy Das <[email protected]> Acked-by: Matt Roper <[email protected]> Reviewed-by: Andi Shyti <[email protected]> Tested-by: Tapani Pälli <[email protected]> Reviewed-by: Andrzej Hajda <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-09-27drm/i915/dsb: Use DEwake to combat PkgC latencyVille Syrjälä3-14/+82
Normally we could be in a deep PkgC state all the way up to the point when DSB starts its execution at the transcoders undelayed vblank. The DSB will then have to wait for the hardware to wake up before it can execute anything. This will waste a huge chunk of the vblank time just waiting, and risks the DSB execution spilling into the vertical active period. That will be very bad, especially when programming the LUTs as the anti-collision logic will cause DSB to corrupt LUT writes during vertical active. To avoid these problems we can instruct the DSB to pre-wake the display engine on a specific scanline so that everything will be 100% ready to go when we hit the transcoder's undelayed vblank. One annoyance is that the scanline is specified as just that, a single scanline. So if we happen to start the DSB execution after passing said scanline no DEwake will happen and we may drop back into some PkgC state before reaching the transcoder's undelayed vblank. To prevent that we'll use the "force DEwake" bit to manually force the display engine to stay awake. We'll then have to clear the force bit again after the DSB is done (the force bit remains effective even when the DSB is otherwise disabled). Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Uma Shankar <[email protected]>
2023-09-27drm/i915: Introduce intel_crtc_scanline_to_hw()Ville Syrjälä2-0/+15
Add a helper to convert our idea of a scanline to the hw's idea of the same scanline (ie. apply crtc->scanline_offset in reverse). We'll need this to tell the DSB do stuff on a specific scanline. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Uma Shankar <[email protected]>
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