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2020-10-07drm/i915/dg1: Increase mmio size to 4MBVenkata Sandeep Dhanalakota1-0/+4
On DGFX the register range has been extended to go up to 8MB. However we only actually use up to address 280000h, so let's increase it to 4MB. v2 (Lucas): add bspec reference and reword commit message to explain the 4 vs 8 MB used (requested by Matt Roper) Bspec: 53616 Cc: Daniele Ceraolo Spurio <[email protected]> Cc: Michael J. Ruhl <[email protected]> Signed-off-by: Venkata Sandeep Dhanalakota <[email protected]> Signed-off-by: Lucas De Marchi <[email protected]> Reviewed-by: Matt Roper <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-10-07drm/i915/dg1: Define MOCS table for DG1Lucas De Marchi1-2/+39
DG1 has a new MOCS table. We still use the old definition of the table, but as for any dgfx card it doesn't contain the control_value values (these values don't matter as we won't program them). Bspec: 45101 v2: Reword the comment to state that the last few entries are reserved instead of "the last two". DG1 reserves four instead of two from previous platforms (from Matt Roper) Cc: Daniele Ceraolo Spurio <[email protected]> Cc: Rodrigo Vivi <[email protected]> Signed-off-by: Lucas De Marchi <[email protected]> Reviewed-by: Matt Roper <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-10-07drm/i915/dg1: Initialize RAWCLK properlyMatt Roper1-1/+15
DG1 always uses a 38.4 MHz rawclk rather than the 19.2/24 MHz frequencies on CNP+. Note that register bits associated with this frequency confusingly use 37 for the divider field rather than 38 as you might expect. For simplicity, let's just assume that this 38.4 MHz frequency will hold true for other future platforms with "fake" PCH south displays and that the CNP-style behavior will remain for other platforms with a real PCH. Bspec: 49950 Bspec: 49309 Cc: Aditya Swarup <[email protected]> Cc: Clinton Taylor <[email protected]> Cc: Lucas De Marchi <[email protected]> Signed-off-by: Matt Roper <[email protected]> Signed-off-by: Lucas De Marchi <[email protected]> Reviewed-by: José Roberto de Souza <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-10-07drm/i915/display/ehl: Limit eDP to HBR2José Roberto de Souza2-8/+12
Recent update in documentation defeatured eDP HBR3 for EHL and JSL. v2: - Remove dead code in ehl_get_combo_buf_trans() v3: - Rebase BSpec: 32247 Cc: Matt Roper <[email protected]> Cc: Vidya Srinivas <[email protected]> Reviewed-by: Matt Roper <[email protected]> Signed-off-by: José Roberto de Souza <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-10-06drm/i915/tgl: Fix Combo PHY DPLL fractional divider for 38.4MHz ref clockImre Deak1-16/+25
Apply Display WA #22010492432 for combo PHY PLLs too. This should fix a problem where the PLL output frequency is slightly off with the current PLL fractional divider value. I haven't seen an actual case where this causes a problem, but let's follow the spec. It's also needed on some EHL platforms, but for that we also need a way to distinguish the affected EHL SKUs, so I leave that for a follow-up. v2: - Apply the WA at one place when calculating the PLL dividers from the frequency and the frequency from the dividers for all the combo PLL use cases (DP, HDMI, TBT). (Ville) Cc: Ville Syrjälä <[email protected]> Reviewed-by: Ville Syrjälä <[email protected]> Signed-off-by: Imre Deak <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-10-06drm/i915: Add an encoder hook to sanitize its state during init/resumeImre Deak5-0/+47
Atm, if a full modeset is performed during the initial modeset the link training will happen with uninitialized max DP rate and lane count. Make sure the corresponding encoder state is initialized by adding an encoder hook called during driver init and system resume. A better alternative would be to store all states in the CRTC state and make this state available for the link re-training code. Also instead of the DPCD read in the hook there should be really a proper sink HW readout in place. Both of these require a bigger rework, so for now opting for this minimal fix to make at least full initial modesets work. The patch is based on https://patchwork.freedesktop.org/patch/101473/?series=10354&rev=3 v2: (Ville) - s/sanitize_state/sync_state/ - No point in calling the hook when CRTC is disabled, remove the call. - No point in calling the hook for MST, remove it. v3: Check only DPCD_REV to avoid clobbering intel_dp->dpcd. (Ville) Cc: Ville Syrjälä <[email protected]> Reviewed-by: Ville Syrjälä <[email protected]> Signed-off-by: Imre Deak <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-10-06drm/i915: Check for unsupported DP link rates during initial commitImre Deak1-0/+12
Some BIOSes set an unsupported/imprecise DP link rate (for instance on TGL A stepping). Make sure that we do an encoder recompute and a modeset in this case. Cc: Ville Syrjälä <[email protected]> Reviewed-by: Ville Syrjälä <[email protected]> Signed-off-by: Imre Deak <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-10-06drm/i915: Move the initial fastset commit check to encoder hooksImre Deak7-16/+78
Move the checks to decide whether a fastset is possible during the initial commit to an encoder hook. This check is really encoder specific and the next patch will also require this adding a DP encoder specific check. v2: Fix negated condition in gen11_dsi_initial_fastset_check(). v3: Make sure to call the hook for all encoders on the crtc. (Ville) Cc: Ville Syrjälä <[email protected]> Reviewed-by: Ville Syrjälä <[email protected]> Signed-off-by: Imre Deak <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-10-06drm/i915/skl: Work around incorrect BIOS WRPLL PDIV programmingImre Deak2-0/+14
The BIOS of at least one ASUS-Z170M system with an SKL I have programs the 101b WRPLL PDIV divider value, which is the encoding for PDIV=7 with bit#0 incorrectly set. This happens with the "3840x2160": 30 262750 3840 3888 3920 4000 2160 2163 2168 2191 0x48 0x9 HDMI mode (scaled from a 1024x768 src fb) set by BIOS and the ref_clock=24000, dco_integer=383, dco_fraction=5802, pdiv=7, qdiv=1, kdiv=1 WRPLL parameters (assuming PDIV=7 was the intended setting). This corresponds to 262749 PLL frequency/port clock. Later the driver sets the same mode for which it calculates the same dco_int/dco_frac/div WRPLL parameters (with the correct PDIV=7 encoding). Based on the above, let's assume that PDIV=7 was intended and the HW just ignores bit#0 in the PDIV register field for this setting, treating 100b and 101b encodings the same way. While at it add the MISSING_CASE() for the p0,p2 divider decodings. v2: (Ville) - Add a define for the incorrect divider value. - Emit only a debug message when detecting the incorrect divider value. - Use fallthrough from the incorrect divider value case. - Add the MISSING_CASE()s. v3: Return 0 freq for incorrect divider values. (Ville) Cc: Ville Syrjälä <[email protected]> Reviewed-by: Ville Syrjälä <[email protected]> Signed-off-by: Imre Deak <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-10-05lib/scatterlist: Add support in dynamic allocation of SG table from pagesMaor Gottlieb1-6/+6
Extend __sg_alloc_table_from_pages to support dynamic allocation of SG table from pages. It should be used by drivers that can't supply all the pages at one time. This function returns the last populated SGE in the table. Users should pass it as an argument to the function from the second call and forward. As before, nents will be equal to the number of populated SGEs (chunks). With this new extension, drivers can benefit the optimization of merging contiguous pages without a need to allocate all pages in advance and hold them in a large buffer. E.g. with the Infiniband driver that allocates a single page for hold the pages. For 1TB memory registration, the temporary buffer would consume only 4KB, instead of 2GB. Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Maor Gottlieb <[email protected]> Reviewed-by: Christoph Hellwig <[email protected]> Signed-off-by: Leon Romanovsky <[email protected]> Signed-off-by: Jason Gunthorpe <[email protected]>
2020-10-05drm/i915/dg1: Wait for pcode/uncore handshake at startupMatt Roper4-0/+23
DG1 does some additional pcode/uncore handshaking at boot time; this handshaking must complete before various other pcode commands are effective and before general work is submitted to the GPU. We need to poll a new pcode mailbox during startup until it reports that this handshaking is complete. The bspec doesn't give guidance on how long we may need to wait for this handshaking to complete. For now, let's just set a really long timeout; if we still don't get a completion status by the end of that timeout, we'll just continue on and hope for the best. v2 (Lucas): Rename macros to make clear the relation between command and result (requested by José) Bspec: 52065 Cc: Clinton Taylor <[email protected]> Cc: Ville Syrjälä <[email protected]> Cc: Radhakrishna Sripada <[email protected]> Signed-off-by: Matt Roper <[email protected]> Signed-off-by: Lucas De Marchi <[email protected]> Reviewed-by: José Roberto de Souza <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-10-05drm/i915: don't conflate is_dgfx with fake lmemLucas De Marchi2-3/+1
When using fake lmem for tests, we are overriding the setting in device info for dgfx devices. Current users of IS_DGFX() except one are correct. However, as we add support for DG1, we are going to use it in additional places to trigger dgfx-only code path. In future if we need we can use HAS_LMEM() instead of IS_DGFX() in the places that make sense to also contemplate fake lmem use. v2: update gen8_gmch_probe() to use HAS_LMEM(): we need to steal the mappable aperture later(which is fine since it doesn't exist on "DGFX"), and use it as a substitute for LMEMBAR. The !mappable aperture property is also useful since it exercises some other parts of the code too. (Matthew Auld) Signed-off-by: Lucas De Marchi <[email protected]> Reviewed-by: Matthew Auld <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-10-02drm/i915: Make lspcon_init() staticVille Syrjälä1-1/+1
Make lspcon_init() static since it's no longer needed outside the compilation unit. This was correct in Kai-Heng's lspcon patch, but I fumbled this when applying it. Cc: Kai-Heng Feng <[email protected]> Reported-by: kernel test robot <[email protected]> Fixes: f542d671ffce ("drm/i915: Init lspcon after HPD in intel_dp_detect()") Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Chris Wilson <[email protected]>
2020-10-01drm/i915: Init lspcon after HPD in intel_dp_detect()Kai-Heng Feng5-54/+41
On HP 800 G4 DM, if HDMI cable isn't plugged before boot, the HDMI port becomes useless and never responds to cable hotplugging: [ 3.031904] [drm:lspcon_init [i915]] *ERROR* Failed to probe lspcon [ 3.031945] [drm:intel_ddi_init [i915]] *ERROR* LSPCON init failed on port D Seems like the lspcon chip on the system only gets powered after the cable is plugged. Consilidate lspcon_init() into lspcon_resume() to dynamically init lspcon chip, and make HDMI port work. v6: - Rebase on latest for-linux-next. v5: - Consolidate lspcon_resume() with lspcon_init(). - Move more logic into lspcon code. v4: - Trust VBT in intel_infoframe_init(). - Init lspcon in intel_dp_detect(). v3: - Make sure it's handled under long HPD case. v2: - Move lspcon_init() inside of intel_dp_hpd_pulse(). Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/203 Signed-off-by: Kai-Heng Feng <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-10-01drm/i915: Eliminate intel_dp.regs.dp_tp_{ctl,status}Ville Syrjälä5-70/+76
Now that we've plumbed the crtc state all the way down we can eliminate the DP_TP_{CTL,STATUS} register offsets from intel_dp, and instead we derive them directly from the crtc state. And thus we can get rid of the nasty hack in intel_ddi_get_config() which mutates intel_dp during the readout. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Imre Deak <[email protected]>
2020-10-01drm/i915: Plumb crtc_state to link trainingVille Syrjälä10-325/+386
Get rid of mode crtc->config usage, and some ad-hoc intel_dp state usage by plumbing the crtc state all the way down to the link training code. Unfortunately we do have to keep some cached state in intel_dp so that we can do the "does the link need retraining?" checks from the short hpd handler. v2: Add intel_crtc_state forward declaration v3: Don't kill the PHY test code totally since it's now in the hotplug work where we can get at the states v4: Don't resurrect the debug scrambling disable bit (Imre) Use intel_dp_mst_is_master_trans() (Imre) Reviewed-by: Imre Deak <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-10-01drm/i915: Split TGL DKL PHY buf trans per output typeVille Syrjälä1-8/+23
Make the mess inside the buf trans funcs a bit more manageable by splitting along the lines of output type. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Imre Deak <[email protected]>
2020-10-01drm/i915: Split TGL combo PHY buf trans per output typeVille Syrjälä1-34/+49
Make the mess inside the buf trans funcs a bit more manageable by splitting along the lines of output type. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Imre Deak <[email protected]>
2020-10-01drm/i915: Split EHL combo PHY buf trans per output typeVille Syrjälä1-20/+39
Make the mess inside the buf trans funcs a bit more manageable by splitting along the lines of output type. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Imre Deak <[email protected]>
2020-10-01drm/i915: Split ICL MG PHY buf trans per output typeVille Syrjälä1-8/+23
Make the mess inside the buf trans funcs a bit more manageable by splitting along the lines of output type. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Imre Deak <[email protected]>
2020-10-01drm/i915: Split ICL combo PHY buf trans per output typeVille Syrjälä1-9/+33
Make the mess inside the buf trans funcs a bit more manageable by splitting along the lines of output type. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Imre Deak <[email protected]>
2020-10-01drm/i915: Shove the PHY test into the hotplug workVille Syrjälä1-26/+128
Doing any kind modeset stuff from the short hpd handler is verboten. The ad-hoc PHY test modeset code violates this. And by calling various link training related functions it's now blocking further work to plumb the crtc state down into the link training code. Let's hack around that by pushing the PHY test stuff into the hotplug work where it's less of a problem. Still not great but at least acceptable. We take a few pages from the link retraining handbook to handle the locking and whatnot. v2: Fix the intel_dp_hotplug() return value Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Imre Deak <[email protected]>
2020-10-01drm/i915: Make intel_dp_process_phy_request() staticVille Syrjälä2-2/+1
intel_dp_process_phy_request() has no business being externally visible. Make it static. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Imre Deak <[email protected]>
2020-10-01drm/i915: s/old_crtc_state/crtc_state/Ville Syrjälä1-2/+2
intel_dp_enable_port() is called during the enable sequence, so there is nothing old about the passed in crtc state. Rename it. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Imre Deak <[email protected]>
2020-10-01drm/i915: s/pre_empemph/preemph/Ville Syrjälä1-4/+4
I managed to fumble some functions names. Fix them. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Imre Deak <[email protected]>
2020-10-01drm/i915: Fix TGL DKL PHY DP vswing handlingVille Syrjälä1-1/+1
The HDMI vs. not-HDMI check got inverted whem the bogus encoder->type checks were eliminated. So now we're using 0 as the link rate on DP and potentially non-zero on HDMI, which is exactly the opposite of what we want. The original bogus check actually worked more correctly by accident since if would always evaluate to true. Due to this we now always use the RBR/HBR1 vswing table and never ever the HBR2+ vswing table. That is probably not a good way to get a high quality signal at HBR2+ rates. Fix the check so we pick the right table. Cc: [email protected] Cc: Vandita Kulkarni <[email protected]> Cc: Uma Shankar <[email protected]> Fixes: 94641eb6c696 ("drm/i915/display: Fix the encoder type check") Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: José Roberto de Souza <[email protected]> Reviewed-by: Vandita Kulkarni <[email protected]>
2020-10-01drm/i915: Implement display WA #1142:kbl,cfl,cmlVille Syrjälä2-0/+12
Implement display w/a #1142. This supposedly fixes some underruns with FBC+VTd. Bspec says we should use the same programming regardless of circumstances. Apparently we should flip the magic bits before turning on any planes so let's put this into the early w/as. Cc: Lee Shawn C <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: José Roberto de Souza <[email protected]>
2020-09-30drm/i915: Read DIMM size in Gb rather than GBVille Syrjälä1-11/+12
CNL+ can report DIMM sizes in .5 GB units. In order to not trauncate away the .5 GB let's switch to storing the DIMM size in Gb units. Cc: Swati Sharma <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Reviewed-by: José Roberto de Souza <[email protected]> Signed-off-by: José Roberto de Souza <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-09-30drm/i915: Avoid mixing integer types during batch copiesChris Wilson3-9/+12
Be consistent and use unsigned long throughout the chunk copies to avoid the inherent clumsiness of mixing integer types of different widths and signs. Failing to take acount of a wider unsigned type when using min_t can lead to treating it as a negative, only for it flip back to a large unsigned value after passing a boundary check. Fixes: ed13033f0287 ("drm/i915/cmdparser: Only cache the dst vmap") Testcase: igt/gen9_exec_parse/bb-large Reported-by: "Candelaria, Jared" <[email protected]> Signed-off-by: Chris Wilson <[email protected]> Cc: Mika Kuoppala <[email protected]> Cc: Joonas Lahtinen <[email protected]> Cc: "Candelaria, Jared" <[email protected]> Cc: "Bloomfield, Jon" <[email protected]> Cc: <[email protected]> # v4.9+ Reviewed-by: Mika Kuoppala <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] (cherry picked from commit b7eeb2b4132ccf1a7d38f434cde7043913d1ed3c) Signed-off-by: Rodrigo Vivi <[email protected]>
2020-09-30drm/i915/gem: Always test execution status on closing the contextChris Wilson1-38/+10
Verify that if a context is active at the time it is closed, that it is either persistent and preemptible (with hangcheck running) or it shall be removed from execution. Fixes: 9a40bddd47ca ("drm/i915/gt: Expose heartbeat interval via sysfs") Testcase: igt/gem_ctx_persistence/heartbeat-close Signed-off-by: Chris Wilson <[email protected]> Cc: Joonas Lahtinen <[email protected]> Cc: <[email protected]> # v5.7+ Reviewed-by: Tvrtko Ursulin <[email protected]> Acked-by: Joonas Lahtinen <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] (cherry picked from commit d3bb2f9b5ee66d5e000293edd6b6575e59d11db9) Signed-off-by: Rodrigo Vivi <[email protected]>
2020-09-30drm/i915/gt: Always send a pulse down the engine after disabling heartbeatChris Wilson1-39/+67
Currently, we check we can send a pulse prior to disabling the heartbeat to verify that we can change the heartbeat, but since we may re-evaluate execution upon changing the heartbeat interval we need another pulse afterwards to refresh execution. v2: Tvrtko asked if we could reduce the double pulse to a single, which opened up a discussion of how we should handle the pulse-error after attempting to change the property, and the desire to serialise adjustment of the property with its validating pulse, and unwind upon failure. Fixes: 9a40bddd47ca ("drm/i915/gt: Expose heartbeat interval via sysfs") Signed-off-by: Chris Wilson <[email protected]> Cc: Joonas Lahtinen <[email protected]> Cc: Tvrtko Ursulin <[email protected]> Cc: <[email protected]> # v5.7+ Reviewed-by: Tvrtko Ursulin <[email protected]> Acked-by: Joonas Lahtinen <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] (cherry picked from commit 3dd66a94de59d7792e7917eb3075342e70f06f44) Signed-off-by: Rodrigo Vivi <[email protected]>
2020-09-30drm/i915: Cancel outstanding work after disabling heartbeats on an engineChris Wilson2-0/+14
We only allow persistent requests to remain on the GPU past the closure of their containing context (and process) so long as they are continuously checked for hangs or allow other requests to preempt them, as we need to ensure forward progress of the system. If we allow persistent contexts to remain on the system after the the hangcheck mechanism is disabled, the system may grind to a halt. On disabling the mechanism, we sent a pulse along the engine to remove all executing contexts from the engine which would check for hung contexts -- but we did not prevent those contexts from being resubmitted if they survived the final hangcheck. Fixes: 9a40bddd47ca ("drm/i915/gt: Expose heartbeat interval via sysfs") Testcase: igt/gem_ctx_persistence/heartbeat-stop Signed-off-by: Chris Wilson <[email protected]> Cc: Joonas Lahtinen <[email protected]> Cc: <[email protected]> # v5.7+ Reviewed-by: Tvrtko Ursulin <[email protected]> Acked-by: Joonas Lahtinen <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] (cherry picked from commit 7a991cd3e3da9a56d5616b62d425db000a3242f2) Signed-off-by: Rodrigo Vivi <[email protected]>
2020-09-30drm/i915/gem: Hold request reference for canceling an active contextChris Wilson1-6/+19
We have to be very careful while walking the timeline->requests list under the RCU guard, as the requests (and so rq->link) use SLAB_TYPESAFE_BY_RCU and so the requests may be reallocated within an rcu grace period. As the requests are reallocated, they are removed from one list and placed on another, and if we are iterating over that request at that moment, the list iteration jumps from one list to the next and promptly gets confused. Verify we hold the request reference to ensure that the request is not added to a new list behind our backs. <4> [582.745252] general protection fault, probably for non-canonical address 0xcccccccccccccd5c: 0000 [#1] PREEMPT SMP PTI <4> [582.745297] CPU: 0 PID: 1475 Comm: gem_ctx_persist Not tainted 5.9.0-rc1-CI-CI_DRM_8908+ #1 <4> [582.745304] Hardware name: Intel Corporation NUC7CJYH/NUC7JYB, BIOS JYGLKCPX.86A.0027.2018.0125.1347 01/25/2018 <4> [582.745317] RIP: 0010:__lock_acquire+0x2c3/0x1f40 <4> [582.745323] Code: 00 65 8b 05 c7 8a ef 7e 85 c0 0f 85 b4 07 00 00 44 8b 9d c4 08 00 00 45 85 db 0f 84 0f 01 00 00 ba 05 00 00 00 e9 c8 06 00 00 <48> 81 3f c0 89 c7 82 b8 00 00 00 00 41 0f 45 c0 83 fe 01 41 89 c3 <4> [582.745334] RSP: 0018:ffffc9000461bc40 EFLAGS: 00010002 <4> [582.745340] RAX: 0000000000000000 RBX: 0000000000000001 RCX: 0000000000000000 <4> [582.745345] RDX: 0000000000000000 RSI: 0000000000000000 RDI: cccccccccccccd5c <4> [582.745350] RBP: ffff8881ec4a2880 R08: 0000000000000001 R09: 0000000000000001 <4> [582.745356] R10: 0000000000000001 R11: 0000000000000001 R12: 0000000000000000 <4> [582.745361] R13: 0000000000000000 R14: 0000000000000000 R15: cccccccccccccd5c <4> [582.745367] FS: 00007fb44da78e40(0000) GS:ffff888278000000(0000) knlGS:0000000000000000 <4> [582.745373] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 <4> [582.745378] CR2: 00007fb44daad040 CR3: 0000000268428000 CR4: 0000000000350ef0 <4> [582.745383] Call Trace: <4> [582.745390] ? __lock_acquire+0x913/0x1f40 <4> [582.745397] lock_acquire+0xb5/0x3c0 <4> [582.745526] ? kill_engines+0x19a/0x4b0 [i915] <4> [582.745533] ? find_held_lock+0x2d/0x90 <4> [582.745541] _raw_spin_lock_irq+0x30/0x40 <4> [582.745635] ? kill_engines+0x19a/0x4b0 [i915] <4> [582.745727] kill_engines+0x19a/0x4b0 [i915] <4> [582.745820] context_close+0x195/0x410 [i915] <4> [582.745912] i915_gem_context_close+0x5b/0x160 [i915] <4> [582.745994] i915_driver_postclose+0x14/0x40 [i915] <4> [582.746003] drm_file_free.part.13+0x240/0x290 <4> [582.746009] drm_release_noglobal+0x16/0x50 <4> [582.746016] __fput+0xa5/0x250 <4> [582.746021] task_work_run+0x6e/0xb0 <4> [582.746028] exit_to_user_mode_prepare+0x178/0x180 <4> [582.746034] syscall_exit_to_user_mode+0x36/0x220 <4> [582.746040] entry_SYSCALL_64_after_hwframe+0x44/0xa9 <4> [582.746045] RIP: 0033:0x7fb44d1dc421 <4> [582.746050] Code: f7 d8 64 89 02 48 c7 c0 ff ff ff ff c3 66 2e 0f 1f 84 00 00 00 00 00 66 90 8b 05 ea cf 20 00 85 c0 75 16 b8 03 00 00 00 0f 05 <48> 3d 00 f0 ff ff 77 3f f3 c3 0f 1f 44 00 00 53 89 fb 48 83 ec 10 <4> [582.746062] RSP: 002b:00007ffed2e83818 EFLAGS: 00000246 ORIG_RAX: 0000000000000003 <4> [582.746069] RAX: 0000000000000000 RBX: 0000556410bfe840 RCX: 00007fb44d1dc421 <4> [582.746075] RDX: 000000000000000a RSI: 00000000c0406469 RDI: 0000000000000008 <4> [582.746080] RBP: 0000000000000008 R08: 00007fb44d1c51cc R09: 00007fb44d1c5240 <4> [582.746086] R10: 0000000000000001 R11: 0000000000000246 R12: 00000000fffffffb <4> [582.746091] R13: 0000000000000006 R14: 0000000000000000 R15: 000000000000000a <4> [582.746099] Modules linked in: vgem mei_hdcp snd_hda_codec_hdmi snd_hda_codec_realtek snd_hda_codec_generic ledtrig_audio btusb btrtl btbcm btintel x86_pkg_temp_thermal coretemp crct10dif_pclmul crc32_pclmul bluetooth ghash_clmulni_intel ecdh_generic ecc i915 r8169 realtek mei_me mei snd_hda_intel i2c_hid snd_intel_dspcfg snd_hda_codec snd_hwdep snd_hda_core snd_pcm pinctrl_geminilake pinctrl_intel prime_numbers [last unloaded: test_drm_mm] Fixes: 736e785f9b28 ("drm/i915/gem: Reduce context termination list iteration guard to RCU") Signed-off-by: Chris Wilson <[email protected]> Reviewed-by: Tvrtko Ursulin <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] (cherry picked from commit badef44deff1fae8d21c5c1cfc4dde95fb5bf993) Signed-off-by: Rodrigo Vivi <[email protected]>
2020-09-30drm/i915: Redo "Remove i915_request.lock requirement for execution callbacks"Chris Wilson1-10/+2
The reordering and rebasing of commit 2e4c6c1a9db5 ("drm/i915: Remove i915_request.lock requirement for execution callbacks") caused it to revert an earlier correction. Let us restore commit 99f0a640d464 ("drm/i915: Remove requirement for holding i915_request.lock for breadcrumbs") Fixes: 2e4c6c1a9db5 ("drm/i915: Remove i915_request.lock requirement for execution callbacks") Signed-off-by: Chris Wilson <[email protected]> Cc: Tvrtko Ursulin <[email protected]> Cc: Rodrigo Vivi <[email protected]> Cc: Joonas Lahtinen <[email protected]> Reviewed-by: Tvrtko Ursulin <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] (cherry picked from commit 35faeb7de9ef83da510a048f2016061f1e31d5fc) Signed-off-by: Rodrigo Vivi <[email protected]>
2020-09-30drm/i915/gem: Serialise debugfs i915_gem_objects with ctx->mutexChris Wilson1-0/+2
Since the debugfs may peek into the GEM contexts as the corresponding client/fd is being closed, we may try and follow a dangling pointer. However, the context closure itself is serialised with the ctx->mutex, so if we hold that mutex as we inspect the state coupled in the context, we know the pointers within the context are stable and will remain valid as we inspect their tables. Signed-off-by: Chris Wilson <[email protected]> Cc: CQ Tang <[email protected]> Cc: Daniel Vetter <[email protected]> Cc: [email protected] Reviewed-by: Tvrtko Ursulin <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] (cherry picked from commit 102f5aa491f262c818e607fc4fee08a724a76c69) Signed-off-by: Rodrigo Vivi <[email protected]>
2020-09-30drm/i915: check i915_vm_alloc_pt_stash for errorsMatthew Auld1-3/+5
If we are really unlucky and encounter an error during i915_vm_alloc_pt_stash, we end up passing an empty pt/pd stash all the way down into the low-level ppgtt alloc code, leading to explosions, since it expects at least the required number of pt/pd for the va range. [ 211.981418] BUG: kernel NULL pointer dereference, address: 0000000000000000 [ 211.981421] #PF: supervisor read access in kernel mode [ 211.981422] #PF: error_code(0x0000) - not-present page [ 211.981424] PGD 80000008439cb067 P4D 80000008439cb067 PUD 84a37f067 PMD 0 [ 211.981427] Oops: 0000 [#1] SMP PTI [ 211.981428] CPU: 1 PID: 1301 Comm: i915_selftest Tainted: G U I 5.9.0-rc5+ #3 [ 211.981430] Hardware name: /NUC6i7KYB, BIOS KYSKLi70.86A.0050.2017.0831.1924 08/31/2017 [ 211.981521] RIP: 0010:__gen8_ppgtt_alloc+0x1ed/0x3c0 [i915] [ 211.981523] Code: c1 48 c7 c7 5d 5d fe c0 65 ff 0d ee 1d 03 3f e8 d9 91 1f e2 8b 55 c4 31 c0 48 8b 75 b8 85 d2 0f 95 c0 48 8b 1c c6 48 89 45 98 <48> 8b 03 48 8b 90 58 02 00 00 48 85 d2 0f 84 07 ea 15 00 48 81 fa [ 211.981526] RSP: 0018:ffffba2cc0eb3970 EFLAGS: 00010202 [ 211.981527] RAX: 0000000000000001 RBX: 0000000000000000 RCX: 0000000000000004 [ 211.981529] RDX: 0000000000000002 RSI: ffff9be998bdb8c0 RDI: ffff9be99c844300 [ 211.981530] RBP: ffffba2cc0eb39d8 R08: 0000000000000640 R09: ffff9be97cdfd000 [ 211.981531] R10: ffff9be97cdfd614 R11: 0000000000000000 R12: 0000000000000000 [ 211.981532] R13: ffff9be98607ba20 R14: ffff9be995a0b400 R15: ffffba2cc0eb39e8 [ 211.981534] FS: 00007f0f10b31000(0000) GS:ffff9be99fc40000(0000) knlGS:0000000000000000 [ 211.981536] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 [ 211.981538] CR2: 0000000000000000 CR3: 000000084d74e006 CR4: 00000000003706e0 [ 211.981539] DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000 [ 211.981541] DR3: 0000000000000000 DR6: 00000000fffe0ff0 DR7: 0000000000000400 [ 211.981542] Call Trace: [ 211.981609] gen8_ppgtt_alloc+0x79/0x90 [i915] [ 211.981678] ppgtt_bind_vma+0x36/0x80 [i915] [ 211.981756] __vma_bind+0x39/0x40 [i915] [ 211.981818] fence_work+0x21/0x98 [i915] [ 211.981879] fence_notify+0x8d/0x128 [i915] [ 211.981939] __i915_sw_fence_complete+0x62/0x240 [i915] [ 211.982018] i915_vma_pin_ww+0x1ee/0x9c0 [i915] Fixes: cd0452aa2a0d ("drm/i915: Preallocate stashes for vma page-directories") Signed-off-by: Matthew Auld <[email protected]> Cc: Chris Wilson <[email protected]> Reviewed-by: Chris Wilson <[email protected]> Signed-off-by: Chris Wilson <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] (cherry picked from commit 1604cb2aa7fafd83e11f9257f765a5f5dd7c19d3) Signed-off-by: Rodrigo Vivi <[email protected]>
2020-09-30drm/i915: Fix uninitialised variable in intel_context_create_request.Maarten Lankhorst1-0/+1
In case backoff fails with an error, we return an undefined rq, assign err to rq correctly. Fixes: 8a929c9eb1c2 ("drm/i915: Use ww pinning for intel_context_create_request()") Signed-off-by: Maarten Lankhorst <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Rodrigo Vivi <[email protected]> (cherry picked from commit 4316b19dee27cc5cd34a95fdbc0a3a5237507701) Signed-off-by: Rodrigo Vivi <[email protected]>
2020-09-30drm/i915: Break up error capture compression loops with cond_resched()Chris Wilson1-0/+3
As the error capture will compress user buffers as directed to by the user, it can take an arbitrary amount of time and space. Break up the compression loops with a call to cond_resched(), that will allow other processes to schedule (avoiding the soft lockups) and also serve as a warning should we try to make this loop atomic in the future. Testcase: igt/gem_exec_capture/many-* Signed-off-by: Chris Wilson <[email protected]> Cc: Mika Kuoppala <[email protected]> Cc: [email protected] Reviewed-by: Mika Kuoppala <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] (cherry picked from commit 293f43c80c0027ff9299036c24218ac705ce584e) Signed-off-by: Rodrigo Vivi <[email protected]>
2020-09-30drm/i915: Fix an error code i915_gem_object_copy_blt()Dan Carpenter1-1/+1
This code should use "vma[1]" instead of "vma". The "vma" variable is a valid pointer. Fixes: 6b05030496f7 ("drm/i915: Convert i915_gem_object/client_blt.c to use ww locking as well, v2.") Signed-off-by: Dan Carpenter <[email protected]> Reviewed-by: Mika Kuoppala <[email protected]> Signed-off-by: Maarten Lankhorst <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/20200911075243.GG12635@kadam (cherry picked from commit 68ba71e3ae6dd86a23486655e33c5f8c9bd90777) Signed-off-by: Rodrigo Vivi <[email protected]>
2020-09-30drm/i915/gt: Clear the buffer pool age before useChris Wilson1-0/+2
If we create a new node, it is possible for the slab allocator to return us a recently freed node. If that node was just retired, it will retain the current jiffy as its node->age. There is then a miniscule window, where as that node is retired, it will appear on the free list with an incorrect age and be eligible for reuse by one thread, and then by a second thread as the correct node->age is written. Fixes: 06b73c2d0b65 ("drm/i915/gt: Delay taking the spinlock for grabbing from the buffer pool") Signed-off-by: Chris Wilson <[email protected]> Reviewed-by: Matthew Auld <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] (cherry picked from commit 9bb34ff25c458a2a48fb61409df42f465ede37f8) Signed-off-by: Rodrigo Vivi <[email protected]>
2020-09-30drm/i915/gem: Prevent using pgprot_writecombine() if PAT is not supportedChris Wilson1-0/+4
Let's not try and use PAT attributes for I915_MAP_WC if the CPU doesn't support PAT. Fixes: 6056e50033d9 ("drm/i915/gem: Support discontiguous lmem object maps") Signed-off-by: Chris Wilson <[email protected]> Reviewed-by: Matthew Auld <[email protected]> Cc: <[email protected]> # v5.6+ Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] (cherry picked from commit 121ba69ffddc60df11da56f6d5b29bdb45c8eb80) Signed-off-by: Rodrigo Vivi <[email protected]>
2020-09-30drm/i915/gem: Avoid implicit vmap for highmem on x86-32Chris Wilson1-2/+24
On 32b, highmem using a finite set of indirect PTE (i.e. vmap) to provide virtual mappings of the high pages. As these are finite, map_new_virtual() must wait for some other kmap() to finish when it runs out. If we map a large number of objects, there is no method for it to tell us to release the mappings, and we deadlock. However, if we make an explicit vmap of the page, that uses a larger vmalloc arena, and also has the ability to tell us to release unwanted mappings. Most importantly, it will fail and propagate an error instead of waiting forever. Fixes: fb8621d3bee8 ("drm/i915: Avoid allocating a vmap arena for a single page") #x86-32 References: e87666b52f00 ("drm/i915/shrinker: Hook up vmap allocation failure notifier") Signed-off-by: Chris Wilson <[email protected]> Reviewed-by: Matthew Auld <[email protected]> Cc: <[email protected]> # v4.7+ Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] (cherry picked from commit 060bb115c2d664f04db9c7613a104dfaef3fdd98) Signed-off-by: Rodrigo Vivi <[email protected]>
2020-09-29dma-buf: Use struct dma_buf_map in dma_buf_vunmap() interfacesThomas Zimmermann3-6/+6
This patch updates dma_buf_vunmap() and dma-buf's vunmap callback to use struct dma_buf_map. The interfaces used to receive a buffer address. This address is now given in an instance of the structure. Users of the functions are updated accordingly. This is only an interface change. It is currently expected that dma-buf memory can be accessed with system memory load/store operations. v2: * include dma-buf-heaps and i915 selftests (kernel test robot) * initialize cma_obj before using it in drm_gem_cma_free_object() (kernel test robot) Signed-off-by: Thomas Zimmermann <[email protected]> Acked-by: Sumit Semwal <[email protected]> Acked-by: Christian König <[email protected]> Acked-by: Daniel Vetter <[email protected]> Acked-by: Tomasz Figa <[email protected]> Acked-by: Sam Ravnborg <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-09-29dma-buf: Use struct dma_buf_map in dma_buf_vmap() interfacesThomas Zimmermann3-7/+26
This patch updates dma_buf_vmap() and dma-buf's vmap callback to use struct dma_buf_map. The interfaces used to return a buffer address. This address now gets stored in an instance of the structure that is given as an additional argument. The functions return an errno code on errors. Users of the functions are updated accordingly. This is only an interface change. It is currently expected that dma-buf memory can be accessed with system memory load/store operations. v3: * update fastrpc driver (kernel test robot) v2: * always clear map parameter in dma_buf_vmap() (Daniel) * include dma-buf-heaps and i915 selftests (kernel test robot) Signed-off-by: Thomas Zimmermann <[email protected]> Acked-by: Sumit Semwal <[email protected]> Acked-by: Christian König <[email protected]> Acked-by: Daniel Vetter <[email protected]> Acked-by: Tomasz Figa <[email protected]> Acked-by: Sam Ravnborg <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-09-29Merge tag 'drm-msm-next-2020-09-27' of ↵Dave Airlie1-1/+1
https://gitlab.freedesktop.org/drm/msm into drm-next * DSI support for sm8150/sm8250 * Support for per-process GPU pagetables (finally!) for a6xx. There are still some iommu/arm-smmu changes required to enable, without which it will fallback to the current single pgtable state. The first part (ie. what doesn't depend on drm side patches) is queued up for v5.10[1]. * DisplayPort support. Userspace DP compliance tool support is already merged in IGT[2] * The usual assortment of smaller fixes/cleanups Signed-off-by: Dave Airlie <[email protected]> From: Rob Clark <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/CAF6AEGvqjuzH=Po_9EzzFsp2Xq3tqJUTKfsA2g09XY7_+6Ypfw@mail.gmail.com
2020-09-28drm/i915: Fix state checker hw.active/hw.enable readoutVille Syrjälä1-6/+9
Previously intel_dump_pipe_config() used to dump the full crtc state whether or not the crtc was logically enabled or not. As that meant occasionally dumping confusing stale garbage I changed it to check whether the crtc is logically enabled or not. However I did not realize that the state checker readout code does not populate crtc_state.hw.{active,enabled}. Hence the state checker dump would only give us a full dump of the sw state but not the hw state. Fix that by populating those bits of the hw state as well. Reviewed-by: Uma Shankar <[email protected]> Fixes: 10d75f5428fd ("drm/i915: Fix plane state dumps") Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] (cherry picked from commit 504c7bd85c6f9b14b6c7f03cb5885c0818e805ad) Signed-off-by: Rodrigo Vivi <[email protected]>
2020-09-28drm/i915/dsi: Enable software vblank counterVandita Kulkarni2-0/+15
In case of DSI cmd mode, we get hw vblank counter updated after the TE comes in, if we try to read the hw vblank counter in te handler we wouldnt have the udpated vblank counter yet. This will lead to a state where we would send the vblank event to the user space in the next te, though the frame update would have completed in the first TE duration itself. Hence switch to using software timestamp based vblank counter. v2: Use mode_flags from crtc_state (Ville) Acked-by: Ville Syrjälä <[email protected]> Signed-off-by: Vandita Kulkarni <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-09-28drm/i915/dsi: Initiate frame request in cmd modeVandita Kulkarni3-0/+36
In TE Gate mode or TE NO_GATE mode on every flip we need to set the frame update request bit. After this bit is set transcoder hardware will automatically send the frame data to the panel in case of TE NO_GATE mode, where it sends after it receives the TE event in case of TE_GATE mode. Once the frame data is sent to the panel, we see the frame counter updating. v2: Use intel_de_read/write v3: remove the usage of private_flags v4: Use icl_dsi in func names if non static, fix code formatting issues. (Jani) v5: Send frame update request at the beginning of pipe_update_end, use crtc_state mode_flags (Ville) v6: Add platform and dsi checks (Ville) Acked-by: Ville Syrjälä <[email protected]> Signed-off-by: Vandita Kulkarni <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-09-28drm/i915/dsi: Add TE handler for dsi cmd mode.Vandita Kulkarni1-0/+65
In case of dual link, we get the TE on slave. So clear the TE on slave DSI IIR. If we are operating in TE_GATE mode, after we do a frame update, the transcoder will send the frame data to the panel, after it receives a TE. Whereas if we are operating in NO_GATE mode then the transcoder will immediately send the frame data to the panel. We are not dealing with the periodic command mode here. v2: Pass only relevant masked bits to the handler (Jani) v3: Fix the check for cmd mode in TE handler function. v4: Use intel_handle_vblank instead of drm_handle_vblank (Jani) v3: Use static on handler func (Jani) Acked-by: Ville Syrjälä <[email protected]> Signed-off-by: Vandita Kulkarni <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-09-28i915/dsi: Configure TE interrupt for cmd modeVandita Kulkarni1-2/+48
Configure TE interrupt as part of the vblank enable call flow. v2: Hide the private flags check inside configure_te (Jani) v3: Fix the position of masking de_port_masked for DSI_TE. v4: Simplify the caller of configure_te (Jani) v5: Clear IIR, remove the usage of private_flags v6: including icl_dsi header is not needed Acked-by: Ville Syrjälä <[email protected]> Signed-off-by: Vandita Kulkarni <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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