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path: root/drivers/gpu/drm/i915/intel_gvt_mmio_table.c
AgeCommit message (Expand)AuthorFilesLines
2023-10-11drm/i915/gvt: don't include gvt.h from intel_gvt_mmio_table.hJani Nikula1-1/+2
2023-08-25drm/i915/regs: split out intel_color_regs.hJani Nikula1-0/+1
2023-04-04drm/i915/psr: split out PSR regs to a separate fileJani Nikula1-0/+1
2023-04-04drm/i915/wm: split out SKL+ watermark regs to a separate fileJani Nikula1-0/+1
2023-03-30drm/i915/fdi: split out FDI regs to a separate fileJani Nikula1-0/+1
2023-03-30drm/i915/aux: split out DP AUX regs to a separate fileJani Nikula1-0/+1
2023-03-17drm/i915: s/PIPEMISC/PIPE_MISC/Ville Syrjälä1-3/+3
2023-02-17drm/i915: s/PIPECONF/TRANSCONF/Ville Syrjälä1-4/+4
2023-02-17drm/i915: Give CPU transcoder timing registers TRANS_ prefixVille Syrjälä1-31/+31
2023-01-31drm/i915/lvds: Extract intel_lvds_regs.hVille Syrjälä1-0/+1
2023-01-25drm/i915/display: add intel_display_limits.h for key enumsJani Nikula1-0/+1
2022-11-14Merge drm/drm-next into drm-intel-nextRodrigo Vivi1-2/+3
2022-11-04Merge tag 'drm-intel-gt-next-2022-11-03' of git://anongit.freedesktop.org/drm...Dave Airlie1-1/+1
2022-11-03drm/i915/dpio: move dpio_channel and dpio_phy enums to intel_dpio_phy.hJani Nikula1-0/+1
2022-10-17drm/i915/gen8: Create separate reg definitions for new MCR registersMatt Roper1-1/+1
2022-10-05Merge tag 'drm-next-2022-10-05' of git://anongit.freedesktop.org/drm/drmLinus Torvalds1-0/+1
2022-08-22Merge tag 'gvt-fixes-2022-08-22' of https://github.com/intel/gvt-linux into d...Rodrigo Vivi1-1/+2
2022-08-22drm/i915/gvt: Fix Comet LakeAlex Williamson1-1/+2
2022-08-16drm/i915/backlight: split out backlight registers to a separate fileJani Nikula1-0/+1
2022-06-03drm/i915/regs: split out intel audio register definitionsJani Nikula1-0/+2
2022-04-25Merge tag 'gvt-next-2022-04-21-for-christoph' of https://github.com/intel/gvt...Jani Nikula1-0/+1292
2022-04-21drm/i915/gvt: move the gvt code into kvmgt.koChristoph Hellwig1-0/+1
2022-04-21i915/gvt: Separate the MMIO tracking table from GVT-gZhi Wang1-0/+1290
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