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path: root/drivers/gpu/drm/i915/intel_device_info.c
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2021-02-02drm/i915: Remove references to struct drm_device.pdevThomas Zimmermann1-1/+1
Using struct drm_device.pdev is deprecated. Convert i915 to struct drm_device.dev. No functional changes. v6: * also remove assignment in selftests/ in a later patch (Chris) v5: * remove assignment in later patch (Chris) v3: * rebased v2: * move gt/ and gvt/ changes into separate patches Signed-off-by: Thomas Zimmermann <[email protected]> Reviewed-by: Chris Wilson <[email protected]> Cc: Jani Nikula <[email protected]> Cc: Joonas Lahtinen <[email protected]> Cc: Rodrigo Vivi <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2021-02-01drm/i915/adl_s: Add display WAs for ADL-SAditya Swarup1-1/+5
- Extend permanent driver WA Wa_1409767108, Wa_14010685332 and Wa_14011294188 to adl-s. - Extend permanent driver WA Wa_1606054188 to adl-s. - Add Wa_14011765242 for adl-s A0 stepping. Cc: Jani Nikula <[email protected]> Cc: Ville Syrjälä <[email protected]> Cc: Imre Deak <[email protected]> Cc: Matt Roper <[email protected]> Cc: Lucas De Marchi <[email protected]> Signed-off-by: Aditya Swarup <[email protected]> Reviewed-by: José Roberto de Souza <[email protected]> Signed-off-by: José Roberto de Souza <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2021-02-01drm/i915/display: Add HAS_D12_PLANE_MINIMIZATIONJosé Roberto de Souza1-1/+1
- As RKL and ADL-S only have 5 planes, primary and 4 sprites and the cursor plane, let's group the handling together under HAS_D12_PLANE_MINIMIZATION. - Also use macro to select pipe irq fault error mask. BSpec: 49251 Cc: Lucas De Marchi <[email protected]> Cc: Jani Nikula <[email protected]> Cc: Ville Syrjälä <[email protected]> Cc: Imre Deak <[email protected]> Cc: Matt Roper <[email protected]> Signed-off-by: José Roberto de Souza <[email protected]> Signed-off-by: Aditya Swarup <[email protected]> Reviewed-by: Anusha Srivatsa <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2021-01-20drm/i915/adl_s: Add ADL-S platform info and PCI idsCaz Yokoyama1-0/+1
- Add the initial platform information for Alderlake-S. - Specify ppgtt_size value - Add dma_mask_size - Add ADLS REVIDs - HW tracking(Selective Update Tracking Enable) has been removed from ADLS. Disable PSR2 till we enable software/ manual tracking. v2: - Add support for different ADLS SOC steppings to select correct GT/DISP stepping based on Bspec 53655 based on feedback from Matt Roper.(aswarup) v3: - Make display/gt steppings info generic for reuse with TGL and ADLS. - Modify the macros to reuse tgl_revids_get() - Add HTI support to adls device info.(mdroper) v4: - Rebase on TGL patch for applying WAs based on stepping info from Matt Roper's feedback.(aswarup) v5: - Replace macros with PCI IDs in revid to stepping table. v6: remove stray adls_revids (Lucas) Bspec: 53597 Bspec: 53648 Bspec: 53655 Bspec: 48028 Bspec: 53650 BSpec: 50422 Cc: José Roberto de Souza <[email protected]> Cc: Matt Roper <[email protected]> Cc: Lucas De Marchi <[email protected]> Cc: Anusha Srivatsa <[email protected]> Cc: Jani Nikula <[email protected]> Cc: Ville Syrjälä <[email protected]> Cc: Imre Deak <[email protected]> Signed-off-by: Caz Yokoyama <[email protected]> Signed-off-by: Aditya Swarup <[email protected]> Reviewed-by: Lucas De Marchi <[email protected]> Signed-off-by: Lucas De Marchi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2021-01-15Merge tag 'drm-intel-gt-next-2021-01-14' of ↵Dave Airlie1-157/+0
git://anongit.freedesktop.org/drm/drm-intel into drm-next UAPI Changes: - Deprecate I915_PMU_LAST and optimize state tracking (Tvrtko) Avoid relying on last item ABI marker in i915_drm.h, add a comment to mark as deprecated. Cross-subsystem Changes: Core Changes: Driver Changes: - Restore clear residuals security mitigations for Ivybridge and Baytrail (Chris) - Close #1858: Allow sysadmin to choose applied GPU security mitigations through i915.mitigations=... similar to CPU (Chris) - Fix for #2024: GPU hangs on HSW GT1 (Chris) - Fix for #2707: Driver hang when editing UVs in Blender (Chris, Ville) - Fix for #2797: False positive GuC loading error message (Chris) - Fix for #2859: Missing GuC firmware for older Cometlakes (Chris) - Lessen probability of GPU hang due to DMAR faults [reason 7, next page table ptr is invalid] on Tigerlake (Chris) - Fix REVID macros for TGL to fetch correct stepping (Aditya) - Limit frequency drop to RPe on parking (Chris, Edward) - Limit W/A 1406941453 to TGL, RKL and DG1 (Swathi) - Make W/A 22010271021 permanent on DG1 (Lucas) - Implement W/A 16011163337 to prevent a HS/DS hang on DG1 (Swathi) - Only disable preemption on gen8 render engines (Chris) - Disable arbitration around Braswell's PDP updates (Chris) - Disable arbitration on no-preempt requests (Chris) - Check for arbitration after writing start seqno before busywaiting (Chris) - Retain default context state across shrinking (Venkata, CQ) - Fix mismatch between misplaced vma check and vma insert for 32-bit addressing userspaces (Chris, CQ) - Propagate error for vmap() failure instead kernel NULL deref (Chris) - Propagate error from cancelled submit due to context closure immediately (Chris) - Fix RCU race on HWSP tracking per request (Chris) - Clear CMD parser shadow and GPU reloc batches (Matt A) - Populate logical context during first pin (Maarten) - Optimistically prune dma-resv from the shrinker (Chris) - Fix for virtual engine ownership race (Chris) - Remove timeslice suppression to restore fairness for virtual engines (Chris) - Rearrange IVB/HSW workarounds properly between GT and engine (Chris) - Taint the reset mutex with the shrinker (Chris) - Replace direct submit with direct call to tasklet (Chris) - Multiple corrections to virtual engine dequeue and breadcrumbs code (Chris) - Avoid wakeref from potentially hard IRQ context in PMU (Tvrtko) - Use raw clock for RC6 time estimation in PMU (Tvrtko) - Differentiate OOM failures from invalid map types (Chris) - Fix Gen9 to have 64 MOCS entries similar to Gen11 (Chris) - Ignore repeated attempts to suspend request flow across reset (Chris) - Remove livelock from "do_idle_maps" VT-d W/A (Chris) - Cancel the preemption timeout early in case engine reset fails (Chris) - Code flow optimization in the scheduling code (Chris) - Clear the execlists timers upon reset (Chris) - Drain the breadcrumbs just once (Chris, Matt A) - Track the overall GT awake/busy time (Chris) - Tweak submission tasklet flushing to avoid starvation (Chris) - Track timelines created using the HWSP to restore on resume (Chris) - Use cmpxchg64 for 32b compatilibity for active tracking (Chris) - Prefer recycling an idle GGTT fence to avoid GPU wait (Chris) - Restructure GT code organization for clearer split between GuC and execlists (Chris, Daniele, John, Matt A) - Remove GuC code that will remain unused by new interfaces (Matt B) - Restructure the CS timestamp clocks code to local to GT (Chris) - Fix error return paths in perf code (Zhang) - Replace idr_init() by idr_init_base() in perf (Deepak) - Fix shmem_pin_map error path (Colin) - Drop redundant free_work worker for GEM contexts (Chris, Mika) - Increase readability and understandability of intel_workarounds.c (Lucas) - Defer enabling the breadcrumb interrupt to after submission (Chris) - Deal with buddy alloc block sizes beyond 4G (Venkata, Chris) - Encode fence specific waitqueue behaviour into the wait.flags (Chris) - Don't cancel the breadcrumb interrupt shadow too early (Chris) - Cancel submitted requests upon context reset (Chris) - Use correct locks in GuC code (Tvrtko) - Prevent use of engine->wa_ctx after error (Chris, Matt R) - Fix build warning on 32-bit (Arnd) - Avoid memory leak if platform would have more than 16 W/A (Tvrtko) - Avoid unnecessary #if CONFIG_PM in PMU code (Chris, Tvrtko) - Improve debugging output (Chris, Tvrtko, Matt R) - Make file local variables static (Jani) - Avoid uint*_t types in i915 (Jani) - Selftest improvements (Chris, Matt A, Dan) - Documentation fixes (Chris, Jose) Signed-off-by: Dave Airlie <[email protected]> # Conflicts: # drivers/gpu/drm/i915/gt/intel_breadcrumbs.c # drivers/gpu/drm/i915/gt/intel_breadcrumbs_types.h # drivers/gpu/drm/i915/gt/intel_lrc.c # drivers/gpu/drm/i915/gvt/mmio_context.h # drivers/gpu/drm/i915/i915_drv.h From: Joonas Lahtinen <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-12-23drm/i915/gt: Consolidate the CS timestamp clocksChris Wilson1-157/+0
Pull the GT clock information [used to derive CS timestamps and PM interval] under the GT so that is it local to the users. In doing so, we consolidate the two references for the same information, of which the runtime-info took note of a potential clock source override and scaling factors. Signed-off-by: Chris Wilson <[email protected]> Reviewed-by: Mika Kuoppala <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-11-27drm/i915: remove trailing semicolon in macro definitionTom Rix1-1/+1
The macro use will already have a semicolon. Signed-off-by: Tom Rix <[email protected]> Reviewed-by: Chris Wilson <[email protected]> Signed-off-by: Chris Wilson <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-10-14drm/i915/jsl: Split EHL/JSL platform info and PCI idsTejas Upadhyay1-0/+1
Recently we came across requirement to identify EHL and JSL platform to program them differently. Thus Split the basic platform definition, macros, and PCI IDs to differentiate between EHL and JSL platforms. Also, IS_ELKHARTLAKE is replaced with IS_JSL_EHL everywhere. Changes since V1 : - Rebased to avoid merge conflicts - Added missed check for jasperlake in intel_uc_fw.c Cc : Matt Roper <[email protected]> Cc : Ville Syrjälä <[email protected]> Signed-off-by: Tejas Upadhyay <[email protected]> Reviewed-by: Matt Roper <[email protected]> Signed-off-by: Maarten Lankhorst <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/20201013192948.63470-1-tejaskumarx.surendrakumar.upadhyay@intel.com
2020-09-11drm/i915: disable all display features when no displayJani Nikula1-0/+8
Disable all display feature flags when there are no pipes i.e. there is no display. This should help with not having to additionally check for HAS_DISPLAY() when a feature flag check would suffice. Also disable modeset and atomic driver features. Cc: Ville Syrjälä <[email protected]> Reviewed-by: Ville Syrjälä <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-08-17drm/i915/tgl: Set subplatformsJosé Roberto de Souza1-0/+19
There is no way to differentiate TGL-U from TGL-Y by the PCI ids as some ids are available in both SKUs. So here using the root device id in the PCI bus that iGPU is in to differentiate between U and Y. BSpec: 44455 Reviewed-by: Swathi Dhanavanthri <[email protected]> Signed-off-by: José Roberto de Souza <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Signed-off-by: Rodrigo Vivi <[email protected]>
2020-07-14drm/i915/dg1: add initial DG-1 definitionsAbdiel Janulgue1-0/+1
Bspec: 33617, 33617 v2: s/intel_dg1_info/dg1_info/ as done for other platforms before and try to shut up compiler about ununsed variable that we know shouldn't be used (Lucas) v3: replace explicit attribute with __maybe_unused (Lucas) Cc: José Roberto de Souza <[email protected]> Cc: Daniele Ceraolo Spurio <[email protected]> Cc: Stuart Summers <[email protected]> Cc: Vanshidhar Konda <[email protected]> Cc: Lucas De Marchi <[email protected]> Cc: Aravind Iddamsetty <[email protected]> Cc: Matt Roper <[email protected]> Signed-off-by: Abdiel Janulgue <[email protected]> Signed-off-by: Lucas De Marchi <[email protected]> Reviewed-by: José Roberto de Souza <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-07-08drm/i915/sseu: Move sseu_info under gt_infoVenkata Sandeep Dhanalakota1-3/+0
SSEUs are a GT capability, so track them under gt_info. Signed-off-by: Venkata Sandeep Dhanalakota <[email protected]> Signed-off-by: Daniele Ceraolo Spurio <[email protected]> Cc: Tvrtko Ursulin <[email protected]> Cc: Andi Shyti <[email protected]> Reviewed-by: Chris Wilson <[email protected]> Signed-off-by: Chris Wilson <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-07-08drm/i915/sseu: Move sseu detection and dump to intel_sseuDaniele Ceraolo Spurio1-582/+2
Keep all the SSEU code in the relevant file. The code has also been updated to use intel_gt instead of dev_priv. Based on an original patch by Sandeep. Signed-off-by: Daniele Ceraolo Spurio <[email protected]> Cc: Tvrtko Ursulin <[email protected]> Cc: Andi Shyti <[email protected]> Cc: Venkata Sandeep Dhanalakota <[email protected]> Reviewed-by: Tvrtko Ursulin <[email protected]> Signed-off-by: Chris Wilson <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-07-08drm/i915: Move the engine mask to intel_gt_infoDaniele Ceraolo Spurio1-1/+0
Since the engines belong to the GT, move the runtime-updated list of available engines to the intel_gt struct. The original mask has been renamed to indicate it contains the maximum engine list that can be found on a matching device. In preparation for other info being moved to the gt in follow up patches (sseu), introduce an intel_gt_info structure to group all gt-related runtime info. v2: s/max_engine_mask/platform_engine_mask (tvrtko), fix selftest Signed-off-by: Daniele Ceraolo Spurio <[email protected]> Cc: Tvrtko Ursulin <[email protected]> Cc: Andi Shyti <[email protected]> Cc: Venkata Sandeep Dhanalakota <[email protected]> Reviewed-by: Tvrtko Ursulin <[email protected]> #v1 Signed-off-by: Chris Wilson <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-07-08drm/i915: Move engine-related mmio init to engines_init_mmioDaniele Ceraolo Spurio1-66/+0
All the info we read in intel_device_info_init_mmio are engine-related and since we already have an engine_init_mmio function we can just perform the operations from there. v2: clarify comment about forcewake requirements and pruning (Chris) Signed-off-by: Daniele Ceraolo Spurio <[email protected]> Cc: Tvrtko Ursulin <[email protected]> Cc: Andi Shyti <[email protected]> Cc: Chris Wilson <[email protected]> Reviewed-by: Tvrtko Ursulin <[email protected]> #v1 Signed-off-by: Chris Wilson <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-07-08drm/i915: Use the gt in HAS_ENGINEDaniele Ceraolo Spurio1-6/+7
A follow up patch will move the engine mask under the gt structure, so get ready for that. v2: switch the remaining gvt case using dev_priv->gt to gvt->gt (Chris) Signed-off-by: Daniele Ceraolo Spurio <[email protected]> Cc: Tvrtko Ursulin <[email protected]> Cc: Andi Shyti <[email protected]> Cc: Chris Wilson <[email protected]> Reviewed-by: Tvrtko Ursulin <[email protected]> #v1 Signed-off-by: Chris Wilson <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-07-08drm/i915: Convert device_info to uncore/de_readDaniele Ceraolo Spurio1-30/+47
Use intel_<uncore/de>_read instead of I915_READ to read the informational registers. Extended from an original sseu-only patch by Sandeep. Signed-off-by: Daniele Ceraolo Spurio <[email protected]> Cc: Tvrtko Ursulin <[email protected]> Cc: Andi Shyti <[email protected]> Cc: Venkata Sandeep Dhanalakota <[email protected]> Reviewed-by: Tvrtko Ursulin <[email protected]> Signed-off-by: Chris Wilson <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-06-02drm/i915: Identify Cometlake platformChris Wilson1-0/+1
Cometlake is a small refresh of Coffeelake, but since we have found out a difference in the plaforms, we need to identify them as separate platforms. Since we previously took Coffeelake/Cometlake as identical, update all IS_COFFEELAKE() to also include IS_COMETLAKE(). Signed-off-by: Chris Wilson <[email protected]> Reviewed-by: José Roberto de Souza <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-05-20drm/i915/rkl: Limit number of universal planes to 5Matt Roper1-1/+4
RKL only has five universal planes, plus a cursor. Since the bottom-most universal plane is considered the primary plane, set the number of sprites available on this platform to 4. In general, the plane capabilities of the remaining planes stay the same as TGL. However the NV12 Y-plane support moves down to the new top two planes and now only the bottom three planes can be used for NV12 UV. Bspec: 49181 Bspec: 49251 Cc: Ville Syrjälä <[email protected]> Signed-off-by: Matt Roper <[email protected]> Reviewed-by: Ville Syrjälä <[email protected]> Signed-off-by: Lucas De Marchi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-05-19drm/i915/rkl: Add RKL platform info and PCI idsMatt Roper1-0/+1
Introduce the basic platform definition, macros, and PCI IDs. Bspec: 44501 Cc: Lucas De Marchi <[email protected]> Cc: Caz Yokoyama <[email protected]> Cc: Aditya Swarup <[email protected]> Signed-off-by: Matt Roper <[email protected]> Acked-by: Caz Yokoyama <[email protected]> Reviewed-by: Anusha Srivatsa <[email protected]> Signed-off-by: Lucas De Marchi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-05-14drm/i915: Extract i915_cs_timestamp_{ns_to_ticks,tick_to_ns}()Ville Syrjälä1-1/+1
Pull the code to do the CS timestamp ns<->ticks conversion into helpers and use them all over. The check in i915_perf_noa_delay_set() seems a bit dubious, so we switch it to do what I assume it wanted to do all along (ie. make sure the resulting delay in CS timestamp ticks doesn't exceed 32bits)? Cc: Lionel Landwerlin <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Chris Wilson <[email protected]>
2020-05-14drm/i915: Store CS timestamp frequency in HzVille Syrjälä1-17/+17
kHz isn't accurate enough for storing the CS timestamp frequency on some of the platforms. Store the value in Hz instead. Cc: Lionel Landwerlin <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Chris Wilson <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
2020-04-18drm/i915: Refactor setting dma info to a common helperMichael J. Ruhl1-0/+1
DMA_MASK bit values are different for different generations. This will become more difficult to manage over time with the open coded usage of different versions of the device. Fix by: disallow setting of dma mask in AGP path (< GEN(5) for i915, add dma_mask_size to the device info configuration, updating open code call sequence to the latest interface, refactoring into a common function for setting the dma segment and mask info Reviewed-by: Chris Wilson <[email protected]> Signed-off-by: Michael J. Ruhl <[email protected]> cc: Brian Welty <[email protected]> cc: Daniele Ceraolo Spurio <[email protected]> Signed-off-by: Chris Wilson <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-04-03drm/i915: Store cpu_transcoder_mask in device infoVille Syrjälä1-12/+19
We have a bunch of code that would like to know which CPU transcoders are actually present in the hardware. Rather than use various ad-hoc methods let's just include a full bitmask in the device info, alongside pipe_mask. v2: Rebase Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: José Roberto de Souza <[email protected]>
2020-03-18drm/i915: Enable non-contiguous pipe fusingAnshuman Gupta1-11/+1
As we have already enabled supported infrastructure for non-contiguous pipe fusing in driver, we don't require non-contiguous pipe_mask check anymore. It is an unlike condition, it make sense to remove this condition. changes since RFC: - using intel_pipe_mask_is_valid() function to check integrity of pipe_mask. [Ville] v2: - simplify condition in intel_pipe_mask_is_valid(). [Ville] v3: - removed non-contiguous pipe fusing check. [Lucas] Cc: Ville Syrjälä <[email protected]> Cc: Lucas De Marchi <[email protected]> Reviewed-by: Lucas De Marchi <[email protected]> Signed-off-by: Anshuman Gupta <[email protected]> Signed-off-by: Uma Shankar <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-02-27drm/i915: significantly reduce the use of <drm/i915_drm.h>Jani Nikula1-0/+1
The #include has been splattered all over the place, but there are precious few places, all .c files, that actually need it. v2: remove leftover double newlines Reviewed-by: Chris Wilson <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-02-19drm/i915: Read rawclk_freq earlierChris Wilson1-1/+6
Read the rawclk_freq during runtime info probing, prior to its first use in computing the CS timestamp frequency. Then store it in the runtime info, and include it in the debug printouts. Closes: https://gitlab.freedesktop.org/drm/intel/issues/834 Signed-off-by: Chris Wilson <[email protected]> Reviewed-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-02-16drm/i915: Avoid potential division-by-zero in computing CS timestamp periodChris Wilson1-7/+11
Since we use a HW readback or estimation of the CS timestamp frequency, sometimes it may result in 0. Avoid the division-by-zero in computing its reciprocal, the timestamp period. Signed-off-by: Chris Wilson <[email protected]> Acked-by: Tvrtko Ursulin <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-02-16drm/i915: Track hw reported context runtimeTvrtko Ursulin1-0/+6
GPU saves accumulated context runtime (in CS timestamp units) in PPHWSP which will be useful for us in cases when we are not able to track context busyness ourselves (like with GuC). Keep a copy of this in struct intel_context from where it can be easily read even if the context is not pinned. v2: (Chris) * Do not store pphwsp address in intel_context. * Log CS wrap-around. * Simplify calculation by relying on integer wraparound. v3: * Include total/avg in traces and error state for debugging Signed-off-by: Tvrtko Ursulin <[email protected]> Reviewed-by: Chris Wilson <[email protected]> Signed-off-by: Chris Wilson <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-01-17drm/i915: conversion to new logging macros in i915/intel_device_info.cWambui Karuga1-11/+14
This replaces the printk and struct device based logging macros with the new struct drm_device style based logging macros i915/intel_device_info.c. Signed-off-by: Wambui Karuga <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/e404429ff2a5e5080867f577beccd7b578a671cd.1578560355.git.wambui.karugax@gmail.com
2019-12-31drm/i915/tgl: Assume future platforms will inherit TGL's SFC capabilityMatt Roper1-1/+1
Our usual i915 convention is to assume that future platforms will follow the same behavior as the latest platform of today. The VDBOX/SFC capabilities described here don't seem like something that should be specific to TGL, so let's future-proof by making the test apply to all gen12+ platforms. Cc: Lucas De Marchi <[email protected]> Signed-off-by: Matt Roper <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Lucas De Marchi <[email protected]>
2019-12-28drm/i915: prefer 3-letter acronym for broadwellLucas De Marchi1-2/+2
We are currently using a mix of platform name and acronym to name the functions. Let's prefer the acronym as it should be clear what platform it's about and it's shorter, so it doesn't go over 80 columns in a few cases. This converts broadwell to bdw where appropriate. Signed-off-by: Lucas De Marchi <[email protected]> Acked-by: Jani Nikula <[email protected]> Acked-by: Ville Syrjälä <[email protected]> Reviewed-by: Matt Roper <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-12-28drm/i915: prefer 3-letter acronym for haswellLucas De Marchi1-2/+2
We are currently using a mix of platform name and acronym to name the functions. Let's prefer the acronym as it should be clear what platform it's about and it's shorter, so it doesn't go over 80 columns in a few cases. This converts haswell to hsw where appropriate. Signed-off-by: Lucas De Marchi <[email protected]> Acked-by: Jani Nikula <[email protected]> Acked-by: Ville Syrjälä <[email protected]> Reviewed-by: Matt Roper <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-12-12drm/i915/cml: Separate U series pci id from origianl list.Lee Shawn C1-0/+2
U series device need different DDI buffer setup for eDP and DP. If driver did not recognize ULT id proerply. The setting for H and S series would be used. Cc: Rodrigo Vivi <[email protected]> Cc: Jani Nikula <[email protected]> Cc: Anusha Srivatsa <[email protected]> Cc: Cooper Chiou <[email protected]> Signed-off-by: Lee Shawn C <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-12-09drm/i915: Flesh out device_info pretty printerChris Wilson1-6/+27
Include all the number fields for describing the GT, as well as the current boolean flags, primarily for inclusion in error states. Signed-off-by: Chris Wilson <[email protected]> Cc: Andi Shyti <[email protected]> Reviewed-by: Andi Shyti <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-10-29drm/i915/display/cnl+: Handle fused off DSCJosé Roberto de Souza1-0/+4
DSC could be fused off, so not all GEN10+ platforms will support it. Cc: Manasi Navare <[email protected]> Cc: Martin Peres <[email protected]> Reviewed-by: Ramalingam C <[email protected]> Reviewed-by: Manasi Navare <[email protected]> Signed-off-by: José Roberto de Souza <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-10-29drm/i915/display/icl+: Check if DMC is fused offJosé Roberto de Souza1-0/+3
Check if DMC is fused off and handle it. Cc: Ville Syrjälä <[email protected]> Cc: Martin Peres <[email protected]> Reviewed-by: Ramalingam C <[email protected]> Signed-off-by: José Roberto de Souza <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-10-29drm/i915/display: Check if FBC is fused offJosé Roberto de Souza1-0/+3
Check if FBC is fused off and handle it. Cc: Ville Syrjälä <[email protected]> Cc: Martin Peres <[email protected]> Reviewed-by: Ramalingam C <[email protected]> Signed-off-by: José Roberto de Souza <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-10-29drm/i915/display: Handle fused off HDCPJosé Roberto de Souza1-0/+3
HDCP could be fused off, so not all GEN9+ platforms will support it. Cc: Ville Syrjälä <[email protected]> Cc: Martin Peres <[email protected]> Reviewed-by: Ramalingam C <[email protected]> Reviewed-by: Ville Syrjälä <[email protected]> Signed-off-by: José Roberto de Souza <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-09-21drm/i915/tgl: s/ss/eu fuse reading supportDaniele Ceraolo Spurio1-21/+62
Gen12 has dual-subslices (DSS), which compared to gen11 subslices have some duplicated resources/paths. Although DSS behave similarly to 2 subslices, instead of splitting this and presenting userspace with bits not directly representative of hardware resources, present userspace with a subslice_mask made up of DSS bits instead. v2: GEM_BUG_ON on mask size (Lionel) Bspec: 29547 Bspec: 12247 Cc: Kelvin Gardiner <[email protected]> Cc: Tvrtko Ursulin <[email protected]> Cc: Lionel Landwerlin <[email protected]> CC: Radhakrishna Sripada <[email protected]> Cc: Michel Thierry <[email protected]> #v1 Cc: Daniele Ceraolo Spurio <[email protected]> Cc: José Roberto de Souza <[email protected]> Signed-off-by: Daniele Ceraolo Spurio <[email protected]> Signed-off-by: James Ausmus <[email protected]> Signed-off-by: Oscar Mateo <[email protected]> Signed-off-by: Sudeep Dutt <[email protected]> Signed-off-by: Stuart Summers <[email protected]> Signed-off-by: Mika Kuoppala <[email protected]> Acked-by: Lionel Landwerlin <[email protected]> Reviewed-by: Lucas De Marchi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Signed-off-by: Chris Wilson <[email protected]>
2019-09-16drm/i915: stop conflating HAS_DISPLAY() and disabled displayJani Nikula1-6/+2
Stop setting ->pipe_mask to zero when display is disabled, allowing us to have different code paths for not actually having display hardware, and having display hardware disabled. This lets us develop those two avenues independently. There are no functional changes for when there is no display. However, all uses of for_each_pipe() and for_each_pipe_masked() will start running for the disabled display case. Put one of the more significant ones behind checks for INTEL_DISPLAY_ENABLED(), otherwise the cases should not be hit with disabled display, or they seem benign. Fingers crossed. All in all, this might not be the ideal solution. In fact we may have had something along the lines of this in the past, but we ended up conflating the two cases. Possibly even by recommendation by yours truly; I did not dare dig up that part of the history. But the perfect is the enemy of the good, this is a straightforward change, and lets us get actual work done in both fronts without interfering with each other. Cc: Chris Wilson <[email protected]> Cc: José Roberto de Souza <[email protected]> Cc: Ville Syrjälä <[email protected]> Reviewed-by: Chris Wilson <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-09-13drm/i915/tgl: Limit ourselves to just rcs0Chris Wilson1-2/+6
More pruning away of features until we have a stable system and a basis for debugging what's missing. v2: Fixup vdbox/vebox fusing Signed-off-by: Chris Wilson <[email protected]> Cc: Mika Kuoppala <[email protected]> Reviewed-by: Mika Kuoppala <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-09-12drm/i915: convert device info num_pipes to pipe_maskJani Nikula1-5/+5
Replace device info number of pipes with a bit mask of available pipes. This will prove handy in the future. There's still a bunch of future work to do to actually allow a non-consecutive mask of pipes, but it's a start. No functional changes. Cc: Chris Wilson <[email protected]> Cc: José Roberto de Souza <[email protected]> Cc: Ville Syrjälä <[email protected]> Reviewed-by: José Roberto de Souza <[email protected]> Acked-by: Ville Syrjälä <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-08-23drm/i915: Expand subslice maskStuart Summers1-4/+4
Currently, the subslice_mask runtime parameter is stored as an array of subslices per slice. Expand the subslice mask array to better match what is presented to userspace through the I915_QUERY_TOPOLOGY_INFO ioctl. The index into this array is then calculated: slice * subslice stride + subslice index / 8 v2: Fix 32-bit build v3: Use new helper function in SSEU workaround warning message v4: Use GEM_BUG_ON to force developers to use valid SSEU configurations per platform (Chris) Signed-off-by: Stuart Summers <[email protected]> Reviewed-by: Chris Wilson <[email protected]> Signed-off-by: Chris Wilson <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-08-23drm/i915: Add function to determine if a slice has a subsliceStuart Summers1-5/+4
Add a new function to determine whether a particular slice has a given subslice. Signed-off-by: Stuart Summers <[email protected]> Reviewed-by: Chris Wilson <[email protected]> Signed-off-by: Chris Wilson <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-08-23drm/i915: Add function to set subslicesStuart Summers1-7/+11
Add a new function to set a set of subslices for a given slice. v2: Fix typo in subslice_mask assignment Signed-off-by: Stuart Summers <[email protected]> Reviewed-by: Chris Wilson <[email protected]> Signed-off-by: Chris Wilson <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-08-23drm/i915: Use local variables for subslice_mask for device infoStuart Summers1-23/+26
When setting up subslice_mask, instead of operating on the slice array directly, use a local variable to start bits per slice, then use this to set the per slice array in one step. Signed-off-by: Stuart Summers <[email protected]> Reviewed-by: Chris Wilson <[email protected]> Signed-off-by: Chris Wilson <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-08-23drm/i915: Add EU stride runtime parameterStuart Summers1-5/+4
Add a new SSEU runtime parameter, eu_stride, which is used to mirror the userspace concept of a range of EUs per subslice. This patch simply adds the parameter and updates usage in the QUERY_TOPOLOGY_INFO handler. v2: Add GEM_BUG_ON to make sure eu_stride is valid Signed-off-by: Stuart Summers <[email protected]> Reviewed-by: Chris Wilson <[email protected]> Signed-off-by: Chris Wilson <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-08-23drm/i915: Add function to set SSEU info per platformStuart Summers1-25/+14
Add a new function to allow each platform to set maximum slice, subslice, and EU information to reduce code duplication. Signed-off-by: Stuart Summers <[email protected]> Reviewed-by: Mika Kuoppala <[email protected]> Signed-off-by: Chris Wilson <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-08-20drm/i915/tgl: add support for reading the timestamp frequencyMichel Thierry1-1/+1
There are no changes with respect to GEN11, which Paulo wrote. This gets rid of the "Missing switch case in read_timestamp_frequency" message at boot for Tiger Lake. [ Lucas: BSpec: 10742 and 9024, but there's a mismatch on the values. Let's say a glitch in the spec. Tested locally and it works. ] Cc: Paulo Zanoni <[email protected]> Cc: Lionel Landwerlin <[email protected]> Signed-off-by: Michel Thierry <[email protected]> Reviewed-by: Lucas De Marchi <[email protected]> Signed-off-by: Lucas De Marchi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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