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2024-06-07drm/i915: pass dev_priv explicitly to PIPESRCJani Nikula2-4/+4
Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the PIPESRC register macro. Reviewed-by: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/ac1959b7038d6fedb4777dcf2b961de901fb8880.1717514638.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <[email protected]>
2024-06-07drm/i915: pass dev_priv explicitly to TRANS_VSYNCSHIFTJani Nikula3-3/+5
Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the TRANS_VSYNCSHIFT register macro. Reviewed-by: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/8103a31fbf6da725e6aed3bb86c15bbd581164fb.1717514638.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <[email protected]>
2024-06-07drm/i915: pass dev_priv explicitly to BCLRPATJani Nikula2-5/+7
Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the BCLRPAT register macro. Reviewed-by: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/f04d0313032d5820a14cc504af390b4b1006fae6.1717514638.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <[email protected]>
2024-06-07drm/i915: pass dev_priv explicitly to TRANS_VSYNCJani Nikula4-6/+8
Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the TRANS_VSYNC register macro. Reviewed-by: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/eed30cb59cc45955a88cdf951023b0e695095760.1717514638.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <[email protected]>
2024-06-07drm/i915: pass dev_priv explicitly to TRANS_VBLANKJani Nikula4-9/+15
Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the TRANS_VBLANK register macro. Reviewed-by: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/c33739ac6f26105fd1ad79b0027b6626e241c7bc.1717514638.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <[email protected]>
2024-06-07drm/i915: pass dev_priv explicitly to TRANS_VTOTALJani Nikula4-8/+9
Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the TRANS_VTOTAL register macro. Reviewed-by: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/751bc7046f5e2c5fc6a4fe5ade2e836c641abdb7.1717514638.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <[email protected]>
2024-06-07drm/i915: pass dev_priv explicitly to TRANS_HSYNCJani Nikula3-5/+6
Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the TRANS_HSYNC register macro. Reviewed-by: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/d387281470c9b677adb659b80fa3385df2faca99.1717514638.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <[email protected]>
2024-06-07drm/i915: pass dev_priv explicitly to TRANS_HBLANKJani Nikula2-4/+5
Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the TRANS_HBLANK register macro. Reviewed-by: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/19d3d11d522be1787db89bdc254ae826ca4fb50a.1717514638.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <[email protected]>
2024-06-07drm/i915: pass dev_priv explicitly to TRANS_HTOTALJani Nikula3-5/+5
Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the TRANS_HTOTAL register macro. Reviewed-by: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/4bdba7417341782b74b89753b7db7fdc3edf932c.1717514638.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <[email protected]>
2024-06-07drm/i915: pass dev_priv explicitly to DPLL_MDJani Nikula1-7/+11
Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the DPLL_MD register macro. Reviewed-by: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/98d24284d4ec435c3acae6445943204dfa96617d.1717514638.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <[email protected]>
2024-06-07drm/i915: pass dev_priv explicitly to DPLLJani Nikula6-39/+42
Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the DPLL register macro. Reviewed-by: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/7deea1d86c2706994450ec938f8f174a2ac54d27.1717514638.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <[email protected]>
2024-06-07drm/i915/overlay: convert intel_overlay_print_error_state() to drm_printerJani Nikula2-9/+8
Use the regular drm printer, so we can drop the i915_error_printf() usage. Reviewed-by: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Signed-off-by: Jani Nikula <[email protected]>
2024-06-07drm/i915/dmc: convert intel_dmc_print_error_state() to drm_printerJani Nikula2-11/+10
Use the regular drm printer, so we can drop the i915_error_printf() usage. Reviewed-by: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Signed-off-by: Jani Nikula <[email protected]>
2024-06-06drm/i915: Reduce DDI clock gating printk level from NOTICE to DEBUGVille Syrjälä1-3/+3
No idea why the DDI clock gating print is done with drm_notice(). Just use drm_dbg_kms() since no one is going to be interested in this under normal circumstances. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Jani Nikula <[email protected]>
2024-06-06drm/i915/display: include xe_bo.h, gem_object_types etc. where neededJani Nikula4-0/+4
Include what you use. The dependencies on the headers, and what they include, is a bit convoluted. Add xe compat gem/gem_object_types.h. Fix all the places needed. Reviewed-by: Rodrigo Vivi <[email protected]> Acked-by: Rodrigo Vivi <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/e9ca3d6127ea22f252d9dbf30cfde99e37538c99.1717004739.git.jani.nikula@intel.com
2024-06-06drm/i915/display: include intel_step.h where neededJani Nikula1-0/+1
Include what you use. With this, we can drop the include along with xe_step.h from xe compat i915_drv.h. Reviewed-by: Rodrigo Vivi <[email protected]> Acked-by: Rodrigo Vivi <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/abee71a6c6edbd1a3ddf0f97838977e53feaa5ff.1717004739.git.jani.nikula@intel.com
2024-06-06drm/i915/display: include intel_uncore.h where neededJani Nikula1-0/+1
Include what you use. With this, we can drop the include from xe compat i915_drv.h. Reviewed-by: Rodrigo Vivi <[email protected]> Acked-by: Rodrigo Vivi <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/bc3a722413e20db905671e58627ba6d757f41c63.1717004739.git.jani.nikula@intel.com
2024-06-06drm/i915/display: include i915_gpu_error.h where neededJani Nikula1-0/+1
Include what you use. With this, we can drop the include from xe compat i915_drv.h. Reviewed-by: Rodrigo Vivi <[email protected]> Acked-by: Rodrigo Vivi <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/a5dbb8d46403761bd8518db45fa71dc55930d3cf.1717004739.git.jani.nikula@intel.com
2024-06-06drm/i915/display: include gt/intel_gt_types.h where neededJani Nikula1-0/+1
Include what you use. We need to move the compat intel_gt_types.h under gt subdir. With this, we can drop the include from xe compat i915_drv.h. Reviewed-by: Rodrigo Vivi <[email protected]> Acked-by: Rodrigo Vivi <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/df73c0934ad21f157714a41b33b81cebd2a523a6.1717004739.git.jani.nikula@intel.com
2024-06-06drm/i915/display: include gem/i915_gem_stolen.h where neededJani Nikula1-0/+1
Include what you use. We need to move the compat i915_gem_stolen.h under gem subdir. With this, we can drop the include from xe compat i915_drv.h. Reviewed-by: Rodrigo Vivi <[email protected]> Acked-by: Rodrigo Vivi <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/6ac3480a8689fda5aaf4007cb604e06e939a03f7.1717004739.git.jani.nikula@intel.com
2024-06-05drm/i915: Protect CRC reg macro arguments for consistencyVille Syrjälä1-13/+13
It's probably a good idea to start protecting all macro arguments to avoid any cargo-cult mistakes when people go looking for examples of how to define these things. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Jani Nikula <[email protected]>
2024-06-05drm/i915: Define the PIPE_CRC_EXP registersVille Syrjälä1-0/+47
I need a scratch register which fill the following requirements: - can be accessed via DSB - all the bits can be read/written - no serious side effects So far the only thing I could think of is the "expected CRC" register. Add the definition so I can use it. While I only need the hsw+ variant currently, let's define the older variants as well for completeness. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Acked-by: Jani Nikula <[email protected]>
2024-06-05drm/i915: Document which platforms have which CRC registersVille Syrjälä1-2/+7
Sprinkle some comments around to indicate which CRC registers are valid for which platforms. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Jani Nikula <[email protected]>
2024-06-05drm/i915: Add a separate definition for PIPE_CRC_RES_HSWVille Syrjälä2-1/+6
On hsw+ we only have one CRC result register, instead of the five we have on ivb, and some of the others have been repurposed to serve other CRC related purposes. Since the hsw+ vs. pre-hsw register operate quite differently let's add a separate definition for the hsw+ variant to make the situation a bit more clear. Also since we only use this from a hsw+ codepath there is no real benefit to be had with reusing the ivb register definition. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Jani Nikula <[email protected]>
2024-06-05drm/i915: Regroup pipe CRC regsVille Syrjälä1-20/+23
Put all the definitions related to a single pipe CRC register in one place, instead of the current approach where things are spread all over the place. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Jani Nikula <[email protected]>
2024-06-05drm/i915: Switch PIPE_CRC_RES_*_IVB to _MMIO_PIPE()Ville Syrjälä2-11/+11
PIPE_CRC_RES_*_IVB are proper pipe registers, and only valid for IVB+ where pipe register blocks are equally spaced, so we can switch from _MMIO_TRANS2() to the simpler _MMIO_PIPE() for these. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Jani Nikula <[email protected]>
2024-06-05drm/i915: Extract intel_pipe_crc_regs.hVille Syrjälä3-0/+94
The CRC registers are a pretty self contained bunch. Extract them to a separate header to declutter i915_reg.h. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Jani Nikula <[email protected]>
2024-06-05drm/i915/dsb: Use intel_color_uses_dsb()Ville Syrjälä1-1/+3
Use intel_color_uses_dsb() instead of open coding it in intel_vblank_evade_init(). Make the logic around DSB a bit more isolated from the rest of the code. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Rodrigo Vivi <[email protected]>
2024-06-05drm/i915/dsb: Pass DSB engine ID to intel_dsb_prepare()Ville Syrjälä3-3/+6
Allow the caller of intel_dsb_prepare() to determine which DSB engine (out of the three possible per pipe) to use. This will let us utilize multiple DSB engines during the same commit. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Rodrigo Vivi <[email protected]>
2024-06-05drm/i915/dsb: Move DSB ID definition to the headerVille Syrjälä2-8/+8
We're going to need to make the DSB ID visible outside the DSB code, so that we eg. can use multiple DSB engines in parallel. to that end move the definition to intel_dsb.h. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Rodrigo Vivi <[email protected]>
2024-06-05drm/i915/dsb: Polish the DSB ID enumVille Syrjälä1-11/+11
Namespace the DSB ID enum properly, and make the naming match other such enums in general. Also make the names 0 based as that's what Bspec uses for DSB (unlike eg. planes where it uses 1 based indexing). We'll throw out INVALID_DSB while at it since we have no use for it at the moment. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Rodrigo Vivi <[email protected]>
2024-06-04drm/i915: Fix assert on pending async-put power domain work when it requeues ↵Imre Deak1-6/+6
itself Commit dd839aa857eb ("drm/i915: Fix incorrect assert about pending power domain async-put work") fixed the assert about a pending work dropping a display power reference asynchronously, leading to the drm_WARN_ON(!queue_delayed_work(&power_domains->async_put_work)); warn next time around a power reference was put asynchronously, due to a stale instance of the work still being pending. However the fix didn't consider the case where multiple power reference was acquired and put, requiring the work to requeue itself. Extend the fix for this case as well canceling the pending instance of the work before it requeues itself. Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10915 Signed-off-by: Imre Deak <[email protected]> Reviewed-by: Jouni Högander <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-06-03drm/i915/psr: Add Early Transport into psr debugfs interfaceJouni Högander1-8/+27
We want to have sink Early Transport capability and usage in our psr debugfs status interface. v4: use su_region_et_enabled instead of psr2_su_region_et_valid v3: remove extra space from "PSR mode: disabled" v2: printout "Selective Update enabled (Early Transport)" instead of "Selective Update Early Transport enabled" Reviewed-by: Animesh Manna <[email protected]> Signed-off-by: Jouni Högander <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-06-03drm/i915/psr: Allow setting I915_PSR_DEBUG_SU_REGION_ET_DISABLE via debugfsJouni Högander1-3/+10
Currently setting I915_PSR_DEBUG_SU_REGION_ET_DISABLE (0x20) via psr_debug debugfs interface is not allowed. This patch allows it. v3: - ensure psr is disabled/enabled if enable_psr2_su_region_et changes - remove extra space v2: ensure that fastset is performed when the bit changes Reviewed-by: Animesh Manna <[email protected]> Signed-off-by: Jouni Högander <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-06-03drm/i915/display: Selective fetch Y position on Region Early TransportJouni Högander1-1/+5
Selective fetch Y position differs when Region Early Transport is used. Use formula from Bspec for this. Bspec: 68927 Reviewed-by: Animesh Manna <[email protected]> Signed-off-by: Jouni Högander <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-06-03drm/i915/psr: Use enable boolean from intel_crtc_state for Early TransportJouni Högander1-1/+1
When enabling Early Transport use intel_crtc_state->enable_psr2_su_region_et instead of psr2_su_region_et_valid. Reviewed-by: Animesh Manna <[email protected]> Fixes: 467e4e061c44 ("drm/i915/psr: Enable psr2 early transport as possible") Signed-off-by: Jouni Högander <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-06-03drm/i915/psr: Get Early Transport status in intel_psr_pipe_get_configJouni Högander1-0/+2
We are currently not getting Early Transport status information in intel_psr_pipe_get_config. Fix this. Reviewed-by: Animesh Manna <[email protected]> Fixes: 467e4e061c44 ("drm/i915/psr: Enable psr2 early transport as possible") Signed-off-by: Jouni Högander <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-06-03drm/i915/psr: Add Early Transport status boolean into intel_psrJouni Högander2-1/+4
Currently we are purely relying on psr2_su_region_et_valid. Add new boolean value into intel_psr struct indicating whether Early Transport is enabled or not and use it instead of psr2_su_region_et_valid for getting Early Transport status information. Reviewed-by: Animesh Manna <[email protected]> Signed-off-by: Jouni Högander <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-05-31drm: move i915_hdcp_interface.h under include/drm/intelJani Nikula3-3/+3
Clean up the top level include/drm directory by grouping all the Intel specific files under a common subdirectory. Cc: Daniel Vetter <[email protected]> Cc: Dave Airlie <[email protected]> Cc: Lucas De Marchi <[email protected]> Cc: Tomas Winkler <[email protected]> Acked-by: Lucas De Marchi <[email protected]> Acked-by: Rodrigo Vivi <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/5f53384118e33123d3c87b94cc8835360237698b.1717075103.git.jani.nikula@intel.com
2024-05-31drm: move i915_pciids.h under include/drm/intelJani Nikula1-1/+1
Clean up the top level include/drm directory by grouping all the Intel specific files under a common subdirectory. Cc: Daniel Vetter <[email protected]> Cc: Dave Airlie <[email protected]> Cc: Lucas De Marchi <[email protected]> Cc: Bjorn Helgaas <[email protected]> Acked-by: Lucas De Marchi <[email protected]> Acked-by: Rodrigo Vivi <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/a19cebc0f03588b9627dcaaebe69a9fef28c27f0.1717075103.git.jani.nikula@intel.com
2024-05-31drm: move intel_lpe_audio.h under include/drm/intelJani Nikula2-2/+2
Clean up the top level include/drm directory by grouping all the Intel specific files under a common subdirectory. Cc: Daniel Vetter <[email protected]> Cc: Dave Airlie <[email protected]> Cc: Lucas De Marchi <[email protected]> Cc: Jaroslav Kysela <[email protected]> Cc: Takashi Iwai <[email protected]> Reviewed-by: Andi Shyti <[email protected]> Acked-by: Lucas De Marchi <[email protected]> Acked-by: Rodrigo Vivi <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/2d645970a65cfd13e01fd8195b35bf9483ae9c2f.1717075103.git.jani.nikula@intel.com
2024-05-31drm: move i915_component.h under include/drm/intelJani Nikula2-2/+2
Clean up the top level include/drm directory by grouping all the Intel specific files under a common subdirectory. v2: Also change Documentation/gpu/i915.rst (Andi) Cc: Daniel Vetter <[email protected]> Cc: Dave Airlie <[email protected]> Cc: Lucas De Marchi <[email protected]> Cc: Tomas Winkler <[email protected]> Cc: Jaroslav Kysela <[email protected]> Cc: Takashi Iwai <[email protected]> Acked-by: Lucas De Marchi <[email protected]> Acked-by: Rodrigo Vivi <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/a8c07233a8234858eb6711140482ef8db4c91cf4.1717075103.git.jani.nikula@intel.com
2024-05-31drm/i915: drop unnecessary i915_reg.h includesJani Nikula7-7/+0
With the register header refactoring, some of the includes of i915_reg.h have become unnecessary. Remove. Reviewed-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Signed-off-by: Jani Nikula <[email protected]>
2024-05-31drm/i915: move PCH DP AUX CH regs to intel_dp_aux_regs.hJani Nikula1-0/+8
Move the macros where they belong. Reviewed-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/9bc3a7bb34edc5dc17ffcb2a9e64edcef8c7a7b8.1716894910.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <[email protected]>
2024-05-31drm/i915: rearrange DP AUX register macrosJani Nikula1-4/+6
Follow the recommended style for grouping register macros. Reviewed-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/8ace710d8a1edac7e1af1ed12122fb6bc68114e9.1716894910.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <[email protected]>
2024-05-31drm/i915: Switch intel_usecs_to_scanlines() to 64bit mathsVille Syrjälä1-2/+2
Dotclocks can reach ~1GHz these days, so intel_usecs_to_scanlines(), with its 32bit maths, is currently limited to a few milliseconds. I want bigger numbers in DSB selftests, so switch over to 64bit maths. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Jani Nikula <[email protected]>
2024-05-31drm/i915: Move intel_crtc_scanline_offset()Ville Syrjälä1-38/+38
I want to use intel_crtc_scanline_offset() in intel_crtc_scanline_to_hw(). Relocate intel_crtc_scanline_offset() a bit to avoid a forward declaration. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Jani Nikula <[email protected]>
2024-05-31drm/i915: Simplify scanline_offset handling for gen2Ville Syrjälä1-5/+3
Currently intel_crtc_scanline_offset() is careful to always return a positive offset. That is not actually necessary as long as we take care of negative values when applying the offset in __intel_get_crtc_scanline(). This simplifies intel_crtc_scanline_offset(), and makes the scanline_offfset arithmetic more symmetric between the forward (__intel_get_crtc_scanline()) and reverse (intel_crtc_scanline_to_hw()) directions. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Jani Nikula <[email protected]>
2024-05-31drm/i915: Extract intel_mode_vtotal()Ville Syrjälä2-23/+18
We have several copies of code calculating the hardware's idea of vtotal. Pull that to a helper, similar to intel_mode_vblank_{start,end}(). Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Jani Nikula <[email protected]>
2024-05-31drm/i915: Extract intel_mode_vblank_end()Ville Syrjälä2-4/+13
Extract intel_mode_vblank_end() in the same vein as intel_mode_vblank_start(). While we have only one use of this it seems nicer to unify the approach. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Jani Nikula <[email protected]>
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