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2023-10-07drm/i915: s/pipe_config/crtc_state/ in the state checkerVille Syrjälä1-28/+28
Switch over to the modern variable naming in the state checker. Ie. rename the pipe_config stuff to crtc_state. Also make it clear which is the "software state" (ie. what the current state should be) vs. "hardware state" (ie. what the currnet state really is). Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Jani Nikula <[email protected]>
2023-10-07drm/i915: Simplify the state checker calling convetionsVille Syrjälä3-21/+18
We're passing in a totally random mismash of things into the state checker. Clean it up to pass in the minimum needed. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Jani Nikula <[email protected]>
2023-10-07drm/i915: Constify remainder of the state checkerVille Syrjälä2-9/+9
Mark the remaining crtc states used by the state checker as const. There is no reason to ever mutate them here. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Jani Nikula <[email protected]>
2023-10-07drm/i915: Simplify snps/c10x DPLL state checker calling convetionVille Syrjälä5-8/+12
Passing in the atomic state + crtc state is a bit weird. The latter can be just the crtc (which is the normal calling convention used in a lot of other places). Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Jani Nikula <[email protected]>
2023-10-07drm/i915: Constify the snps/c10x PLL state checkersVille Syrjälä4-6/+6
State checkers should never modify the crtc states, so make them const. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Jani Nikula <[email protected]>
2023-10-07drm/i915: Simplify watermark state checker calling conventionVille Syrjälä3-6/+8
There is never any reason to pass in both the crtc and its state as one can always dig out the crtc from its state. But for more consistency across the whole state checker let's just pass the overall atomic state+crtc here as well. v2: Also pass state+crtc here (Jani) Reviewed-by: Jani Nikula <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-10-07drm/i915: Constify watermark state checkerVille Syrjälä2-2/+2
The skl+ wm state checker has no reason to modify the crtc state, so make it const. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Jani Nikula <[email protected]>
2023-10-06drm/i915: Simplify DPLL state checker calling conventionVille Syrjälä3-11/+14
Make life simpler by just passing in the atomic state + crtc instead of plumbing in all kinds of crtc states. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Jani Nikula <[email protected]>
2023-10-06drm/i915: Constify the crtc states in the DPLL checkerVille Syrjälä2-5/+5
The DPLL state checker should not be modifying the crtc states, so make the const. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Jani Nikula <[email protected]>
2023-10-06drm/i915: Stop clobbering old crtc state during state checkVille Syrjälä1-11/+10
The state checker overwrites the old crtc state with the current hardware state. While that does save a kmalloc() it seems rather dubious as there might still be something that we need in the old crtc state. Stop doing that and just allocate a temporary state for the state checker. Should the extra malloc during the commit phase turn out too annoying we could of course preallocate one for each crtc, but let's proceed with the straightforward approch for now. And while at it let's mark the new crtc state as const to make sure the state checker doesn't mess it up. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Jani Nikula <[email protected]>
2023-10-06drm/i915/psr: Unify PSR pre/post plane update hooksVille Syrjälä3-18/+8
intel_psr_pre_plane_update() operates on a per-crtc level, whereas intel_psr_post_plane_update() operates on the whole atomic commit, for no real reason that I can see. Adjust intel_psr_post_plane_update() to match the intel_psr_pre_plane_update() approach. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Jani Nikula <[email protected]>
2023-10-05drm/dp: switch drm_dp_downstream_*() helpers to struct drm_edidJani Nikula2-9/+4
Prefer struct drm_edid where possible. With limited users for the drm_dp_downstream_*() helpers, this is fairly straightforward. Signed-off-by: Jani Nikula <[email protected]> Reviewed-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-10-05drm/i915/fbc: Remove pointless "stride is multiple of 64 bytes" checkVille Syrjälä1-7/+0
Plane stride is always a multiple of 64 bytes. Remove the pointless check that really doesn't have anything to do with FBC. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Vinod Govindapillai <[email protected]>
2023-10-05drm/i915/fbc: Split plane pixel format checks per-platformVille Syrjälä1-4/+43
Carve up pixel_format_is_valid() into per-platform variants to make it easier to see what limits are actually being imposed. Note that the XRGB1555 can be dropped from the g4x+ variant since the plane no longer supports that format anyway. TODO: maybe go for vfuncs later v2: Update for lnl changes Reviewed-by: Juha-Pekka Heikkila <[email protected]> #v1 Reviewed-by: Vinod Govindapillai <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-10-05drm/i915/fbc: Split plane rotation checks per-platformVille Syrjälä1-6/+24
Carve up rotation_is_valid() into per-platform variants to make it easier to see what limits are actually being imposed. TODO: maybe go for vfuncs later Reviewed-by: Juha-Pekka Heikkila <[email protected]> Reviewed-by: Vinod Govindapillai <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-10-05drm/i915/fbc: Split plane tiling checks per-platformVille Syrjälä1-3/+18
Carve up tiling_is_valid() into per-platform variants to make it easier to see what limits are actually being imposed. TODO: maybe go for vfuncs later Reviewed-by: Juha-Pekka Heikkila <[email protected]> Reviewed-by: Vinod Govindapillai <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-10-05drm/i915/fbc: Split plane stride checks per-platformVille Syrjälä1-15/+49
Carve up stride_is_valid() into per-platform variants to make it easier to see what limits are actually being imposed. TODO: maybe go for vfuncs later Reviewed-by: Juha-Pekka Heikkila <[email protected]> Reviewed-by: Vinod Govindapillai <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-10-05drm/i915/fbc: Remove ancient 16k plane stride limitVille Syrjälä1-4/+2
The 16k max plane stride limit seems to be originally from i965gm, and no explicit limit has been specified since (g4x+). So let's assume the max plane stride itself is a suitable limit also for the more recent FBC hardware. In fact even for i965gm the max X-tiled stride is also 16k so technically we don't need the check there either, but let's keep it there anyway since it's explicitly mentioned in the spec. Gen2/3 have more strict limits checked separately. Reviewed-by: Swati Sharma <[email protected]> Reviewed-by: Juha-Pekka Heikkila <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-10-05drm/i915/display: Created exclusive version of vga decode setupUma Shankar1-17/+1
Current vga arbiter implementation in i915 needs a re-design. The current approach would cause real problems if anyone actually needs to talk another GPU using legacy VGA resources. The main issue is that X becomes a slideshow if it thinks there are multiple GPUs that have VGA decoding enabled as it insists on adjusting the VGA routing pretty much for every little operation involving any of the GPUs. The cleanup will be planned for i915. Meanwhile to focus on Xe upstreaming and have a cleaner separation, the said functionality is being moved to a different file exclusive for i915. Xe driver will re-use rest of the display code from i915. v2: Addressed Jani Nikula's review comments. v3: Dropped a duplicate function (Jani) v4: Updated commit message with reasoning as sugested by Ville. Signed-off-by: Uma Shankar <[email protected]> Reviewed-by: Arun R Murthy <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-10-04drm/i915/dp_mst: Make sure pbn_div is up-to-date after sink reconnectImre Deak1-6/+3
Atm the MST encoder config computation may use an out-of-date pbn_div value, if the sink is unplugged and a sink is replugged with different link rate/lane count capabilities. The current way of reinitializing pbn_div depends on pbn_div getting cleared via intel_atomic_check() -> drm_dp_mst_atomic_check() -> drm_dp_mst_atomic_check_payload_alloc_limits(), however the clearing won't happen if the sink got unplugged (and hence drm_dp_mst_topology_mgr::mst_state being false). To fix the above, simply update pbn_div unconditionally during config computation, making pbn_div always match the link rate and lane count. Cc: Lyude Paul <[email protected]> Reviewed-by: Lyude Paul <[email protected]> Signed-off-by: Imre Deak <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-10-04drm/i915/display/lspcon: Increase LSPCON mode settle timeoutNiko Tsirakis1-1/+14
This is to eliminate all cases of "*ERROR* LSPCON mode hasn't settled", followed by link training errors. Intel engineers recommended increasing this timeout and that does resolve the issue. On some CometLake-based device designs the Parade PS175 takes more than 400ms to settle in PCON mode. 100 reboot trials on one device resulted in a median settle time of 440ms and a maximum of 444ms. Even after increasing the timeout to 500ms, 2% of devices still had this error. So this increases the timeout to 800ms. Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/9443 Signed-off-by: Pablo Ceballos <[email protected]> Signed-off-by: Niko Tsirakis <[email protected]> Reviewed-by: Jani Nikula <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-10-04Merge drm/drm-next into drm-intel-nextJani Nikula2-11/+13
Backmerge to sync up with drm-intel-gt-next and drm-misc-next. Signed-off-by: Jani Nikula <[email protected]>
2023-10-04drm/i915: s/dev_priv/i915/ in the shared_dpll codeVille Syrjälä2-447/+447
Do a s/dev_priv/i915/ pass over the shared_dpll code to get the variable names into sync with modern standards. v2: Rebase Reviewed-by: Jani Nikula <[email protected]> #v1 Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-10-04drm/i915: Introduce for_each_shared_dpll()Ville Syrjälä4-26/+25
No one really cares how we store the shared_dplls. Currently it happens to be an array, but we could change that to a more flexible scheme at some point. Hide the implementation details behind an iterator macro. The slight downside is the pll variable moving out of the loop scope, but maybe someday soon we'll start to convert everything over to having declarations within for-statements... Reviewed-by: Jani Nikula <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-10-04drm/i915: Decouple I915_NUM_PLLS from PLL IDsVille Syrjälä1-2/+24
Stop assuming the size of PLL ID based bitmask is restricted to I915_NUM_PLLS bits. This is the last thing coupling the two things together and thus artificially limiting PLL IDs. We could just pass any arbitrary (large enough) size to for_each_set_bit() and be done with it, but the WARN requiring the caller to not pass in a bogus bitmask seems potentially useful to keep around. So let's just calculate the full bitmask on the spot. And while at it let's assert that the PLL IDs will fit into the bitmask we use for them. TODO: could also get rid of I915_NUM_PLLS entirely and just dynamically allocate i915->shared_dplls[] and state->shared_dpll[]. But that would involve error handling in the modeset init path. Uff. v2: Warn about conflicting PLL IDs (Jani) Reviewed-by: Jani Nikula <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-10-04drm/i915: Stop requiring PLL index == PLL IDVille Syrjälä4-32/+48
There's no good reason to keep around this PLL index == PLL ID footgun. Get rid of it. Both i915->shared_dplls[] and state->shared_dpll[] are indexed by the same thing now, which is just the index we get at initialization from dpll_mgr->dpll_info[]. The rest is all about PLL IDs now. v2: Add pll->index to mimic drm_crtc & co. Remove the comment saying ID should match the index v3: s/i/pll->index/ in debugfs loop (Jani) Reviewed-by: Jani Nikula <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-10-04drm/i915: separate subplatform init and runtime feature initJani Nikula1-0/+7
Adjusting ->port_mask does not belong in intel_device_info_subplatform_init(), but rather intel_display_device_info_runtime_init(). Signed-off-by: Jani Nikula <[email protected]> Reviewed-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/1035800e623e13d5e7baf1215b07e7cdad5eb764.1696336887.git.jani.nikula@intel.com
2023-10-04drm/i915: separate display runtime info initJani Nikula1-1/+18
Move display related functionality from intel_device_info_runtime_init() to intel_display_device_info_runtime_init() and call the latter from the top level. Signed-off-by: Jani Nikula <[email protected]> Reviewed-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/a2226a47a4450e75d867c2ac48665b387af0e42d.1696336887.git.jani.nikula@intel.com
2023-10-04drm/i915: move display info related macros to displayJani Nikula1-0/+9
Anything looking at display (runtime) info should be under display. Signed-off-by: Jani Nikula <[email protected]> Reviewed-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/41b53870ffa7bd41ccc337616c756c69326f05cf.1696336887.git.jani.nikula@intel.com
2023-10-04drm/i915: convert INTEL_DISPLAY_ENABLED() into a functionJani Nikula11-9/+27
There's no need for this to be a macro. Add some documentation too. Signed-off-by: Jani Nikula <[email protected]> Reviewed-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/480b9b697b2ffa0c8677115bd443ba633801c6c1.1696336887.git.jani.nikula@intel.com
2023-10-04Merge tag 'drm-intel-next-2023-09-29' of ↵Dave Airlie91-1915/+4189
git://anongit.freedesktop.org/drm/drm-intel into drm-next drm/i915 feature pull for v6.7: Features and functionality: - Early Xe2 LPD / Lunarlake (LNL) display enabling (Lucas, Matt, Gustavo, Stanislav, Luca, Clint, Juha-Pekka, Balasubramani, Ravi) - Plenty of various DSC improvements and fixes (Ankit) - Add DSC PPS state readout and verification (Suraj) - Improve fastsets for VRR, LRR and M/N updates (Ville) - Use connector->ddc to create (non-DP MST) connector sysfs ddc symlinks (Ville) - Various DSB improvements, load LUTs using DSB (Ville) - Improve shared link bandwidth management, starting with FDI (Imre) - Optimize get param ioctl for PXP status (Alan) - Remove DG2 pre-production hardware workarounds (Matt) - Add more RPL P/U PCI IDs (Dnyaneshwar) - Add new DG2-G12 stepping (Swati) - Add PSR sink error status to debugfs (Jouni) - Add DP enhanced framing to crtc state checker (Ville) Refactoring and cleanups: - Simplify TileY/Tile4 tiling selftest enumeration (Matt) - Remove some unused power domain code (Gustavo) - Check stepping of display IP version rather than MTL platform (Matt) - DP audio compute config cleanups (Vinod) - SDVO cleanups and refactoring, more robust failure handling (Ville) - Color register definition and readout cleanups (Jani) - Reduce header interdependencies for frontbuffer tracking (Jani) - Continue replacing struct edid with struct drm_edid (Jani) - Use source physical address instead of EDID for CEC (Jani) - Clean up Type-C port lane count functions (Luca) - Clean up DSC PPS register definitions and readout (Jani) - Stop using GEM_BUG_ON()/GEM_WARN_ON() in display code (Jani) - Move more of the display probe to display code (Jani) - Remove redundant runtime suspended state flag (Jouni) - Move display info printing to display code (Balasubramani) - Frontbuffer tracking improvements (Jouni) - Add trailing newlines to debug logging (Jim Cromie) - Separate display workarounds from clock gating init (Matt) - Reduce dmesg log spamming for combo PHY, PLL state, FEC, DP MST (Ville, Imre) Fixes: - Fix hotplug poll detect loops via suspend/resume (Imre) - Fix hotplug detect for forced connectors (Imre) - Fix DSC first_line_bpg_offset calculation (Suraj) - Fix debug prints for SDP CRC16 (Arun) - Fix PXP runtime resume (Alan) - Fix cx0 PHY lane handling (Gustavo) - Fix frontbuffer tracking locking in debugfs (Juha-Pekka) - Fix SDVO detect on some models (Ville) - Fix SDP split configuration for DP MST (Vinod) - Fix AUX usage and reads for HDCP on DP MST (Suraj) - Fix PSR workaround (Jouni) - Fix redundant AUX power get/put in DP force (Imre) - Fix ICL DSI TCLK POST by letting hardware handle it (William) - Fix IRQ reset for XE LP+ (Gustavo) - Fix h/vsync_end instead of h/vtotal in VBT (Ville) - Fix C20 PHY msgbus timeout issues (Gustavo) - Fix pre-TGL FEC pipe A vs. DDI A mixup (Ville) - Fix FEC state readout for DP MST (Ville) DRM subsystem core changes: - Assume sink supports 8 bpc when DSC is supported (Ankit) - Add drm_edid_is_digital() helper (Jani) - Parse source physical address from EDID (Jani) - Add function to attach CEC without EDID (Jani) - Reorder connector sysfs/debugfs remove (Ville) - Register connector sysfs ddc symlink later (Ville) Media subsystem changes: - Add comments about CEC source physical address usage (Jani) Merges: - Backmerge drm-next to get v6.6-rc1 (Jani) Signed-off-by: Dave Airlie <[email protected]> # Conflicts: # drivers/gpu/drm/i915/i915_drv.h From: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-10-03drm/i915/lnl: update the supported plane formats with FBCVinod Govindapillai1-1/+7
FBC is supported with RGB32 8:8:8:8 with or without alpha Bspec: 68904, 69560 Signed-off-by: Vinod Govindapillai <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-10-03drm/i915/lnl: possibility to enable FBC on first three planesVinod Govindapillai2-3/+9
In LNL onwards, FBC can be associated to the first three planes. FBC will be enabled on planes first come first served basis until the userspace can select one of these FBC capable planes explicitly. v2: - avoid fbc->state.plane check in intel_fbc_check_plane (Ville) - simplify plane binding register writes (Matt) - Update the subject to reflect that fbc can be enabled only in the first three planes (Matt) v3: - use icl_is_hdr_plane(), use wrapper macro for plane binding register access, comments update and patch split (Ville) v4: - update to the plane binding register access macro Bspec: 69560 Signed-off-by: Vinod Govindapillai <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-10-03Merge tag 'drm-intel-gt-next-2023-09-28' of ↵Dave Airlie1-5/+1
git://anongit.freedesktop.org/drm/drm-intel into drm-next Driver Changes: Fixes/improvements/new stuff: - Fix TLB-Invalidation seqno store [mtl] (Alan Previn) - Force a reset on internal GuC error [guc] (John Harrison) - Define GSC fw [gsc] (Daniele Ceraolo Spurio) - Update workaround 14016712196 [dg2/mtl] (Tejas Upadhyay) - Mark requests for GuC virtual engines to avoid use-after-free (Andrzej Hajda) - Add Wa_14015150844 [dg2/mtl] (Shekhar Chauhan) - Prevent error pointer dereference (Dan Carpenter) - Add Wa_18022495364 [tgl,adl,rpl] (Dnyaneshwar Bhadane) - Fix GuC PMU by moving execlist stats initialization to execlist specific setup (Umesh Nerlige Ramappa) - Fix PXP firmware load [pxp/mtl] (Alan Previn) - Fix execution/context state of PXP contexts (Alan Previn) - Limit the length of an sg list to the requested length (Matthew Wilcox) - Fix reservation address in ggtt_reserve_guc_top [guc] (Javier Pello) - Add Wa_18028616096 [dg2] (Shekhar Chauhan) - Get runtime pm in busyness worker only if already active [guc/pmu] (Umesh Nerlige Ramappa) - Don't set PIPE_CONTROL_FLUSH_L3 for aux inval (Nirmoy Das) Future platform enablement: - Fix and consolidate some workaround checks, make others IP version based [mtl] (Matt Roper) - Replace Meteorlake subplatforms with IP version checks (Matt Roper) - Adding DeviceID for Arrowlake-S under MTL [mtl] (Nemesa Garg) - Run relevant bits of debugfs drop_caches per GT (Tvrtko Ursulin) Miscellaneous: - Remove Wa_15010599737 [dg2] (Shekhar Chauhan) - Align igt_spinner_create_request with hangcheck [selftests] (Jonathan Cavitt) - Remove pre-production workarounds [dg2] (Matt Roper) - Tidy some workaround definitions (Matt Roper) - Wait longer for tasks in migrate selftest [gt] (Jonathan Cavitt) - Skip WA verification for GEN7_MISCCPCTL on DG2 [gt] (Andrzej Hajda) - Silence injected failure in the load via GSC path [huc] (Daniele Ceraolo Spurio) - Refactor deprecated strncpy (Justin Stitt) - Update RC6 mask for mtl_drpc [debugfs/mtl] (Badal Nilawar) - Remove a static inline that requires including i915_drv.h [gt] (Jani Nikula) - Remove inlines from i915_gem_execbuffer.c [gem] (Jani Nikula) - Remove gtt_offset from stream->oa_buffer.head/.tail [perf] (Ashutosh Dixit) - Do not disable preemption for resets (Tvrtko Ursulin) Signed-off-by: Dave Airlie <[email protected]> From: Tvrtko Ursulin <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/ZRVzL02VFuwIkcGl@tursulin-desk
2023-10-02drm/i915: Abstract display info away during probeRodrigo Vivi1-1/+1
The goal is to have this function ready for Xe to use directly. So, let's use the available macro. Cc: Jani Nikula <[email protected]> Signed-off-by: Rodrigo Vivi <[email protected]> Reviewed-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-10-02drm/i915/display: Include i915_active header in frontbuffer tracking codeJouni Högander1-0/+1
Intel frontbuffer tracking code is using i915_active functions -> include i915_active.h directly instead of relying getting indirectly included. Cc: Jani Nikula <[email protected]> Signed-off-by: Jouni Högander <[email protected]> Reviewed-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-09-29drm/i915/display: add I915 conditional build to vlv_dsi_pll.hJani Nikula1-0/+9
Add stubs for !I915. Not all the functions need to be stubbed. Signed-off-by: Jani Nikula <[email protected]> Reviewed-by: Rodrigo Vivi <[email protected]> Acked-by: Dave Airlie <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/930c8d332d425a54dae7af16aed26ec293f80afd.1694514689.git.jani.nikula@intel.com
2023-09-29drm/i915/display: add I915 conditional build to intel_tv.hJani Nikula1-0/+6
Add stubs for !I915. Signed-off-by: Jani Nikula <[email protected]> Reviewed-by: Rodrigo Vivi <[email protected]> Acked-by: Dave Airlie <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/290e555ac87ea11cd6021c1338b75ad64c42ae98.1694514689.git.jani.nikula@intel.com
2023-09-29drm/i915/display: add I915 conditional build to intel_sdvo.hJani Nikula1-0/+13
Add stubs for !I915. Signed-off-by: Jani Nikula <[email protected]> Reviewed-by: Rodrigo Vivi <[email protected]> Acked-by: Dave Airlie <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/c34ea1f470590488acf40512da3892ca153f482a.1694514689.git.jani.nikula@intel.com
2023-09-29drm/i915/display: add I915 conditional build to intel_dvo.hJani Nikula1-0/+6
Add stubs for !I915. Signed-off-by: Jani Nikula <[email protected]> Reviewed-by: Rodrigo Vivi <[email protected]> Acked-by: Dave Airlie <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/d43b27742297083b37d52222c4bb72b062ef4967.1694514689.git.jani.nikula@intel.com
2023-09-29drm/i915/display: add I915 conditional build to g4x_hdmi.hJani Nikula1-0/+12
Add stubs for !I915. Signed-off-by: Jani Nikula <[email protected]> Reviewed-by: Rodrigo Vivi <[email protected]> Acked-by: Dave Airlie <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/ba2eea7ac081d0858a573062f197e00f3b186faf.1694514689.git.jani.nikula@intel.com
2023-09-29drm/i915/display: add I915 conditional build to i9xx_wm.hJani Nikula1-0/+17
Add stubs for !I915. Signed-off-by: Jani Nikula <[email protected]> Reviewed-by: Rodrigo Vivi <[email protected]> Acked-by: Dave Airlie <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/bf15b14d3d060fdb256c78d4b8514d642a8958e6.1694514689.git.jani.nikula@intel.com
2023-09-29drm/i915/display: add I915 conditional build to vlv_dsi.hJani Nikula1-0/+13
Add stubs for !I915. Signed-off-by: Jani Nikula <[email protected]> Reviewed-by: Rodrigo Vivi <[email protected]> Acked-by: Dave Airlie <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/9f538824f15096b0c1444ee50d175a0a22d7bd5e.1694514689.git.jani.nikula@intel.com
2023-09-29drm/i915/display: add I915 conditional build to intel_crt.hJani Nikula1-0/+14
Add stubs for !I915. Signed-off-by: Jani Nikula <[email protected]> Reviewed-by: Rodrigo Vivi <[email protected]> Acked-by: Dave Airlie <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/89a6daca98f87ed1a8a54367a977f146216330d2.1694514689.git.jani.nikula@intel.com
2023-09-29drm/i915/display: add I915 conditional build to intel_dpio_phy.hJani Nikula1-0/+96
Add stubs for !I915. Signed-off-by: Jani Nikula <[email protected]> Reviewed-by: Rodrigo Vivi <[email protected]> Acked-by: Dave Airlie <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/978bc7263e8de10ffc1ef16086341dd629347c8e.1694514689.git.jani.nikula@intel.com
2023-09-29drm/i915/display: add I915 conditional build to g4x_dp.hJani Nikula1-0/+26
Add stubs for !I915. Signed-off-by: Jani Nikula <[email protected]> Reviewed-by: Rodrigo Vivi <[email protected]> Acked-by: Dave Airlie <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/ba92fc1dee1f71018179dbe10b91982c9c93e7e6.1694514689.git.jani.nikula@intel.com
2023-09-29drm/i915/display: add I915 conditional build to intel_overlay.hJani Nikula1-0/+35
Add stubs for !I915. Signed-off-by: Jani Nikula <[email protected]> Reviewed-by: Rodrigo Vivi <[email protected]> Acked-by: Dave Airlie <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/45a127d37816ac97dfe493beeed060e323047014.1694514689.git.jani.nikula@intel.com
2023-09-29drm/i915/display: add I915 conditional build to intel_sprite.hJani Nikula1-0/+8
Add stubs for !I915. Signed-off-by: Jani Nikula <[email protected]> Reviewed-by: Rodrigo Vivi <[email protected]> Acked-by: Dave Airlie <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/b9680203b0b93dc3472260d7e4128984e533b421.1694514689.git.jani.nikula@intel.com
2023-09-29drm/i915/display: add I915 conditional build to intel_pch_display.hJani Nikula1-0/+53
Add stubs for !I915. Signed-off-by: Jani Nikula <[email protected]> Reviewed-by: Rodrigo Vivi <[email protected]> Acked-by: Dave Airlie <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/02de0089de58c9fb19b6b56121f6c917f51b4561.1694514689.git.jani.nikula@intel.com
2023-09-29drm/i915/display: add I915 conditional build to intel_pch_refclk.hJani Nikula1-0/+23
Add stubs for !I915. Signed-off-by: Jani Nikula <[email protected]> Reviewed-by: Rodrigo Vivi <[email protected]> Acked-by: Dave Airlie <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/4359b34cbcff6199b5e42b5311c815aa6f4a167c.1694514689.git.jani.nikula@intel.com
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