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2023-09-11drm/i915/dsc: rename pps write to intel_dsc_pps_write()Jani Nikula1-16/+16
Make the function name conform to existing style better. Cc: Suraj Kandpal <[email protected]> Cc: Ankit Nautiyal <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Reviewed-by: Suraj Kandpal <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/e793056e610ee8cfe2a8d69605402cd2445a517a.1693933849.git.jani.nikula@intel.com
2023-09-11drm/i915/dsc: have intel_dsc_pps_read() return the valueJani Nikula1-13/+19
Register read functions usually return the value instead of passing via pointer parameters. Return the multiple register verification results via a pointer parameter, which can also be NULL to skip the extra checks. Make the name conform to existing style better while at it. Cc: Suraj Kandpal <[email protected]> Cc: Ankit Nautiyal <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Reviewed-by: Suraj Kandpal <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/4d08c0f63c4975cc8cd01b0f82845c989bf13dd0.1693933849.git.jani.nikula@intel.com
2023-09-11drm/i915/dsc: have intel_dsc_pps_read_and_verify() return the valueJani Nikula1-17/+19
Register read functions usually return the value instead of passing via pointer parameters. The calling code becomes easier to read. Make the name conform to existing style better while at it. Cc: Suraj Kandpal <[email protected]> Cc: Ankit Nautiyal <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Reviewed-by: Suraj Kandpal <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/89b7d70bb19114ab3ff0e150a4b862d8032f136d.1693933849.git.jani.nikula@intel.com
2023-09-11drm/i915/dsc: improve clarity of the pps reg read/write helpersJani Nikula1-19/+21
Make it clear what's the number of vdsc per pipe, and what's the number of registers to grab. Have intel_dsc_get_pps_reg() return the registers it knows even if the requested amount is bigger. Cc: Suraj Kandpal <[email protected]> Cc: Ankit Nautiyal <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Reviewed-by: Suraj Kandpal <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/e2551b52ac0dd2b4ffe18d5e7733fafdc191d68a.1693933849.git.jani.nikula@intel.com
2023-09-11drm/i915: Only check eDP HPD when AUX CH is sharedVille Syrjälä3-1/+28
Apparently Acer Chromebook C740 (BDW-ULT) doesn't have the eDP HPD line properly connected, and thus fails the new HPD check during eDP probe. The result is that we lose the eDP output. I suspect all such machines would be Chromebooks or other Linux exclusive systems as the Windows driver likely wouldn't work either. I did check a few other BDW machines here and those do have eDP HPD connected, one of them even is a different Chromebook (Samus). To account for these funky machines let's skip the HPD check when it looks like the eDP port is the only one using that specific AUX channel. In case of multiple ports sharing the same AUX CH (eg. on Asrock B250M-HDV) we still do the check and thus should correctly ignore the eDP port in favor of the other DP port (usually a DP->VGA converter). v2: Don't oops during list iteration Cc: [email protected] Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/9264 Fixes: cfe5bdfb27fa ("drm/i915: Check HPD live state during eDP probe") Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Luca Coelho <[email protected]>
2023-09-08drm/i915/display: Apply workarounds during display initMatt Roper1-0/+3
Rather than applying display workarounds as part of intel_clock_gating_init() (which in turn is confusingly called from i915_gem_init during device probe), handle them at the point we're actually initializing the display hardware. This will also ensure that these workarounds are properly applied during display initialization on the Xe driver, which re-uses i915's display code, but does not call i915's gem init. Signed-off-by: Matt Roper <[email protected]> Reviewed-by: Lucas De Marchi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-09-08drm/i915/display: Extract display workarounds from clock gating initMatt Roper2-0/+61
Several of the register updates that are currently done in the clock gating init functions are actually display workarounds that should move into the display-specific part of the code. Furthermore, some of the registers being programmed don't even have anything to do with clock gating at all. Extract the display workarounds for gen11 and later platforms to a dedicated display/intel_display_wa.c file to keep these separate from the SOC / sgunit clock gating that we need on some platforms. The gen11 cutoff here is selected somewhat arbitrarily; this is the point where workarounds were first assigned dedicated lineage numbers that can be easily looked up and confirmed in the modern workaround database. It also avoids any confusion on older platforms where the exact boundaries between display/GT/other IP blocks wasn't as well-defined as it is today. Signed-off-by: Matt Roper <[email protected]> Reviewed-by: Lucas De Marchi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-09-08drm/mst: Refactor the flow for payload allocation/removementWayne Lin1-6/+12
[Why] Today, the allocation/deallocation steps and status is a bit unclear. For instance, payload->vc_start_slot = -1 stands for "the failure of updating DPCD payload ID table" and can also represent as "payload is not allocated yet". These two cases should be handled differently and hence better to distinguish them for better understanding. [How] Define enumeration - ALLOCATION_LOCAL, ALLOCATION_DFP and ALLOCATION_REMOTE to distinguish different allocation status. Adjust the code to handle different status accordingly for better understanding the sequence of payload allocation and payload removement. For payload creation, the procedure should look like this: DRM part 1: * step 1 - update sw mst mgr variables to add a new payload * step 2 - add payload at immediate DFP DPCD payload table Driver: * Add new payload in HW and sync up with DFP by sending ACT DRM Part 2: * Send ALLOCATE_PAYLOAD sideband message to allocate bandwidth along the virtual channel. And as for payload removement, the procedure should look like this: DRM part 1: * step 1 - Send ALLOCATE_PAYLOAD sideband message to release bandwidth along the virtual channel * step 2 - Clear payload allocation at immediate DFP DPCD payload table Driver: * Remove the payload in HW and sync up with DFP by sending ACT DRM part 2: * update sw mst mgr variables to remove the payload Note that it's fine to fail when communicate with the branch device connected at immediate downstrean-facing port, but updating variables of SW mst mgr and HW configuration should be conducted anyway. That's because it's under commit_tail and we need to complete the HW programming. Changes since v1: * Remove the set but not use variable 'old_payload' in function 'nv50_msto_prepare'. Catched by kernel test robot <[email protected]> Signed-off-by: Wayne Lin <[email protected]> Signed-off-by: Lyude Paul <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-09-07drm/i915/mtl: Drop Wa_14017240301Matt Roper1-5/+0
Drop Wa_14017240301, which is only relevant to pre-production MTL hardware. Although we usually wait a little bit longer to start dropping pre-production workarounds for a platform, it was suggested to eliminate this one slightly earlier because it's a bit unusual/ugly: this workaround is a display-specific workaround that requires matching on the graphics/GT IP version instead of the display IP version. Suggested-by: Jani Nikula <[email protected]> Signed-off-by: Matt Roper <[email protected]> Reviewed-by: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-09-07drm/i915/dsb: Don't use indexed writes when byte enables are not all setVille Syrjälä1-3/+9
The indexed write instruction doesn't support byte-enables, so if the non-indexed write used those we must not convert it to an indexed write. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Animesh Manna <[email protected]>
2023-09-07drm/i915/dsb: Avoid corrupting the first register writeVille Syrjälä1-0/+8
i915_gem_object_create_internal() does not hand out zeroed memory. Thus we may confuse whatever stale garbage is in there as a previous register write and mistakenly handle the first actual register write as an indexed write. This can end up corrupting the instruction sufficiently well to lose the entire register write. Make sure we've actually emitted a previous instruction before attemting indexed register write merging. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Animesh Manna <[email protected]>
2023-09-07drm/i915/dsb: Dump the DSB command buffer when DSB failsVille Syrjälä1-3/+30
Dump the full DSB command buffers and head/tail pointers if the the DSB hasn't completed its job in time. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Animesh Manna <[email protected]>
2023-09-07drm/i915: Constify LUT entries in checkerVille Syrjälä1-5/+5
The LUT checker doesn't modify the LUT entries so make them const. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Animesh Manna <[email protected]>
2023-09-06drm/i915/cx0: Check and increase msgbus timeout thresholdGustavo Sousa2-0/+52
We have experienced timeout issues when going through the sequence to access C20 SRAM registers. Experimentation showed that bumping the message bus timer threshold helped on getting display Type-C connection on the C20 PHY to work. While the timeout is still under investigation with the HW team, having logic to allow forward progress (with the proper warnings) seems useful. Thus, let's bump the threshold when a timeout is detected. The bumped value of 0x200 pclk cycles was somewhat arbitrary - 2x the default value. That value was successfully tested on real hardware that was displaying timeouts otherwise. v2: - Reword commit message to indicate that access to C20 SRAM registers is not direct. (Radhakrishna) - Prefer not to use REG_FIELD_PREP() in intel_cx0_phy.c. (Radhakrishna) - Simplify intel_cx0_bus_check_and_bump_timer() to use a fixed bumped value instead of progressively increasing the threshold. (Mika) BSpec: 65156 Cc: Radhakrishna Sripada <[email protected]> Cc: Mika Kahola <[email protected]> Signed-off-by: Gustavo Sousa <[email protected]> Reviewed-by: Mika Kahola <[email protected]> Signed-off-by: Matt Roper <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-09-06drm/i915: add trailing newlines to msgsJim Cromie1-1/+1
By at least strong convention, a print-buffer's trailing newline says "message complete, send it". The exception (no TNL, followed by a call to pr_cont) proves the general rule. Most DRM.debug calls already comport with this: 207 DRM_DEV_DEBUG, 1288 drm_dbg. Clean up the remainders, in maintainer sized chunks. No functional changes. Signed-off-by: Jim Cromie <[email protected]> Reviewed-by: Andi Shyti <[email protected]> Signed-off-by: Rodrigo Vivi <[email protected]> [Rodrigo changed subject while pushing] Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-09-06drm/i915/psr: Add psr sink error status into sink status debugfsJouni Högander1-9/+25
Normally PSR errors detected by the panel are triggering HPD interrupt and seen as error in dmesg. Some panels are not triggering the interrupt even it is requested and they are detecting error. Due to this it would be good to have possibility to check panel detected errors. Add PSR error status into PSR sink status debugfs interface. Signed-off-by: Jouni Högander <[email protected]> Reviewed-by: Animesh Manna <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-09-05drm/i915/tc: remove "fia" from intel_tc_port_fia_max_lane_count()Luca Coelho4-6/+6
It is irrelevant for the caller that the max lane count is being derived from a FIA register, so having "fia" in the function name is irrelevant. Rename the function accordingly. Reviewed-by: Lucas De Marchi <[email protected]> Reviewed-by: Suraj Kandpal <[email protected]> Signed-off-by: Luca Coelho <[email protected]> Signed-off-by: Lucas De Marchi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-09-05drm/i915/tc: move legacy code out of the main _max_lane_count() funcLuca Coelho1-13/+19
This makes the code a bit more symmetric and readable, especially when we start adding more display version-specific alternatives. Reviewed-by: Suraj Kandpal <[email protected]> Signed-off-by: Luca Coelho <[email protected]> Signed-off-by: Lucas De Marchi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-09-05drm/i915/tc: make intel_tc_port_get_lane_mask() staticLuca Coelho2-2/+1
This function is only used locally, so make it static and remove the definition from the header file. Reviewed-by: Suraj Kandpal <[email protected]> Signed-off-by: Luca Coelho <[email protected]> Signed-off-by: Lucas De Marchi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-09-05drm/i915/tc: rename mtl_tc_port_get_pin_assignment_mask()Luca Coelho1-2/+2
This function doesn't really return the pin assignment mask, but the max lane count derived from that. So rename the function to mtl_tc_port_get_max_lane_count() to better reflect what it really does. Reviewed-by: Lucas De Marchi <[email protected]> Reviewed-by: Suraj Kandpal <[email protected]> Signed-off-by: Luca Coelho <[email protected]> Signed-off-by: Lucas De Marchi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-09-05drm/i915/display: Compare the readout dsc pps paramsSuraj Kandpal1-0/+31
With the dsc config being readout and filled in crtc_state add macros and use them to compare current and previous PPS param in DSC. --v2 -Remove version check [Jani] -Remove dupe macro for dsc pipe compare and use the existing ones [Jani] Signed-off-by: Suraj Kandpal <[email protected]> Reviewed-by: Ankit Nautiyal <[email protected]> Signed-off-by: Animesh Manna <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-09-05drm/i915/vdsc: Fill the intel_dsc_get_pps_config functionSuraj Kandpal2-7/+95
We have setup both the read and write functions so we can move ahead and fill in all the readout state from PPS register into the crtc_state so we can send it for comparision. --v2 -Shorten comment to just PPSX rather than having the whole "Readout PPSX register" [Jani] -Remove pps_temp reinitialization as its being initialized in the read function [Jani] -Use REG_FIELD_GET to readout certain fields of dsc registers [Jani] --v9 -Place the masks at a more appropriate place [Ankit] Signed-off-by: Suraj Kandpal <[email protected]> Reviewed-by: Ankit Nautiyal <[email protected]> Signed-off-by: Animesh Manna <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-09-05drm/i915/vdsc: Remove unused dsc registersSuraj Kandpal1-227/+24
Now that we have macros that can fetch dsc register values based on pipe and pps parameters we can go ahead and remove all the unused register. Signed-off-by: Suraj Kandpal <[email protected]> Reviewed-by: Ankit Nautiyal <[email protected]> Signed-off-by: Animesh Manna <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-09-05drm/i915/vdsc: Add function to write in PPS registerSuraj Kandpal1-242/+30
Now that we have a function that reads any PPS register based on intel_dsc_pps enum provided lets create a function that can write on any PPS. --v2 -Changes need as PPS enum was dropped -Remove duplicated code in intel_dsc_write_pps_reg [Jani] --v3 -Use dsc_split instead of num_vdsc_instances [Ankit] --v5 -Changes to implement the new dsc_reg array variable passing [Ankit] --v7 -Pass no of vdsc instances to get_pps_reg [Ankit] --v8 -No need for dsc_reg dynamic allocation [Jani] -Change function to void as no return needs to be sent back --v9 -Send ARRAY_SIZE(dsc_reg) instead of vdsc_per_pipe [Ankit] Signed-off-by: Suraj Kandpal <[email protected]> Reviewed-by: Ankit Nautiyal <[email protected]> Signed-off-by: Animesh Manna <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-09-05drm/i915/vdsc: Add function to read any PPS registerSuraj Kandpal2-36/+94
Add function to read any PPS register based on the intel_dsc_pps enum provided. Add a function which will call the new pps read function and place it in crtc state. Only PPS0 and PPS1 are readout the rest of the registers will be read in upcoming patches. --v2 -Changes in read function as PPS enum is removed -Initialize pps_val as 0 in pps_read func itself [Jani] -Create a function that gets the required register and call that in the common read function [Jani] -Move the drm_WARN_ON one abstraction layer above [Jani] --v3 -Send both reg values regardless of dsc engine no [Jani] -Don't use num_vdsc_instances stick to dsc_split field [Ankit] --v4 -Manipulate the reg values instead of creating MACRO to change name of pps [Ankit] --v5 -Read dsc reg values using array rather than individual variables [Ankit] -Loop the verification of all dsc engine reads to future proof it [Ankit] -Keep the fix me comment in this patch and remove it in later one where we add other readouts [Ankit] -Add switch statement that fills in the required registers based on no of vdsc engines per pipe. --v7 -Pass no of vdsc instances from read_reg function [Ankit] -Fix issue where arrays do not get freed on return for read_and_verify func [Ankit] --v8 -Simplify reading and verifying of register and remove dynamically allocated arrays [Jani] -Remove no_ from no_vdsc_per_pipe and wherever else it applies [Ankit] --v9 -change variable name to dsc_reg_size rather than vdsc_per_pipe [Ankit] --v10 -remove switch case as we never enter case1 [Ankit] --v11 -Add _ prefix for register that are not supposed to be used directly [Jani] -Remove REG suffix from register macros [Jani] -Do not duplicate register read [Jani] --v12 -Use vdsc_per_pipe rather than array size of dsc_reg [Jani] Signed-off-by: Suraj Kandpal <[email protected]> Reviewed-by: Ankit Nautiyal <[email protected]> Signed-off-by: Animesh Manna <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-09-05drm/i915/vdsc: Add func to get no. of vdsc instances per pipeSuraj Kandpal1-34/+44
We have a function that gets us the total of the vdsc engines being used but not the no. of vdsc instances being used by each pipe. --v6 -Change function to static --v7 -Shorten name to intel_dsc_get_vdsc_per_pipe Signed-off-by: Suraj Kandpal <[email protected]> Reviewed-by: Ankit Nautiyal <[email protected]> Signed-off-by: Animesh Manna <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-09-05drm/i915/vdsc: Add a check for dsc split casesSuraj Kandpal1-1/+13
In intel_vdsc_get_config we only read the primary dsc engine register and not take into account if the other dsc engine is in use and if both registers have the same value or not this patche fixes that by adding a check. --v3 -Remove superfluos new line [Jani] -Fix register naming [Jani] --v5 -pps_temp0/pps_temp1 can be assigned where they are used [Ankit] Signed-off-by: Suraj Kandpal <[email protected]> Reviewed-by: Ankit Nautiyal <[email protected]> Signed-off-by: Animesh Manna <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-09-05drm/i915/vdsc: Refactor dsc register field macroSuraj Kandpal1-28/+70
This patch refactors dsc register related macros that prepares the values to be written in the register. The current bit shifting looks bad and going forward will not serve our purpose to readout dsc register field values the change was suggested by Jani Nikula. Cc: Jani Nikula <[email protected]> Signed-off-by: Suraj Kandpal <[email protected]> Reviewed-by: Ankit Nautiyal <[email protected]> Signed-off-by: Animesh Manna <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-09-04drm/i915: Handle dma fences in dirtyfb callbackJouni Högander1-3/+57
Take into account dma fences in dirtyfb callback. If there is no unsignaled dma fences perform flush immediately. If there are unsignaled dma fences perform invalidate and add callback which will queue flush when the fence gets signaled. v4: - Move invalidate before callback is added v3: - Check frontbuffer bits before adding any fence fb - Flush only when adding fence cb succeeds v2: Use dma_resv_get_singleton Signed-off-by: Jouni Högander <[email protected]> Reviewed-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-09-04drm/i915: Add new frontbuffer tracking interface to queue flushJouni Högander2-0/+32
We want to wait dma fences in dirtyfb ioctl. As we don't want to make dirtyfb ioctl as blocking call we need to use dma_fence_add_callback. Callback used for dma_fence_add_callback is called from atomic context. Due to this we need to add a new frontbuffer tracking interface to queue flush. v3: - Check schedule work success rather than work being pending - Init flush work when frontbuffer struct is initialized v2: Check if flush work is already pending Signed-off-by: Jouni Högander <[email protected]> Reviewed-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-09-04drm/i915/psr: Clear frontbuffer busy bits on flipJouni Högander1-0/+6
We are planning to move flush performed from work queue. This means it is possible to have invalidate -> flip -> flush sequence. Handle this by clearing possible busy bits on flip. Signed-off-by: Jouni Högander <[email protected]> Reviewed-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-09-04drm/i915/fbc: Clear frontbuffer busy bits on flipJouni Högander1-4/+2
We are planning to move flush performed from work queue. This means it is possible to have invalidate -> flip -> flush sequence. Handle this by clearing possible busy bits on flip. Signed-off-by: Ville Syrjälä <[email protected]> Signed-off-by: Jouni Högander <[email protected]> Reviewed-by: Luca Coelho <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-09-01drm/i915/cec: switch to setting physical address directlyJani Nikula2-8/+4
Avoid parsing the EDID again for source physical address. Also gets rids of a few remaining raw EDID usages. Cc: Hans Verkuil <[email protected]> Cc: [email protected] Signed-off-by: Jani Nikula <[email protected]> Reviewed-by: Hans Verkuil <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/01a90c82c8a4f2fd945e0181ffeaca595928d19e.1692884619.git.jani.nikula@intel.com
2023-09-01drm/i915/display: use drm_edid_is_digital()Jani Nikula3-17/+10
Reduce the use of struct edid and drm_edid_raw(). Signed-off-by: Jani Nikula <[email protected]> Reviewed-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/dbc0269d34f3140aff410eefae8a2711c59299b3.1692884619.git.jani.nikula@intel.com
2023-09-01drm/i915/hdcp: Use correct aux for capability check scenarioSuraj Kandpal1-2/+4
Send the correct aux rather than the one derived from intel_digital_port so that the HDCP version of both monitors are fetched rather than just the primary one's Signed-off-by: Suraj Kandpal <[email protected]> Reviewed-by: Uma Shankar <[email protected]> Signed-off-by: Uma Shankar <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-09-01drm/i915/hdcp: Use intel_connector as argument for hdcp_2_2_capableSuraj Kandpal4-5/+6
Use intel_connector as argument instead of intel_digital_port in hdcp_2_2_capable function and dig_port can be later derived from connector. This will help with getting the correct hdcp version of particular monitor in a MST setup. Signed-off-by: Suraj Kandpal <[email protected]> Reviewed-by: Uma Shankar <[email protected]> Signed-off-by: Uma Shankar <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-08-31drm/i915: add minimal i915_gem_object_frontbuffer.hJani Nikula9-0/+9
Split out frontbuffer related declarations and static inlines from gem/i915_gem_object.h into new gem/i915_gem_object_frontbuffer.h. The main goal is to reduce header interdependencies. With gem/i915_gem_object.h including display/intel_frontbuffer.h, modification of the latter causes a whopping 300+ objects to be rebuilt, while many of the source files actually needing it aren't explicitly including it at all. After the change, only 21 objects depend on display/intel_frontbuffer.h, directly or indirectly. Cc: Jouni Högander <[email protected]> Reviewed-by: Jouni Högander <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-08-31drm/i915/mtl: Add TC port lockdep assert to AUX power well enablingImre Deak1-0/+5
Similarly to earlier platforms, assert in the MTL AUX power well enabling handler for TC AUX CH power wells that the TC port using the AUX CH is locked. Signed-off-by: Imre Deak <[email protected]> Reviewed-by: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-08-31drm/i915/dp: Drop redundant AUX power get/put in intel_dp_force()Imre Deak1-7/+0
intel_dp_force() takes the AUX power reference as required by the DP AUX transactions in intel_dp_set_edid(). However the low level AUX handler takes this reference already so the get/put in intel_dp_force() can be dropped. This also fixes a problem where the TC port mode changed while the AUX power well was enabled. Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/8779 Signed-off-by: Imre Deak <[email protected]> Reviewed-by: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-08-30Merge tag 'drm-next-2023-08-30' of git://anongit.freedesktop.org/drm/drmLinus Torvalds56-749/+1357
Pull drm updates from Dave Airlie: "The drm core grew a new generic gpu virtual address manager, and new execution locking helpers. These are used by nouveau now to provide uAPI support for the userspace Vulkan driver. AMD had a bunch of new IP core support, loads of refactoring around fbdev, but mostly just the usual amount of stuff across the board. core: - fix gfp flags in drmm_kmalloc gpuva: - add new generic GPU VA manager (for nouveau initially) syncobj: - add new DRM_IOCTL_SYNCOBJ_EVENTFD ioctl dma-buf: - acquire resv lock for mmap() in exporters - support dma-buf self import automatically - docs fixes backlight: - fix fbdev interactions atomic: - improve logging prime: - remove struct gem_prim_mmap plus driver updates gem: - drm_exec: add locking over multiple GEM objects - fix lockdep checking fbdev: - make fbdev userspace interfaces optional - use linux device instead of fbdev device - use deferred i/o helper macros in various drivers - Make FB core selectable without drivers - Remove obsolete flags FBINFO_DEFAULT and FBINFO_FLAG_DEFAULT - Add helper macros and Kconfig tokens for DMA-allocated framebuffer ttm: - support init_on_free - swapout fixes panel: - panel-edp: Support AUO B116XAB01.4 - Support Visionox R66451 plus DT bindings - ld9040: - Backlight support - magic improved - Kconfig fix - Convert to of_device_get_match_data() - Fix Kconfig dependencies - simple: - Set bpc value to fix warning - Set connector type for AUO T215HVN01 - Support Innolux G156HCE-L01 plus DT bindings - ili9881: Support TDO TL050HDV35 LCD panel plus DT bindings - startek: Support KD070FHFID015 MIPI-DSI panel plus DT bindings - sitronix-st7789v: - Support Inanbo T28CP45TN89 plus DT bindings - Support EDT ET028013DMA plus DT bindings - Various cleanups - edp: Add timings for N140HCA-EAC - Allow panels and touchscreens to power sequence together - Fix Innolux G156HCE-L01 LVDS clock bridge: - debugfs for chains support - dw-hdmi: - Improve support for YUV420 bus format - CEC suspend/resume - update EDID on HDMI detect - dw-mipi-dsi: Fix enable/disable of DSI controller - lt9611uxc: Use MODULE_FIRMWARE() - ps8640: Remove broken EDID code - samsung-dsim: Fix command transfer - tc358764: - Handle HS/VS polarity - Use BIT() macro - Various cleanups - adv7511: Fix low refresh rate - anx7625: - Switch to macros instead of hardcoded values - locking fixes - tc358767: fix hardware delays - sitronix-st7789v: - Support panel orientation - Support rotation property - Add support for Jasonic JT240MHQS-HWT-EK-E3 plus DT bindings amdgpu: - SDMA 6.1.0 support - HDP 6.1 support - SMUIO 14.0 support - PSP 14.0 support - IH 6.1 support - Lots of checkpatch cleanups - GFX 9.4.3 updates - Add USB PD and IFWI flashing documentation - GPUVM updates - RAS fixes - DRR fixes - FAMS fixes - Virtual display fixes - Soft IH fixes - SMU13 fixes - Rework PSP firmware loading for other IPs - Kernel doc fixes - DCN 3.0.1 fixes - LTTPR fixes - DP MST fixes - DCN 3.1.6 fixes - SMU 13.x fixes - PSP 13.x fixes - SubVP fixes - GC 9.4.3 fixes - Display bandwidth calculation fixes - VCN4 secure submission fixes - Allow building DC on RISC-V - Add visible FB info to bo_print_info - HBR3 fixes - GFX9 MCBP fix - GMC10 vmhub index fix - GMC11 vmhub index fix - Create a new doorbell manager - SR-IOV fixes - initial freesync panel replay support - revert zpos properly until igt regression is fixeed - use TTM to manage doorbell BAR - Expose both current and average power via hwmon if supported amdkfd: - Cleanup CRIU dma-buf handling - Use KIQ to unmap HIQ - GFX 9.4.3 debugger updates - GFX 9.4.2 debugger fixes - Enable cooperative groups fof gfx11 - SVM fixes - Convert older APUs to use dGPU path like newer APUs - Drop IOMMUv2 path as it is no longer used - TBA fix for aldebaran i915: - ICL+ DSI modeset sequence - HDCP improvements - MTL display fixes and cleanups - HSW/BDW PSR1 restored - Init DDI ports in VBT order - General display refactors - Start using plane scale factor for relative data rate - Use shmem for dpt objects - Expose RPS thresholds in sysfs - Apply GuC SLPC min frequency softlimit correctly - Extend Wa_14015795083 to TGL, RKL, DG1 and ADL - Fix a VMA UAF for multi-gt platform - Do not use stolen on MTL due to HW bug - Check HuC and GuC version compatibility on MTL - avoid infinite GPU waits due to premature release of request memory - Fixes and updates for GSC memory allocation - Display SDVO fixes - Take stolen handling out of FBC code - Make i915_coherent_map_type GT-centric - Simplify shmem_create_from_object map_type msm: - SM6125 MDSS support - DPU: SM6125 DPU support - DSI: runtime PM support, burst mode support - DSI PHY: SM6125 support in 14nm DSI PHY driver - GPU: prepare for a7xx - fix a690 firmware - disable relocs on a6xx and newer radeon: - Lots of checkpatch cleanups ast: - improve device-model detection - Represent BMV as virtual connector - Report DP connection status nouveau: - add new exec/bind interface to support Vulkan - document some getparam ioctls - improve VRAM detection - various fixes/cleanups - workraound DPCD issues ivpu: - MMU updates - debugfs support - Support vpu4 virtio: - add sync object support atmel-hlcdc: - Support inverted pixclock polarity etnaviv: - runtime PM cleanups - hang handling fixes exynos: - use fbdev DMA helpers - fix possible NULL ptr dereference komeda: - always attach encoder omapdrm: - use fbdev DMA helpers ingenic: - kconfig regmap fixes loongson: - support display controller mediatek: - Small mtk-dpi cleanups - DisplayPort: support eDP and aux-bus - Fix coverity issues - Fix potential memory leak if vmap() fail mgag200: - minor fixes mxsfb: - support disabling overlay planes panfrost: - fix sync in IRQ handling ssd130x: - Support per-controller default resolution plus DT bindings - Reduce memory-allocation overhead - Improve intermediate buffer size computation - Fix allocation of temporary buffers - Fix pitch computation - Fix shadow plane allocation tegra: - use fbdev DMA helpers - Convert to devm_platform_ioremap_resource() - support bridge/connector - enable PM tidss: - Support TI AM625 plus DT bindings - Implement new connector model plus driver updates vkms: - improve write back support - docs fixes - support gamma LUT zynqmp-dpsub: - misc fixes" * tag 'drm-next-2023-08-30' of git://anongit.freedesktop.org/drm/drm: (1327 commits) drm/gpuva_mgr: remove unused prev pointer in __drm_gpuva_sm_map() drm/tests/drm_kunit_helpers: Place correct function name in the comment header drm/nouveau: uapi: don't pass NO_PREFETCH flag implicitly drm/nouveau: uvmm: fix unset region pointer on remap drm/nouveau: sched: avoid job races between entities drm/i915: Fix HPD polling, reenabling the output poll work as needed drm: Add an HPD poll helper to reschedule the poll work drm/i915: Fix TLB-Invalidation seqno store drm/ttm/tests: Fix type conversion in ttm_pool_test drm/msm/a6xx: Bail out early if setting GPU OOB fails drm/msm/a6xx: Move LLC accessors to the common header drm/msm/a6xx: Introduce a6xx_llc_read drm/ttm/tests: Require MMU when testing drm/panel: simple: Fix Innolux G156HCE-L01 LVDS clock Revert "Revert "drm/amdgpu/display: change pipe policy for DCN 2.0"" drm/amdgpu: Add memory vendor information drm/amd: flush any delayed gfxoff on suspend entry drm/amdgpu: skip fence GFX interrupts disable/enable for S0ix drm/amdgpu: Remove gfxoff check in GFX v9.4.3 drm/amd/pm: Update pci link speed for smu v13.0.6 ...
2023-08-30drivers/drm/i915: Honor limits->max_bpp while computing DSC max input bppAnkit Nautiyal1-2/+3
Edid specific BPC constraints are stored in limits->max_bpp. Honor these limits while computing the input bpp for DSC. v2: Use int instead of u8 for computations. (Jani) Add closes tag. (Ankit) Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/9161 Signed-off-by: Ankit Nautiyal <[email protected]> Reviewed-by: Stanislav Lisovskiy <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-08-29drm/i915/psr: Apply Wa_14015648006 for all display 14 steppingsJouni Högander1-2/+1
According to recent Bspec Wa 14015648006 has to be applied for all display 14 steppings. Bspec: 66624 Signed-off-by: Jouni Högander <[email protected]> Reviewed-by: Matt Roper <[email protected]> Signed-off-by: Matt Roper <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-08-29Merge tag 'mm-nonmm-stable-2023-08-28-22-48' of ↵Linus Torvalds2-7/+1
git://git.kernel.org/pub/scm/linux/kernel/git/akpm/mm Pull non-MM updates from Andrew Morton: - An extensive rework of kexec and crash Kconfig from Eric DeVolder ("refactor Kconfig to consolidate KEXEC and CRASH options") - kernel.h slimming work from Andy Shevchenko ("kernel.h: Split out a couple of macros to args.h") - gdb feature work from Kuan-Ying Lee ("Add GDB memory helper commands") - vsprintf inclusion rationalization from Andy Shevchenko ("lib/vsprintf: Rework header inclusions") - Switch the handling of kdump from a udev scheme to in-kernel handling, by Eric DeVolder ("crash: Kernel handling of CPU and memory hot un/plug") - Many singleton patches to various parts of the tree * tag 'mm-nonmm-stable-2023-08-28-22-48' of git://git.kernel.org/pub/scm/linux/kernel/git/akpm/mm: (81 commits) document while_each_thread(), change first_tid() to use for_each_thread() drivers/char/mem.c: shrink character device's devlist[] array x86/crash: optimize CPU changes crash: change crash_prepare_elf64_headers() to for_each_possible_cpu() crash: hotplug support for kexec_load() x86/crash: add x86 crash hotplug support crash: memory and CPU hotplug sysfs attributes kexec: exclude elfcorehdr from the segment digest crash: add generic infrastructure for crash hotplug support crash: move a few code bits to setup support of crash hotplug kstrtox: consistently use _tolower() kill do_each_thread() nilfs2: fix WARNING in mark_buffer_dirty due to discarded buffer reuse scripts/bloat-o-meter: count weak symbol sizes treewide: drop CONFIG_EMBEDDED lockdep: fix static memory detection even more lib/vsprintf: declare no_hash_pointers in sprintf.h lib/vsprintf: split out sprintf() and friends kernel/fork: stop playing lockless games for exe_file replacement adfs: delete unused "union adfs_dirtail" definition ...
2023-08-29drm/i915/sdvo: Print out the i2c pin and slave addressVille Syrjälä1-0/+4
To reduce the guesswork a bit let's print out the SDVO device i2c bus and slave address during init. Reviewed-by: Jani Nikula <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-08-29drm/i915/sdvo: Rework DDC bus handlingVille Syrjälä1-91/+114
Each SDVO device can have up to three sets of DDC pins. Currently we just register a single i2c_adapter for the entire SDVO device and semi-randomly pick the "correct" set of DDC pins during intel_sdvo_tmds_sink_detect(). This doesn't make any real sense especially if we have multiple outputs each with their own dedicated DDC bus. Let's clean up this mess and register a dedicated i2c_adapter for each of the possible pin pairs. Each output (ie. connector) can then pick the correct i2c_adapter to use for its DDC bus. And we can just switch over to drm_connector_init_with_ddc() to take care of the connector->ddc association, which also populates the "ddc" sysfs symlink as a bonus. And now that things are based on the actual connector we can also nuke the sketchy sdvo->controller_output thing. Reviewed-by: Jani Nikula <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-08-29drm/i915/sdvo: Get rid of the per-connector i2c symlinkVille Syrjälä1-27/+2
We should switch over to the standard "ddc" per-connector symlink instead of rolling our own thing. The i2c specific symlink is also in the way of reworking the SDVO DDC handling (which is a mess atm) so get rid of it. Reviewed-by: Jani Nikula <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-08-29drm/i915/sdvo: Nuke the duplicate sdvo->portVille Syrjälä1-11/+8
We already have encoder->port so get rid of the duplicate sdvo->port. Reviewed-by: Jani Nikula <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-08-29drm/i915/sdvo: Initialize the encoder earlierVille Syrjälä1-19/+18
Call drm_encoder_init() earlier so that we don't have to keep passing the i915/dev_priv around separately. v2: Reorder drm_encoder_cleanup() in the error path (Jani) Reviewed-by: Jani Nikula <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-08-29drm/i915/sdvo: Nuke attached_output trackingVille Syrjälä1-15/+16
Instead of operating on the output the user specified (via the connector) the current code tends to operate on whichever outputs it has detected as attached. That is not how the kms uapi is supposed to work. So simply get rid of attached_outputs and instead directly operate on the output the user has specified. Acked-by: Jani Nikula <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-08-29drm/i915/hdcp: Adjust timeout for read in DPMST ScenarioSuraj Kandpal1-3/+9
For dpmst hdcp scenario increase the message timeout based on the number of ports connected as each port needs to be validated and each will take the prescribed amount of time for the respective msg_id and total timeout will be original_timeout * num_ports. --v2 -Add justification for Adjusting the timeout [Arun] Signed-off-by: Suraj Kandpal <[email protected]> Reviewed-by: Arun R Murthy <[email protected]> Signed-off-by: Uma Shankar <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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