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2023-09-21drm/i915/xe2lpd: FBC is now supported on all pipesMatt Roper2-0/+6
FBC is no longer limited by pipe: add the defines for pipes B and C that will be used by platforms supporting FBC on such pipes. Bspec: 68881, 68904 Signed-off-by: Matt Roper <[email protected]> Signed-off-by: Lucas De Marchi <[email protected]> Reviewed-by: Vinod Govindapillai <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-09-21drm/i915/lnl: Add display definitionsBalasubramani Vivekanandan1-0/+5
Add Lunar Lake platform definitions for i915 display. The support for LNL will be added to the xe driver, with i915 only driving the display side. Xe2 display is derived from the Xe_LPD+ IP; additional feature deltas will be introduced in subsequent patches, so here it's just adding a separate xe2_lpd_display struct. v2: Use a LPDP_FEATURES macro (Matt Roper) Signed-off-by: Balasubramani Vivekanandan <[email protected]> Signed-off-by: Lucas De Marchi <[email protected]> Reviewed-by: Matt Roper <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-09-21drm/i915/xelpdp: Add XE_LPDP_FEATURESLucas De Marchi1-11/+46
Add a FEATURES macro for XE_LPD+ as this is expected to be the baseline for Xe2_LPD and will allow to see the delta more easily. v2: Move everything from xe_lpdp_display to the new macro and remove the version setting: it's not needed with GMD_ID. Signed-off-by: Lucas De Marchi <[email protected]> Reviewed-by: Matt Roper <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-09-21Revert "drm/i915/mst: Populate connector->ddc"Ville Syrjälä1-4/+2
This reverts commit 959fb1a686528df1b8fb0cc7bec8ff851b1594a5. Looks like the core MST code might not call i2c_adapter() for us in time, and thus creating the ddc symlink will fail. This will in fact fail the entire connector registration, but the MST code doesn't really seem to care about that and blindly plows ahead. All we may get in the logs is a nearly back to back register+unregister debug messages: [drm:drm_dp_mst_connector_late_register [drm_display_helper]] registering DPMST remote bus for card0-DP-7 [drm:intel_dp_hpd_pulse [i915]] DPRX ESI: 42 00 00 02 [drm:drm_dp_mst_connector_early_unregister [drm_display_helper]] unregistering DPMST remote bus for card0-DP-7 Untangling the initialization order may take some real work, so let's just revert the ddc symlink addition for now... Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/9357 Fixes: 959fb1a68652 ("drm/i915/mst: Populate connector->ddc") Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Acked-by: Jani Nikula <[email protected]> Tested-by: Karthik B S <[email protected]>
2023-09-21drm/i915: add a note about fec_enable with 128b/132bJani Nikula1-1/+6
Add a note that fec_enable actually means FEC is to be enabled explicitly. 128b/132b always has FEC enabled, the driver doesn't need to enable it separately, and fec_enable will be false. Cc: Ville Syrjälä <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Reviewed-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-09-20drm/i915: Implement transcoder LRR for TGL+Ville Syrjälä6-11/+70
Implement low refresh rate (LRR) where we change the vblank length by hand as requested, but otherwise keep the timing generator running in non-VRR mode (ie. fixed refresh rate). The panel itself must support VRR for this to work, and only TGL+ has the double buffred TRANS_VTOTAL.VTOTAL that we need to make the switch properly. The double buffer latching happens at the start of transcoders undelayed vblank. The other thing that we change is TRANS_VBLANK.VBLANK_END but the hardware entirely ignores that in DP mode. But I decided to keep writing it anyway just to avoid more special cases in readout/state check. v2: Document that TRANS_VBLANK.VBLANK_END is ignored by the hardware v3: Reconcile with VRR fastset Adjust update_lrr flag behaviour Make sure timings stay within VRR range v4: Fix up update_m_n vs. update_lrr rebase fail (Manasi) Drop DOUBLE_BUFFER_VACTIVE define as it's not needed (Manasi) TODO: Hook LRR into the automatic DRRS downclocking stuff? Cc: Manasi Navare <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Manasi Navare <[email protected]>
2023-09-20drm/i915: Assert that VRR is off during vblank evasion if necessaryVille Syrjälä1-0/+4
Whenever we change the actual transcoder timings (clock via seamless M/N, full modeset, (or soon) vtotal via LRR) we want the timing generator to be in non-VRR during the commit. Warn if we forgot to turn VRR off prior to vblank evasion. Cc: Manasi Navare <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Manasi Navare <[email protected]> Reviewed-by: Mitul Golani <[email protected]>
2023-09-20drm/i915: Update VRR parameters in fastsetVille Syrjälä1-8/+26
We should be able to change any of the VRR parameters during fastsets as long as we toggle VRR off at the start and then back on at the end. The transcoder will be running in non-VRR mode during the transition. Co-developed-by: Manasi Navare <[email protected]> Signed-off-by: Manasi Navare <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Sean Paul <[email protected]>
2023-09-20drm/i915: Disable VRR during seamless M/N changesVille Syrjälä1-2/+4
Make life less confusing by making sure VRR is disabled whenever we do any drastic changes to the display timings, such as seamless M/N changes. Cc: Manasi Navare <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Manasi Navare <[email protected]> Reviewed-by: Mitul Golani <[email protected]>
2023-09-20drm/i915: Validate that the timings are within the VRR rangeVille Syrjälä1-2/+2
Let's assume there are some crazy displays where the high end of the VRR range ends up being lower than the refresh rate as determined by the actual timings. In that case when we toggle VRR on/off we would step outside the VRR range when toggling VRR on/off. Let's just make sure that never happens by not using VRR in such cases. If the user really wants VRR they should then select the timings to land within the VRR range. Cc: Manasi Navare <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Manasi Navare <[email protected]> Reviewed-by: Mitul Golani <[email protected]>
2023-09-20drm/i915: Relocate is_in_vrr_range()Ville Syrjälä3-13/+14
Move is_in_vrr_range() into intel_vrr.c in anticipation of more users, and rename it accordingly. Cc: Manasi Navare <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Manasi Navare <[email protected]> Reviewed-by: Mitul Golani <[email protected]>
2023-09-20drm/i915: Optimize out redundant M/N updatesVille Syrjälä1-1/+3
Don't perform a seamless M/N update if the values aren't actually changing. This avoids doing extra shenanigans during vblank evasion needlessly. Cc: Manasi Navare <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Manasi Navare <[email protected]>
2023-09-20drm/i915: Adjust seamless_m_n flag behaviourVille Syrjälä5-12/+17
Make the seamless_m_n flag more like the update_pipe fastset flag, ie. the flag will only be set if we need to do the seamless M/N update, and in all other cases the flag is cleared. Also rename the flag to update_m_n to make it more clear it's similar to update_pipe. I believe special casing seamless_m_n like this makes sense as it also affects eg. vblank evasion. We can potentially avoid some vblank evasion tricks, simplify some checks, and hopefully will help with the VRR vs. M/N mess. Cc: Manasi Navare <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Manasi Navare <[email protected]>
2023-09-20drm/i915: Enable VRR later during fastsetsVille Syrjälä2-20/+36
In order to reconcile seamless M/N updates with VRR we'll need to defer the fastset VRR enable to happen after the seamless M/N update (which happens during the vblank evade critical section). So just push the VRR enable to be the last thing during the update. This will also affect the vblank evasion as the transcoder will now still be running with the old VRR state during the vblank evasion. So just grab the timings always from the old crtc state during any non-modeset commit, and also grab the current state of VRR from the active timings (as we disable VRR before vblank evasion during fastsets). This also fixes vblank evasion for seamless M/N updates as we now properly account for the fact that the M/N update happens after vblank evasion. Cc: Manasi Navare <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Manasi Navare <[email protected]> Reviewed-by: Mitul Golani <[email protected]>
2023-09-20drm/i915: Extract intel_crtc_vblank_evade_scanlines()Ville Syrjälä1-22/+31
Pull the vblank evasion scanline calculations into their own helper to declutter intel_pipe_update_start() a bit. Reviewed-by: Manasi Navare <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Mitul Golani <[email protected]>
2023-09-20drm/i915: Change intel_pipe_update_{start,end}() calling conventionVille Syrjälä3-10/+18
We'll need to also look at the old crtc state in intel_pipe_update_start() so change the calling convention to just plumb in the full atomic state instead. Cc: Manasi Navare <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Manasi Navare <[email protected]> Reviewed-by: Mitul Golani <[email protected]>
2023-09-20drm/i915: Move psr unlock out from the pipe update critical sectionVille Syrjälä1-4/+5
Do the PSR unlock after the vblank evade critcal section is fully over, not before. Cc: Manasi Navare <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Manasi Navare <[email protected]> Reviewed-by: Mitul Golani <[email protected]>
2023-09-20drm/i915/dsi: let HW maintain CLK_POSTWilliam Tseng1-12/+1
This change is to adjust TCLK-POST timing so DSI signaling can meet CTS specification. For clock lane, the TCLK-POST timing may be changed from 133.44 ns to 178.72 ns, which is greater than (60 ns+52*UI) and is conformed to the CTS standard. The computed UI is around 1.47 ns. v2: remove the change of HS-TRAIL. Cc: Ville Syrjala <[email protected]> Cc: Jani Nikula <[email protected]> Cc: Vandita Kulkarni <[email protected]> Cc: Suraj Kandpal <[email protected]> Cc: Lee Shawn C <[email protected]> Signed-off-by: William Tseng <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-09-18drm/i915/cx0: Add step for programming msgbus timerGustavo Sousa2-48/+41
There was a recent update in the BSpec adding an extra step to the PLL enable sequence, which is for programming the msgbus timer. Since we also touch PHY registers during hw readout, let's do the programming when starting a transaction rather than only when doing the PLL enable sequence. This might be the missing step that was causing the timeouts that we have recently seen during C20 SRAM register programming sequences. With this in place, we shouldn't need the logic to bump the timer thresholds, since now we have a documented value that should be set peform programming the registers. As such, let's also remove intel_cx0_bus_check_and_bump_timer(), but keep the part that checks if hardware really detected a timeout, which might be useful debugging information. v2: - Use debug level instead of warning for the message notifying that the hardware did not detect the timeout. (Mika) - Got a new BSpec update clarifying that we need to program the msgbus timer of both PHY lanes. Update the changes to reflect that. (Gustavo) BSpec: 64568 Cc: Mika Kahola <[email protected]> Signed-off-by: Gustavo Sousa <[email protected]> Reviewed-by: Mika Kahola <[email protected]> Signed-off-by: Matt Roper <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-09-18drm/i915/dp_mst: Tune down error message during payload additionImre Deak1-2/+2
If a sink is removed in the middle of payload addition drm_dp_add_payload_part1() will fail as expected, either not finding the payload's MST port or failing the payload-add AUX transaction. Based on the above tune the error message down to a debug messge. Cc: Lyude Paul <[email protected]> Reviewed-by: Lyude Paul <[email protected]> Signed-off-by: Imre Deak <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-09-18drm/i915: Remove runtime suspended boolean from intel_runtime_pm structJouni Högander1-1/+1
It's not necessary to carry separate suspended status information in intel_runtime_pm struct as this information is already in underlying device structure. Remove it and use pm_runtime_suspended() to obtain suspended status information when needed. Cc: Jani Nikula <[email protected]> Cc: Imre Deak <[email protected]> Signed-off-by: Jouni Högander <[email protected]> Acked-by: Jani Nikula <[email protected]> Reviewed-by: Imre Deak <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-09-15drm/i915/display: call gmdid display probe at a higher levelJani Nikula1-8/+9
Move gmdid selection one abstraction level higher. Cc: Matt Roper <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Reviewed-by: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-09-15drm/i915: move more of the display probe to display codeJani Nikula2-6/+22
Initializing i915->display.info.__device_info and DISPLAY_RUNTIME_INFO() really belongs in display code. Move them there. Cc: Matt Roper <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Reviewed-by: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-09-15drm/i915/dpt: replace GEM_BUG_ON() with drm_WARN_ON()Jani Nikula1-1/+1
Avoid using GEM_BUG_ON() in display code. Signed-off-by: Jani Nikula <[email protected]> Reviewed-by: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/17e70eaf967bdfe99111cdbb3bcf6aa2f0b0e837.1694684044.git.jani.nikula@intel.com
2023-09-15drm/i915/fb: replace GEM_WARN_ON() with drm_WARN_ON()Jani Nikula1-1/+2
Avoid using GEM_WARN_ON() in display code. Signed-off-by: Jani Nikula <[email protected]> Reviewed-by: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/593285450602c259b6985972d68511190c754bf5.1694684044.git.jani.nikula@intel.com
2023-09-15drm/i915/fbc: replace GEM_BUG_ON() to drm_WARN_ON()Jani Nikula1-6/+8
Avoid using GEM_BUG_ON() in display code. Signed-off-by: Jani Nikula <[email protected]> Reviewed-by: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/a7d53a403822b43c7d78689a10480b47ccc0534d.1694684044.git.jani.nikula@intel.com
2023-09-15drm/i915/sdvo: Constify mapping structsVille Syrjälä1-3/+3
We aren't intending to mutate the SDVO device mapping structs, so make them const. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Jani Nikula <[email protected]>
2023-09-15drm/i915/hdmi: Remove old i2c symlinkVille Syrjälä1-25/+0
Remove the i915 specific i2c-N symlink from HDMI connectors. This was added to sort of mirror the DP connectors that alreayd had their aux ch based i2c adapter sitting beneath them in the sysfs hierarchy. But now that we have the standard "ddc" symlink approach provided by the core let's switch to that fully. I don't think anything beyond igt depends on this. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Jani Nikula <[email protected]>
2023-09-15drm/i915/hdmi: Nuke hdmi->ddc_busVille Syrjälä2-5/+9
Remove the mostly redundant hdmi->ddc_bus. The only thing that needs it anymore is get_encoder_by_ddc_bus(), but that can be replaced with a slight detour through attached_connector+intel_gmbus_get_adapter(). Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Jani Nikula <[email protected]>
2023-09-15drm/i915/hdmi: Use connector->ddc everwhereVille Syrjälä2-26/+14
We already populate connector->ddc for HDMI ports, but so far we've not taken full advantage of it. Do that by eliminating a bunch of intel_gmbus_get_adapter() lookups. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Jani Nikula <[email protected]>
2023-09-15drm/i915/mst: Populate connector->ddcVille Syrjälä1-2/+4
Populate connector->ddc, and thus create the "ddc" symlink in sysfs for DP MST connectors. TODO: test that this actually works References: https://gitlab.freedesktop.org/drm/intel/-/issues/3605 Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Jani Nikula <[email protected]>
2023-09-15drm/i915/dp: Populate connector->ddcVille Syrjälä1-4/+5
Populate connector->ddc, and thus create the "ddc" symlink in sysfs for analog DP SST connectors. Let's also reorder intel_dp_aux_init() vs. drm_connector_init_with_ddc() a bit to make sure the i2c aux ch is at least somewhat populated before we pass it on, though drm_connector_init_with_ddc() does not actually do anything with it. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Jani Nikula <[email protected]>
2023-09-15drm/i915/dvo: Populate connector->ddcVille Syrjälä1-6/+5
Populate connector->ddc, and thus create the "ddc" symlink in sysfs for DVO connectors. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Jani Nikula <[email protected]>
2023-09-15drm/i915/crt: Populate connector->ddcVille Syrjälä1-7/+9
Populate connector->ddc, and thus create the "ddc" symlink in sysfs for analog VGA connectors. As a bonus we can replace a bunch of intel_gmbus_get_adapter() lookups with just the connector->ddc pointer. Sadly one extra lookup still remains due to the g4x DVI-I shenanigans. We could perhaps consider borrowing the ddc proxy idea from SDVO to deal with that in a perhaps nicer way, but can't really be bothered right now at least. Also not sure exposing such a dual ddc bus to userspace would be quite wise. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Jani Nikula <[email protected]>
2023-09-15drm/i915/lvds: Populate connector->ddcVille Syrjälä1-12/+11
Populate connector->ddc, and thus create the "ddc" symlink in sysfs for the LVDS port. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Jani Nikula <[email protected]>
2023-09-15drm/i915: Call the DDC bus i2c adapter "ddc"Ville Syrjälä6-58/+51
Rename the various names we've used for the DDC bus i2c adapter ("i2c", "adapter", etc.) to just "ddc". This differentiates it from the various other i2c busses we might have (DSI panel stuff, DVO control bus, etc.). v2: Don't add a bogus drm_get_edid() call (Jani) Reviewed-by: Jani Nikula <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-09-15Merge drm/drm-next into drm-intel-nextJani Nikula3-8/+3
Sync to v6.6-rc1. Signed-off-by: Jani Nikula <[email protected]>
2023-09-14drm/i915/dsc: Fix pic_width readoutSuraj Kandpal1-1/+1
pic_width when written into the PPS register is divided by the no. of vdsc instances first but the actual variable that we compare it to does not change i.e vdsc_cfg->pic_width hence when reading the register back for pic_width it needs to be multiplied by num_vdsc_instances rather than being divided. Fixes: 8b70b5691704 ("drm/i915/vdsc: Fill the intel_dsc_get_pps_config function") Signed-off-by: Suraj Kandpal <[email protected]> Reviewed-by: Chaitanya Kumar Borah <[email protected]> Signed-off-by: Animesh Manna <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-09-13drm/i915: Introduce crtc_state->enhanced_framingVille Syrjälä8-7/+29
Track DP enhanced framing properly in the crtc state instead of relying just on the cached DPCD everywhere, and hook it up into the state check and dump. v2: Actually set enhanced_framing in .compute_config() Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Luca Coelho <[email protected]>
2023-09-13drm/i915: Reduce combo PHY log spamVille Syrjälä1-9/+8
We always check whether combo PHYs need to be re-initialized after disabling DC states, which leads to log spam. Switch things around so that we only log something when we actually have to re-initialized a PHY. The log spam was exacerbated by commit 41b4c7fe72b6 ("drm/i915: Disable DC states for all commits") since we now disable DC states far more often. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Luca Coelho <[email protected]>
2023-09-13drm/i915: Stop spamming the logs with PLL stateVille Syrjälä1-2/+0
encoder->get_config() is not the place where the state should be dumped. Get rid of the spam. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Luca Coelho <[email protected]>
2023-09-13drm/i915: Split some long lines in hsw_fdi_link_train()Ville Syrjälä1-2/+7
Split some overly long lines in hsw_fdi_link_train(). Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Luca Coelho <[email protected]>
2023-09-13drm/i915: Fix FEC state dumpVille Syrjälä2-10/+5
Stop dumping state while reading it out. We have a proper place for that stuff. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Luca Coelho <[email protected]>
2023-09-13drm/i915: Fix FEC pipe A vs. DDI A mixupVille Syrjälä1-2/+2
On pre-TGL FEC is a port level feature, not a transcoder level feature, and it's DDI A which doesn't have it, not trancoder A. Check for the correct thing when determining whether FEC is supported or not. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Luca Coelho <[email protected]>
2023-09-13drm/i915/mst: Read out FEC stateVille Syrjälä1-0/+5
The MST codepath is missing FEC readout. Add it. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Luca Coelho <[email protected]>
2023-09-12drm/i915: Only check eDP HPD when AUX CH is sharedVille Syrjälä3-1/+28
Apparently Acer Chromebook C740 (BDW-ULT) doesn't have the eDP HPD line properly connected, and thus fails the new HPD check during eDP probe. The result is that we lose the eDP output. I suspect all such machines would be Chromebooks or other Linux exclusive systems as the Windows driver likely wouldn't work either. I did check a few other BDW machines here and those do have eDP HPD connected, one of them even is a different Chromebook (Samus). To account for these funky machines let's skip the HPD check when it looks like the eDP port is the only one using that specific AUX channel. In case of multiple ports sharing the same AUX CH (eg. on Asrock B250M-HDV) we still do the check and thus should correctly ignore the eDP port in favor of the other DP port (usually a DP->VGA converter). v2: Don't oops during list iteration Cc: [email protected] Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/9264 Fixes: cfe5bdfb27fa ("drm/i915: Check HPD live state during eDP probe") Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Luca Coelho <[email protected]> (cherry picked from commit 70052100fabec5d8c1b09c9959817a2f4517e6b5) Signed-off-by: Rodrigo Vivi <[email protected]>
2023-09-11drm/i915/dsc: use REG_BIT, REG_GENMASK, and friends for PPS0 and PPS1Jani Nikula2-20/+22
Use the register helper macros for PPS0 and PPS1 register contents. Cc: Suraj Kandpal <[email protected]> Cc: Ankit Nautiyal <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Reviewed-by: Suraj Kandpal <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/0dfebe37a391a5ceb8bfae8e16383f1e5aef815d.1693933849.git.jani.nikula@intel.com
2023-09-11drm/i915/dsc: add the PPS number to the register content macrosJani Nikula2-149/+149
Improve clarity by specifying the PPS number in the register content macros. It's easier to notice if macros are being used for the wrong register. Cc: Suraj Kandpal <[email protected]> Cc: Ankit Nautiyal <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Reviewed-by: Suraj Kandpal <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/58de57b04ad2da5207f52c56c9e40663aaf16173.1693933849.git.jani.nikula@intel.com
2023-09-11drm/i915/dsc: clean up pps commentsJani Nikula2-43/+42
Unify comments to be the simple "PPS n" instead of all sorts of variants. Cc: Suraj Kandpal <[email protected]> Cc: Ankit Nautiyal <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Reviewed-by: Suraj Kandpal <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/915970973ef117fc8d47fbc57e8fa296235ad3e3.1693933849.git.jani.nikula@intel.com
2023-09-11drm/i915/dsc: drop redundant = 0 assignmentsJani Nikula1-28/+15
Directly assign the values instead of first assigning 0 and then |= the values. Cc: Suraj Kandpal <[email protected]> Cc: Ankit Nautiyal <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Reviewed-by: Suraj Kandpal <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/d752a148cc84558b76c8c3dacd9c0b2e0a4efd91.1693933849.git.jani.nikula@intel.com
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