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2024-08-16drm/amdgpu/gfx11: add a mutex for the gfx semaphoreAlex Deucher3-3/+10
This will be used in more places in the future so add a mutex. Acked-by: Vitaly Prosyak <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-08-16drm/amdgpu/gfx11: enter safe mode before touching CP_INT_CNTLAlex Deucher1-2/+2
Need to enter safe mode before touching GC MMIO. Acked-by: Vitaly Prosyak <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-08-16drm/amdgpu/gfx7: add ring reset callback for gfxAlex Deucher2-1/+76
Add ring reset callback for gfx. v2: fix operator precedence (kernel test robot) Acked-by: Vitaly Prosyak <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-08-16drm/amdgpu/gfx8: add ring reset callback for gfxAlex Deucher2-1/+75
Add ring reset callback for gfx. v2: fix operator precedence (kernel test robot) Acked-by: Vitaly Prosyak <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-08-16drm/amdgpu: add vcn_v5_0 ip dump supportSunil Khatri1-1/+75
Add support of vcn ip dump in the devcoredump for vcn_v5_0. Signed-off-by: Sunil Khatri <[email protected]> Acked-by: Leo Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-08-16drm/amdgpu: add print support for vcn_v3_0 ip dumpSunil Khatri1-1/+34
Add support for logging the registers in devcoredump buffer for vcn_v3_0. Signed-off-by: Sunil Khatri <[email protected]> Acked-by: Leo Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-08-16drm/amdgpu: add vcn_v3_0 ip dump supportSunil Khatri1-1/+77
Add support of vcn ip dump in the devcoredump for vcn_v3_0. Signed-off-by: Sunil Khatri <[email protected]> Acked-by: Leo Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-08-16drm/amdgpu: add vcn ip dump ptr in vcn global structSunil Khatri1-0/+3
Add pointer to the vcn ip dump in the vcn global structure to be accessible for all vcn version via global adev. Signed-off-by: Sunil Khatri <[email protected]> Acked-by: Leo Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-08-16drm/amd: Remove unused declarationsZhang Zekun2-9/+0
amdgpu_gart_table_vram_pin() and amdgpu_gart_table_vram_unpin() has been removed since commit 575e55ee4fbc ("drm/amdgpu: recover gart table at resume") remain the declarations untouched in the header files. Besides, amdgpu_dm_display_resume() has also beed removed since commit a80aa93de1a0 ("drm/amd/display: Unify dm resume sequence into a single call"). So, let's remove this unused declarations. Signed-off-by: Zhang Zekun <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-08-16drm/amdgpu: fixing rlc firmware loading failure issueYang Wang1-2/+3
Skip rlc firmware validation to ignore firmware header size mismatch issues. This restores the workaround added in commit 849e133c973c ("drm/amdgpu: Fix the null pointer when load rlc firmware") Fixes: 3af2c80ae2f5 ("drm/amdgpu: refine gfx10 firmware loading") Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3551 Signed-off-by: Yang Wang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-08-16drm/amdgpu: remove ME0 registers from mi300 dumpSunil Khatri1-37/+0
Remove ME0 registers from MI300 gfx_9_4_3 ipdump MI300 does not have gfx ME and hence those register are just empty one and could be dropped. Signed-off-by: Sunil Khatri <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-08-16drm/amdgpu/gfx9: use rlc safe mode for soft recoveryAlex Deucher1-0/+2
Protect the MMIO access with safe mode. Acked-by: Vitaly Prosyak <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-08-16drm/amdgpu/gfx9.4.3: use rlc safe mode for soft recoveryAlex Deucher1-0/+2
Protect the MMIO access with safe mode. Acked-by: Vitaly Prosyak <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-08-16drm/amdgpu/gfx9.4.3: use proper rlc safe mode helpersAlex Deucher1-4/+4
Rather than open coding it for the queue reset. Acked-by: Vitaly Prosyak <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-08-16drm/amdgpu/gfx9: use proper rlc safe mode helpersAlex Deucher1-4/+4
Rather than open coding it for the queue reset. Acked-by: Vitaly Prosyak <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-08-16drm/amdgpu/gfx9: add ring reset callback for gfxAlex Deucher1-0/+46
Add ring reset callback for gfx. Acked-by: Vitaly Prosyak <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-08-16drm/amdgpu/gfx9: per queue reset only on bare metalAlex Deucher2-0/+6
It's not supported under SR-IOV at the moment. Acked-by: Vitaly Prosyak <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-08-16drm/amdgpu/gfx9.4.3: implement reset_hw_queue for gfx9.4.3Jiadong Zhu1-0/+36
Using mmio to do queue reset. Enter safe mode before writing mmio registers. v2: set register instance offset according to xcc id. Acked-by: Vitaly Prosyak <[email protected]> Signed-off-by: Jiadong Zhu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-08-16drm/amdgpu/gfx9: implement reset_hw_queue for gfx9Jiadong Zhu1-0/+37
Using mmio to do queue reset. Enter safe mode when writing registers. Acked-by: Vitaly Prosyak <[email protected]> Signed-off-by: Jiadong Zhu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-08-16drm/amdgpu/gfx: add a new kiq_pm4_funcs callback for reset_hw_queueJiadong Zhu1-0/+4
Add reset_hw_queue in kiq_pm4_funcs callbacks. Acked-by: Vitaly Prosyak <[email protected]> Signed-off-by: Jiadong Zhu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-08-16drm/amdgpu/gfx_9.4.3: wait for reset done before remapJiadong Zhu1-6/+33
There is a racing condition that cp firmware modifies MQD in reset sequence after driver updates it for remapping. We have to wait till CP_HQD_ACTIVE becoming false then remap the queue. v2: fix KIQ locking (Alex) v3: fix KIQ locking harder Acked-by: Vitaly Prosyak <[email protected]> Signed-off-by: Jiadong Zhu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-08-16drm/amdgpu/gfx9.4.3: remap queue after reset successfullyJiadong Zhu1-9/+27
Kiq command unmap_queues only does the dequeueing action. We have to map the queue back with clean mqd. Acked-by: Vitaly Prosyak <[email protected]> Signed-off-by: Jiadong Zhu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-08-16drm/amdgpu/gfx9.4.3: add ring reset callbackAlex Deucher1-0/+38
Add ring reset callback for compute. Acked-by: Vitaly Prosyak <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-08-16drm/amdgpu/gfx9: wait for reset done before remapJiadong Zhu1-5/+31
There is a racing condition that cp firmware modifies MQD in reset sequence after driver updates it for remapping. We have to wait till CP_HQD_ACTIVE becoming false then remap the queue. v2: fix KIQ locking (Alex) v3: fix KIQ locking harder Acked-by: Vitaly Prosyak <[email protected]> Signed-off-by: Jiadong Zhu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-08-16drm/amdgpu/gfx9: remap queue after reset successfullyJiadong Zhu1-9/+27
Kiq command unmap_queues only does the dequeueing action. We have to map the queue back with clean mqd. Acked-by: Vitaly Prosyak <[email protected]> Signed-off-by: Jiadong Zhu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-08-16drm/amdgpu/gfx9: add ring reset callbackAlex Deucher1-0/+38
Add ring reset callback for compute. Acked-by: Vitaly Prosyak <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-08-16drm/amdgpu: increase the reset counter for the queue resetPrike Liang1-0/+1
Update the reset counter for the amdgpu_cs_query_reset_state() Acked-by: Vitaly Prosyak <[email protected]> Signed-off-by: Prike Liang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-08-16drm/amdgpu: add per ring reset support (v5)Alex Deucher1-0/+19
If a specific job is hung, try and reset just the ring associated with the job. v2: move to amdgpu_job.c v3: fix drm_sched_stop() handling when ring reset fails v4: drop unnecessary amdgpu_fence_driver_clear_job_fences() and drm_sched_increase_karma() v5: rework sched_stop handling Acked-by: Vitaly Prosyak <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-08-16drm/amdgpu: add new ring reset callbackAlex Deucher1-0/+2
Use this to reset just a single ring. Acked-by: Vitaly Prosyak <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-08-16drm/amdgpu: Return earlier in amdgpu_sw_ring_ib_end if mcbp is offSoham Dandapat1-1/+1
As we don't trigger preemption is sw ring muxer when mcbp is disabled,so return earlier in amdgpu_sw_ring_ib_end function if mcbp is disabled ,not required to call amdgpu_ring_mux_end_ib Signed-off-by: Soham Dandapat <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-08-16drm/amdgpu: add cp queue registers print for gfx9_4_3Sunil Khatri1-2/+40
Add gfx9_4_3 print support of CP queue registers for all queues to be used by devcoredump. Signed-off-by: Sunil Khatri <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-08-16drm/amdgpu: add cp queue registers for gfx9_4_3 ipdumpSunil Khatri1-3/+95
Add gfx9 support of CP queue registers for all queues to be used by devcoredump. Signed-off-by: Sunil Khatri <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-08-16drm/amdgpu: Use backlight power constantsThomas Zimmermann1-1/+1
Replace FB_BLANK_ constants with their counterparts from the backlight subsystem. The values are identical, so there's no change in functionality or semantics. Signed-off-by: Thomas Zimmermann <[email protected]> Cc: Alex Deucher <[email protected]> Cc: "Christian König" <[email protected]> Cc: Xinhui Pan <[email protected]> Acked-by: Alex Deucher <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-08-13drm/amd/amdgpu: add HDP_SD support on gc 12.0.0/1Kenneth Feng1-0/+2
add HDP_SD support on gc 12.0.0/1 Signed-off-by: Kenneth Feng <[email protected]> Reviewed-by: Yang Wang <[email protected]> Signed-off-by: Alex Deucher <[email protected]> (cherry picked from commit 61cffacb3a1c590b15c0e9ff987de02d293e0dd8)
2024-08-13drm/amdgpu: Update kmd_fw_shared for VCN5Yinjie Yao1-1/+4
kmd_fw_shared changed in VCN5 Signed-off-by: Yinjie Yao <[email protected]> Reviewed-by: Ruijing Dong <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]> (cherry picked from commit aa02486fb18cecbaca0c4fd393d1a03f1d4c3f9a)
2024-08-13drm/amd/amdgpu: command submission parser for JPEGDavid (Ming Qiang) Wu5-2/+76
Add JPEG IB command parser to ensure registers in the command are within the JPEG IP block. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: David (Ming Qiang) Wu <[email protected]> Signed-off-by: Alex Deucher <[email protected]> (cherry picked from commit a7f670d5d8e77b092404ca8a35bb0f8f89ed3117) Cc: [email protected]
2024-08-13drm/amdgpu/mes12: fix suspend issueJack Xiao2-26/+23
Use mes pipe to unmap kcq and kgq. Signed-off-by: Jack Xiao <[email protected]> Acked-by: Alex Deucher <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]> (cherry picked from commit f7fb9d677faf0460131bc2af15afd766d48a1f47)
2024-08-13drm/amdgpu/mes12: sw/hw fini for unified mesJack Xiao1-11/+20
Free memory for two pipes and unmap pipe0 via pipe1. Signed-off-by: Jack Xiao <[email protected]> Acked-by: Alex Deucher <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]> (cherry picked from commit 98cae695a8ae0e4291b1fa7feef9b54fabefe885)
2024-08-13drm/amdgpu/mes12: configure two pipes hardware resourcesJack Xiao4-64/+81
Configure two pipes with different hardware resources. Signed-off-by: Jack Xiao <[email protected]> Acked-by: Alex Deucher <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]> (cherry picked from commit ea5d6db17a8e3635ad91e8c53faa1fdc9570fbbb)
2024-08-13drm/amdgpu/mes12: adjust mes12 sw/hw init for multiple pipesJack Xiao1-44/+62
Adjust mes12 sw/hw initiailization for both pipe0 and pipe1 enablement. The two pipes are almost identical pipe. Pipe0 behaves like schq and pipe1 like kiq, pipe0 was mapped by pipe1. Signed-off-by: Jack Xiao <[email protected]> Acked-by: Alex Deucher <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]> (cherry picked from commit aa539da8aff07ab08def6490e8c9b441439e70ba)
2024-08-13drm/amdgpu/mes12: add mes pipe switch supportJack Xiao1-26/+33
Add mes pipe switch to let caller choose pipe to submit packet. Signed-off-by: Jack Xiao <[email protected]> Acked-by: Alex Deucher <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]> (cherry picked from commit b2dee0837a4be63e8d3e00550a9f057644f962c4)
2024-08-13drm/amdgpu/mes12: load unified mes fw on pipe0 and pipe1Jack Xiao2-25/+4
Enable unified mes firmware to load on pipe0 and pipe1. Signed-off-by: Jack Xiao <[email protected]> Acked-by: Alex Deucher <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]> (cherry picked from commit e69c2dd7534f3fcabf7bb801db2a7ac71e7e5da6)
2024-08-13drm/amdgpu/mes: add multiple mes ring instances supportJack Xiao9-44/+47
Add multiple mes ring instances in mes structure to support multiple mes pipes. Signed-off-by: Jack Xiao <[email protected]> Acked-by: Alex Deucher <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]> (cherry picked from commit c7d4355648ffa02a1551495b05c71ea6c884d29c)
2024-08-13drm/amdgpu/mes12: update mes_v12_api_def.hJack Xiao1-1/+6
Update mes12 api definition. Signed-off-by: Jack Xiao <[email protected]> Acked-by: Alex Deucher <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]> (cherry picked from commit 2ab5dc59177419d8a49e89585e82ff41524270fc)
2024-08-13drm/amdgpu: Actually check flags for all context ops.Bas Nieuwenhuizen1-0/+8
Missing validation ... Checked libdrm and it clears all the structs, so we should be safe to just check everything. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Alex Deucher <[email protected]> (cherry picked from commit c6b86421f1f9ddf9d706f2453159813ee39d0cf9) Cc: [email protected]
2024-08-13drm/amdgpu/jpeg4: properly set atomics vmid fieldAlex Deucher1-2/+2
This needs to be set as well if the IB uses atomics. Reviewed-by: Leo Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]> (cherry picked from commit c6c2e8b6a427d4fecc7c36cffccb908185afcab2) Cc: [email protected]
2024-08-13drm/amdgpu/jpeg2: properly set atomics vmid fieldAlex Deucher1-2/+2
This needs to be set as well if the IB uses atomics. Reviewed-by: Leo Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]> (cherry picked from commit 35c628774e50b3784c59e8ca7973f03bcb067132) Cc: [email protected]
2024-08-13drm/amd/display: Adjust cursor positionRodrigo Siqueira1-1/+1
[why & how] When the commit 9d84c7ef8a87 ("drm/amd/display: Correct cursor position on horizontal mirror") was introduced, it used the wrong calculation for the position copy for X. This commit uses the correct calculation for that based on the original patch. Fixes: 9d84c7ef8a87 ("drm/amd/display: Correct cursor position on horizontal mirror") Cc: Mario Limonciello <[email protected]> Cc: Alex Deucher <[email protected]> Acked-by: Wayne Lin <[email protected]> Signed-off-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Tom Chung <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]> (cherry picked from commit 8f9b23abbae5ffcd64856facd26a86b67195bc2f) Cc: [email protected]
2024-08-13drm/amd/display: fix cursor offset on rotation 180Melissa Wen1-1/+1
[why & how] Cursor gets clipped off in the middle of the screen with hw rotation 180. Fix a miscalculation of cursor offset when it's placed near the edges in the pipe split case. Cursor bugs with hw rotation were reported on AMD issue tracker: https://gitlab.freedesktop.org/drm/amd/-/issues/2247 The issues on rotation 270 was fixed by: https://lore.kernel.org/amd-gfx/[email protected]/ that partially addressed the rotation 180 too. So, this patch is the final bits for rotation 180. Reported-by: Xaver Hugl <[email protected]> Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/2247 Reviewed-by: Harry Wentland <[email protected]> Fixes: 9d84c7ef8a87 ("drm/amd/display: Correct cursor position on horizontal mirror") Signed-off-by: Melissa Wen <[email protected]> Signed-off-by: Hamza Mahfooz <[email protected]> Signed-off-by: Tom Chung <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]> (cherry picked from commit 1fd2cf090096af8a25bf85564341cfc21cec659d) Cc: [email protected]
2024-08-13drm/amd/display: Fix MST BW calculation RegressionFangzhi Zuo2-9/+27
[Why & How] Revert commit 8b2cb32cf0c6 ("drm/amd/display: FEC overhead should be checked once for mst slot nums") Because causes bw calculation regression Cc: [email protected] Cc: [email protected] Reported-by: [email protected] Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3495 Closes: https://bugzilla.suse.com/show_bug.cgi?id=1228093 Reviewed-by: Wayne Lin <[email protected]> Signed-off-by: Fangzhi Zuo <[email protected]> Signed-off-by: Tom Chung <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]> (cherry picked from commit 12dbb3ed212fc7655fce421542a5add637f8af7a) Cc: [email protected]
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