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2022-01-19drm/amdkfd: enable heavy-weight TLB flush on ArcturusEric Huang2-8/+8
SDMA FW fixes the hang issue for adding heavy-weight TLB flush on Arcturus, so we can enable it. Signed-off-by: Eric Huang <[email protected]> Acked-by: Alex Deucher <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-19drm/amdgpu: fix broken debug sdma vram access functionJonathan Kim1-7/+8
Debug VRAM access through SDMA has several broken parts resulting in silent MMIO fallback. BO kernel creation takes the location of the cpu addr pointer, not the pointer itself for address kmap. drm_dev_enter return true on success so change access check. The source BO is reserved but not pinned so find the address using the cursor offset relative to its memory domain start. Signed-off-by: Jonathan Kim <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-19drm/amdgpu: remove gart.ready flagChristian König11-137/+52
That's just a leftover from old radeon days and was preventing CS and GART bindings before the hardware was initialized. But nowdays that is perfectly valid. The only thing we need to warn about are GART binding before the table is even allocated. Signed-off-by: Christian König <[email protected]> Reviewed-by: Guchun Chen <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-19drm/amdgpu: remove unused variable warningStanley.Yang2-29/+0
Signed-off-by: Stanley.Yang <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-19drm/amdgpu: remove unused variablemziya1-4/+0
Remove set but unused variable. warning: variable 'umc_reg_offset' set but not used Signed-off-by: mziya <[email protected]> Reported-by: kernel test robot <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-19drm/amdgpu: Remove repeated callsyipechai1-3/+1
Remove repeated calls. Signed-off-by: yipechai <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Reviewed-by: Tao Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-19drm/amdgpu: modify a pair of functions for the pcie port wreg/rregXiaojian Du3-32/+39
This patch will modify a pair of functions for pcie port wreg/rreg. AMD GPU have had an independent NBIO block from SOC15 arch. If the dirver wants to read/write the address space of the pcie devices, it has to go through the NBIO block. This patch will move the pcie port wreg/rreg functions to "amdgpu_device.c", so that to reuse the functions on the future GPU ASICs. Signed-off-by: Xiaojian Du <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-19drm/amdgpu: add vram check function for GMCXiaojian Du7-5/+74
This patch will add vram check function for GMC block. It will write pattern data to the vram and then read back from the vram, so that to verify the work status of vram. This patch will cover gmc v6/7/8/9/10. Signed-off-by: Xiaojian Du <[email protected]> Reviewed-by: Huang Rui <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-18amdgpu/amdgpu_psp: remove unneeded ret variableMinghao Chi1-5/+1
Return value from amdgpu_bo_create_kernel() directly instead of taking this in another redundant variable. Reported-by: Zeal Robot <[email protected]> Signed-off-by: Minghao Chi <[email protected]> Signed-off-by: CGEL ZTE <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-18drm/amdgpu: Add missing pm_runtime_put_autosuspendYongzhi Liu1-1/+3
pm_runtime_get_sync() increments the runtime PM usage counter even when it returns an error code, thus a matching decrement is needed on the error handling path to keep the counter balanced. Signed-off-by: Yongzhi Liu <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-18drm/amd/display: move calcs folder into DMLIsabella Basso11-71/+11
The calcs folder has FPU code on it, which should be isolated inside the DML folder as per https://patchwork.freedesktop.org/series/93042/. This commit aims single-handedly to correct the location of such FPU code and does not refactor any functions. Changes since v2: - Corrected problems to compile when DCN was disabled. Reviewed-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Isabella Basso <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-18drm/amd/display: 3.2.169Aric Cyr1-1/+1
This version brings along following fixes: - Organize FPU associated code to DML - Modify SMU_TIMEOUT macro - Organize dcn201 code - Address DS stays disabled problem under specific scenario - Fix black screen issue - Update DML to rev.99 - Address problem of eDP hot-plug feature Acked-by: Wayne Lin <[email protected]> Signed-off-by: Aric Cyr <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-18drm/amd/display: [FW Promotion] Release 0.0.100.0Anthony Koo1-2/+2
Reviewed-by: Aric Cyr <[email protected]> Acked-by: Wayne Lin <[email protected]> Signed-off-by: Anthony Koo <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-18drm/amd/display: Add signal type check when verify stream backends sameDale Zhao1-0/+3
[Why] For allow eDP hot-plug feature, the stream signal may change to VIRTUAL when plug-out and back to eDP when plug-in. OS will still setPathMode with same timing for each plugging, but eDP gets no stream update as we don't check signal type changing back as keeping it VIRTUAL. It's also unsafe for future cases that stream signal is switched with same timing. [How] Check stream signal type change include previous HDMI signal case. Reviewed-by: Aric Cyr <[email protected]> Acked-by: Wayne Lin <[email protected]> Signed-off-by: Dale Zhao <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-18drm/amd/display: update dml to rev.99 and smu clk_table w/aCharlene Liu2-3/+28
[why] 1. update dml to rev.99 2. add smu clk table w/a: smu gives 1 dtm level with mismatch votage table which causes multiple issues. Reviewed-by: Nicholas Kazlauskas <[email protected]> Acked-by: Wayne Lin <[email protected]> Signed-off-by: Charlene Liu <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-18drm/amd/display: Fix black screen issue on memory clock switch enFelipe Clark3-1/+9
[WHY] With some monitors when multi plane overlay is enabled the memory clock switching mechanism has to change and, due to an error in the initialization sequence, it may cause a black screen. [HOW] Change the firmware assisted memory clock switch initialization and tear-down sequence utilizing the prepare_bandwidth and optimize_bandwidth contexts. Reviewed-by: Aric Cyr <[email protected]> Acked-by: Wayne Lin <[email protected]> Signed-off-by: Felipe Clark <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-18drm/amd/display: DCEFCLK DS on CLK initChris Park1-0/+1
[Why] On HG APU + dGPU scenario with no display to dGPU, DS stays disabled due to no display present. This problem can be worked around by DAL calling DCEFCLK DS message to SMU on clk init. [How] Call DCEFCLK DS message to SMU on clk init. Reviewed-by: Jun Lei <[email protected]> Acked-by: Wayne Lin <[email protected]> Signed-off-by: Chris Park <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-18drm/amd/display: modify SMU_TIMEOUT macro.Ian Chen1-2/+2
[WHY] If some SMU features are not enabled, SMU will return fail to that message. [HOW] SMU_TIMEOUT macro will treat "return fail" as timeout also. Correct the macro to only report timeout case. Reviewed-by: Jun Lei <[email protected]> Acked-by: Wayne Lin <[email protected]> Signed-off-by: Ian Chen <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-18drm/amd/display: move FPU associated DCN302 code to DML folder (#2266)Jasdeep Dhillon6-318/+404
[Why & How] As part of the FPU isolation work documented in https://patchwork.freedesktop.org/series/93042/, isolate code that uses FPU in DCN302 to DML, where all FPU code should locate. Co-authored-by: Jasdeep Dhillon <[email protected]> Reviewed-by: Rodrigo Siqueira <[email protected]> Acked-by: Wayne Lin <[email protected]> Signed-off-by: Jasdeep Dhillon <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-18drm/amd/display: 3.2.168Aric Cyr1-1/+1
This version brings improvements in the following: - Drop unnecessary DCN guards - Improve Z9 interface Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Aric Cyr <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-18drm/amd/display: support new PMFW interface to disable Z9 onlyEric Yang5-10/+22
[Why] Need to disable Z9 on configurations that only support Z10 [How] Support new PMFW interface to disable Z9 Reviewed-by: Nicholas Kazlauskas <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Eric Yang <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-18drm/amd/display: adjust bit comparison to be more type safeEric Yang1-1/+1
Might potentially have truncation problem with the implicit casting Reviewed-by: Nicholas Kazlauskas <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Eric Yang <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-18drm/amd/display: Disabled seamless boots on DP and renamed ↵Jarif Aftab6-25/+10
power_down_display_on_boot [WHY] - We only ever want seamless boots on eDPs - The naming and logic did not match the context [HOW] - Removed unnecessary if statements - Renamed power_down_display_on_boot to seamless_boot_edp_requested and swapped the logic Reviewed-by: Martin Leung <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Jarif Aftab <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-18drm/amd/pm: Enable sysfs required by rocm-smi tool for One VF modeMarina Nikolic2-16/+3
Enable power level, power limit and fan speed information retrieval in one VF mode. This is required so that tool ROCM-SMI can provide this information to users. Signed-off-by: Marina Nikolic <[email protected]> Acked-by: Evan Quan <[email protected]> Reviewed-by: Kevin Wang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-18drm/amd/amdgpu: fixing read wrong pf2vf data in SRIOVJingwen Chen2-14/+8
[Why] This fixes 892deb48269c ("drm/amdgpu: Separate vf2pf work item init from virt data exchange"). we should read pf2vf data based at mman.fw_vram_usage_va after gmc sw_init. commit 892deb48269c breaks this logic. [How] calling amdgpu_virt_exchange_data in amdgpu_virt_init_data_exchange to set the right base in the right sequence. v2: call amdgpu_virt_init_data_exchange after gmc sw_init to make data exchange workqueue run v3: clean up the code logic v4: add some comment and make the code more readable Fixes: 892deb48269c ("drm/amdgpu: Separate vf2pf work item init from virt data exchange") Signed-off-by: Jingwen Chen <[email protected]> Reviewed-by: Horace Chen <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-18drm/amdgpu: Fix the code style warnings in hdp xgmi mca and umcyipechai3-6/+8
drm/amdgpu: Fix the code style warnings in hdp xgmi mca and umc: 1. WARNING: missing space after struct definition. 2. WARNING: please, no space before tabs. 3. WARNING: line length of xxx exceeds 100 columns. 4. ERROR: "foo* bar" should be "foo *bar". 5. ERROR: space required before the open parenthesis '('. 6. ERROR: space prohibited after that open parenthesis '('. Signed-off-by: yipechai <[email protected]> Reviewed-by: Tao Zhou <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-18drm/amdgpu: Fix the code style warnings in sdmayipechai2-7/+7
Fix the code style warnings in sdma: 1. WARNING: Missing a blank line after declarations. 2. ERROR: that open brace { should be on the previous line. 3. WARNING: unnecessary whitespace before a quoted newline. 4. ERROR: space required after that ',' (ctx:VxV). Signed-off-by: yipechai <[email protected]> Reviewed-by: Tao Zhou <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-18drm/amdgpu: Fix the code style warnings in gmcyipechai2-2/+2
Fix the code style warnings in gmc: ERROR: space required after that ',' (ctx:VxV). Signed-off-by: yipechai <[email protected]> Reviewed-by: Tao Zhou <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-18drm/amdgpu: Fix the code style warnings in gfxyipechai2-3/+3
Fix the code style warnings in gfx: 1. WARNING: suspect code indent for conditional statements. 2. ERROR: spaces required around that '=' (ctx:WxV). Signed-off-by: yipechai <[email protected]> Reviewed-by: Tao Zhou <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-18drm/amdgpu: Fix the code style warnings in amdgpu_rasyipechai2-21/+30
Fix the code style warnings in amdgpu_ras: 1. ERROR: space required before the open parenthesis '('. 2. WARNING: line length of xxx exceeds 100 columns. 3. ERROR: "foo* bar" should be "foo *bar". 4. WARNING: unnecessary whitespace before a quoted newline. 5. WARNING: space prohibited before semicolon. 6. WARNING: suspect code indent for conditional statements. 7. WARNING: braces {} are not necessary for single statement blocks. Signed-off-by: yipechai <[email protected]> Reviewed-by: Tao Zhou <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-18drm/amdgpu: apply vcn harvest quirkGuchun Chen1-5/+27
This is a following patch to apply the workaround only on those boards with a bad harvest table in ip discovery. Signed-off-by: Guchun Chen <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-18drm/amdgpu: drop redundant check of ip discovery_binGuchun Chen1-5/+0
Early check in amdgpu_discovery_reg_base_init promises this. Signed-off-by: Guchun Chen <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-18drm/amdgpu: handle denied inject error into critical regions v2Stanley.Yang3-3/+11
Changed from v1: remove unused brace Signed-off-by: Stanley.Yang <[email protected]> Reviewed-by: Tao Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-18drm/amd/pm: add message smu to get ecc_tablemziya2-0/+71
support ECC TABLE message, this table include umc ras error count and error address V2: Return after smu version check fail V3: Return -EOPNOTSUPP, if fail to get smc ver. V4: ECCTABLE typo corrected and sentence rephrased. Signed-off-by: mziya <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-18drm/amdgpu: add new query interface for umc_v8_7 blockmziya1-5/+155
add smu message query error information interface, function name align with IP version number V2: Removed unused err cnt entry Signed-off-by: mziya <[email protected]> Acked-by: Evan Quan <[email protected]> Reviewed-by: Stanley.Yang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-18drm/amd/pm: Update smu driver interface for sienna cichlidmziya1-3/+21
update smu driver if version to 0x40 V2: Interface version append with sienna_cichlid V3: Aligned with latest driver interface. Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: mziya <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-14drm/amd/display: Revert W/A for hard hangs on DCN20/DCN21Mario Limonciello8-79/+3
The WA from commit 2a50edbf10c8 ("drm/amd/display: Apply w/a for hard hang on HPD") and commit 1bd3bc745e7f ("drm/amd/display: Extend w/a for hard hang on HPD to dcn20") causes a regression in s0ix where the system will fail to resume properly on many laptops. Pull the workarounds out to avoid that s0ix regression in the common case. This HPD hang happens with an external device in special circumstances and a new W/A will need to be developed for this in the future. Cc: Qingqing Zhuo <[email protected]> Reported-by: Scott Bruce <[email protected]> Reported-by: Chris Hixon <[email protected]> Reported-by: [email protected] Link: https://bugzilla.kernel.org/show_bug.cgi?id=215436 Link: https://gitlab.freedesktop.org/drm/amd/-/issues/1821 Link: https://gitlab.freedesktop.org/drm/amd/-/issues/1852 Fixes: 2a50edbf10c8 ("drm/amd/display: Apply w/a for hard hang on HPD") Fixes: 1bd3bc745e7f ("drm/amd/display: Extend w/a for hard hang on HPD to dcn20") Reviewed-by: Nicholas Kazlauskas <[email protected]> Signed-off-by: Mario Limonciello <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-14drm/amdgpu: drop flags check for CHIP_IP_DISCOVERYAlex Deucher1-5/+0
Support for IP based discovery is in place now so this check is no longer required. Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-14drm/amdgpu: Fix rejecting Tahiti GPUsLukas Fink1-1/+1
eb4fd29afd4a ("drm/amdgpu: bind to any 0x1002 PCI diplay class device") added generic bindings to amdgpu so that that it binds to all display class devices with VID 0x1002 and then rejects those in amdgpu_pci_probe. Unfortunately it reuses a driver_data value of 0 to detect those new bindings, which is already used to denote CHIP_TAHITI ASICs. The driver_data value given to those new bindings was changed in dd0761fd24ea1 ("drm/amdgpu: set CHIP_IP_DISCOVERY as the asic type by default") to CHIP_IP_DISCOVERY (=36), but it seems that the check in amdgpu_pci_probe was forgotten to be changed. Therefore, it still rejects Tahiti GPUs. Link: https://gitlab.freedesktop.org/drm/amd/-/issues/1860 Fixes: eb4fd29afd4a ("drm/amdgpu: bind to any 0x1002 PCI diplay class device") Signed-off-by: Lukas Fink <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-14drm/amdgpu: don't do resets on APUs which don't support itAlex Deucher2-0/+8
It can cause a hang. This is normally not enabled for GPU hangs on these asics, but was recently enabled for handling aborted suspends. This causes hangs on some platforms on suspend. Fixes: daf8de0874ab5b ("drm/amdgpu: always reset the asic in suspend (v2)") Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1858 Signed-off-by: Alex Deucher <[email protected]>
2022-01-14drm/amdgpu: invert the logic in amdgpu_device_should_recover_gpu()Alex Deucher1-27/+17
Rather than opting into GPU recovery support, default to on, and opt out if it's not working on a particular GPU. This avoids the need to add new asics to this list since this is a core feature. Reviewed-by: Evan Quan <[email protected]> Reviewed-by: Guchun Chen <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-14drm/amdgpu: Enable recovery on yellow carpCHANDAN VURDIGERE NATARAJ1-0/+1
Add yellow carp to devices which support recovery Signed-off-by: CHANDAN VURDIGERE NATARAJ <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-14drm/amd/display: Remove redundant initialization of dpg_widthJiapeng Chong1-1/+1
dpg_width is being initialized to width but this is never read as dpg_width is overwritten later on. Remove the redundant initialization. Cleans up the following clang-analyzer warning: drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_link_dp.c:6020:8: warning: Value stored to 'dpg_width' during its initialization is never read [clang-analyzer-deadcode.DeadStores]. Reported-by: Abaci Robot <[email protected]> Signed-off-by: Jiapeng Chong <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-14drm/amd/pm: Replace one-element array with flexible-array memberChangcheng Deng1-1/+1
There is a regular need in the kernel to provide a way to declare having a dynamically sized set of trailing elements in a structure. Kernel code should always use "flexible array members" for these cases. The older style of one-element or zero-length arrays should no longer be used. Reference: https://www.kernel.org/doc/html/latest/process/deprecated.html#zero-length-and-one-element-arrays Reported-by: Zeal Robot <[email protected]> Signed-off-by: Changcheng Deng <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-14drm/amd/pm: fix null ptr accessFlora Cui2-1/+4
check null ptr first before access its element v2: check adev->pm.dpm_enabled early in amdgpu_debugfs_pm_init() Signed-off-by: Flora Cui <[email protected]> Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-14drm/amdgpu: fix compile warning for ras_block_match_defaultyipechai1-1/+2
fix compile warning for ras_block_match_default Signed-off-by: yipechai <[email protected]> Reviewed-by: Tao Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-14drm/amdgpu: Use ARRAY_SIZE to get array lengthyipechai1-1/+2
Use ARRAY_SIZE to get array length. Signed-off-by: yipechai <[email protected]> Reviewed-by: Tao Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-14drm/amdgpu: clean up some inconsistent indentingYang Li2-4/+6
Eliminate the follow smatch warnings: drivers/gpu/drm/amd/amdgpu/amdgpu_device.c:3504 amdgpu_device_init() warn: inconsistent indenting drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c:1716 amdgpu_ras_error_status_query() warn: if statement not indented drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c:1058 amdgpu_ras_error_inject() warn: inconsistent indenting Reported-by: Abaci Robot <[email protected]> Reviewed-by: Guchun Chen <[email protected]> Signed-off-by: Yang Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-14drm/amdgpu: remove unneeded semicolonYang Li1-1/+1
Eliminate the following coccicheck warning: ./drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c:2725:16-17: Unneeded semicolon Reported-by: Abaci Robot <[email protected]> Reviewed-by: Guchun Chen <[email protected]> Signed-off-by: Yang Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-14drm/amdgpu: No longer insert ras blocks into ras_list if it already exists ↵yipechai1-0/+8
in ras_list No longer insert ras blocks into ras_list if it already exists in ras_list. Signed-off-by: yipechai <[email protected]> Reviewed-by: Tao Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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