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path: root/drivers/gpu/drm/amd
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2022-11-29swsmu/amdgpu_smu: Fix the wrong if-conditionYu Songping1-1/+1
The logical operator '&&' will make smu->ppt_funcs->set_gfx_power_up_by_imu segment fault when smu->ppt_funcs is NULL. Signed-off-by: Yu Songping <[email protected]> Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-11-29drm/amdgpu: remove redundant NULL checkYushan Zhou1-20/+16
release_firmware() checks whether firmware pointer is NULL. Remove the redundant NULL check in psp_sw_fini(). Signed-off-by: Yushan Zhou <[email protected]> Reviewed-by: Luben Tuikov <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-11-29amdgpu/nv.c: Corrected typo in the video capabilities resolutionVeerabadhran Gopalakrishnan3-27/+27
Corrected the typo in the 4K resolution parameters. Fixes: b3a24461f9fb15 ("amdgpu/nv.c - Added codec query for Beige Goby") Fixes: 9075096b09e590 ("amdgpu/nv.c - Optimize code for video codec support structure") Fixes: 9ac0edaa0f8323 ("drm/amdgpu: add vcn_4_0_0 video codec query") Signed-off-by: Veerabadhran Gopalakrishnan <[email protected]> Acked-by: Luben Tuikov <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-11-29drm/amdgpu: Fix potential double free and null pointer dereferenceLiang He2-2/+5
In amdgpu_get_xgmi_hive(), we should not call kfree() after kobject_put() as the PUT will call kfree(). In amdgpu_device_ip_init(), we need to check the returned *hive* which can be NULL before we dereference it. Signed-off-by: Liang He <[email protected]> Reviewed-by: Luben Tuikov <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-11-29drm/amdgpu: enable PSP IP v13.0.11 supportTim Huang2-0/+4
Enable PSP FW loading for PSP IP v13.0.11 Signed-off-by: Tim Huang <[email protected]> Signed-off-by: Yifan Zhang <[email protected]> Reviewed-by: Aaron Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-11-29drm/amdgpu: Enable pg/cg flags on GC11_0_4 for VCNSaleemkhan Jamadar1-2/+5
This enable VCN PG, CG and JPEG PG, CG Signed-off-by: Saleemkhan Jamadar <[email protected]> Reviewed-by: Leo Liu <[email protected]> Signed-off-by: Yifan Zhang <[email protected]> Reviewed-by: Aaron Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-11-29drm/amdgpu/discovery: enable nbio support for NBIO v7.7.1Yifan Zhang1-0/+1
this patch is to enable nbio support for NBIO v7.7.1. Signed-off-by: Yifan Zhang <[email protected]> Reviewed-by: Aaron Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-11-29drm/amdgpu/pm: use the specific mailbox registers only for SMU IP v13.0.4Tim Huang1-3/+14
The SMU IP v13.0.4 ppt interface is shared by IP v13.0.11, they use the different mailbox register offset. So use the specific mailbox registers offset for v13.0.4. Signed-off-by: Tim Huang <[email protected]> Signed-off-by: Yifan Zhang <[email protected]> Reviewed-by: Aaron Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-11-29drm/amdgpu/soc21: add mode2 asic reset for SMU IP v13.0.11Tim Huang1-0/+1
Set the default reset method to mode2 for SMU IP v13.0.11 Signed-off-by: Tim Huang <[email protected]> Signed-off-by: Yifan Zhang <[email protected]> Reviewed-by: Aaron Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-11-29drm/amdgpu/pm: add GFXOFF control IP version check for SMU IP v13.0.11Yifan Zhang1-0/+1
Enable the SMU IP v13.0.11 GFXOFF control Signed-off-by: Yifan Zhang <[email protected]> Reviewed-by: Aaron Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-11-29drm/amdgpu: add smu 13 support for smu 13.0.11Yifan Zhang2-0/+3
this patch to add smu 13 support for smu 13.0.11. Signed-off-by: Yifan Zhang <[email protected]> Reviewed-by: Aaron Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-11-29drm/amdgpu/pm: enable swsmu for SMU IP v13.0.11Yifan Zhang1-0/+1
Add the entry to set the ppt functions for SMU IP v13.0.11. Signed-off-by: Yifan Zhang <[email protected]> Reviewed-by: Aaron Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-11-29drm/amdkfd: add GC 11.0.4 KFD supportYifan Zhang2-0/+3
Add initial support for GC 11.0.4 in KFD compute driver. Signed-off-by: Yifan Zhang <[email protected]> Reviewed-by: Aaron Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-11-29drm/amdgpu: add gmc v11 support for GC 11.0.4Yifan Zhang1-0/+1
Add gmc v11 support for GC 11.0.4. Signed-off-by: Yifan Zhang <[email protected]> Reviewed-by: Aaron Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-11-29drm/amdgpu: add soc21 common ip block support for GC 11.0.4Yifan Zhang1-0/+6
Add common soc21 ip block support for GC 11.0.4. Signed-off-by: Yifan Zhang <[email protected]> Reviewed-by: Aaron Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-11-29drm/amdgpu: add gfx support for GC 11.0.4Yifan Zhang1-1/+9
this patch to add GC 11.0.4 gfx support to gfx11 implementation. Signed-off-by: Yifan Zhang <[email protected]> Reviewed-by: Aaron Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-11-29drm/amdgpu/discovery: set the APU flag for GC 11.0.4Yifan Zhang1-0/+1
Set the APU flag appropriately for GC 11.0.4. Signed-off-by: Yifan Zhang <[email protected]> Reviewed-by: Aaron Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-11-29drm/amdgpu: set GC 11.0.4 familyYifan Zhang1-0/+1
this patch is to set GC 11.0.4 family. Signed-off-by: Yifan Zhang <[email protected]> Reviewed-by: Aaron Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-11-29drm/amdgpu/discovery: add PSP IP v13.0.11 supportTim Huang1-0/+1
Add PSP IP v13.0.11 ip discovery support. Signed-off-by: Tim Huang <[email protected]> Signed-off-by: Yifan Zhang <[email protected]> Reviewed-by: Aaron Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-11-29drm/amdgpu/discovery: enable mes support for GC v11.0.4Yifan Zhang1-0/+1
this patch is to enable mes for GC 11.0.4. Signed-off-by: Yifan Zhang <[email protected]> Reviewed-by: Aaron Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-11-29drm/amdgpu/discovery: enable gfx v11 for GC 11.0.4Yifan Zhang1-0/+1
Enable gfx v11 for GC 11.0.4. Signed-off-by: Yifan Zhang <[email protected]> Reviewed-by: Aaron Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-11-29drm/amdgpu/discovery: enable gmc v11 for GC 11.0.4Yifan Zhang1-0/+1
Enable gmc (graphic memory controller) v11 for GC 11.0.4. Signed-off-by: Yifan Zhang <[email protected]> Reviewed-by: Aaron Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-11-29drm/amdgpu/discovery: enable soc21 common for GC 11.0.4Yifan Zhang1-0/+1
Enable soc21 common for GC 11.0.4. Signed-off-by: Yifan Zhang <[email protected]> Reviewed-by: Aaron Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-11-29drm/amdgpu: skip vram reserve on firmware_v2_2 for bare-metalLikun Gao1-4/+6
vram_usagebyfirmware v2_2 is only used in SRIOV case, skip the related settings in bare-metal case currently. Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Feifei Xu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-11-29drm/amdgpu: add printing to indicate rpm completenessGuchun Chen1-0/+2
Add an explicit printing to tell when finishing rpm execution in amdgpu. Signed-off-by: Guchun Chen <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-11-29drm/amd/pm/smu11: poll BACO status after RPM BACO exitsGuchun Chen1-1/+23
After executing BACO exit, driver needs to poll the status to ensure FW has completed BACO exit sequence to prevent timing issue. v2: use usleep_range to replace msleep to fix checkpatch.pl warnings Signed-off-by: Guchun Chen <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-11-29drm/amd/pm/smu11: BACO is supported when it's in BACO stateGuchun Chen1-0/+4
Return true early if ASIC is in BACO state already, no need to talk to SMU. It can fix the issue that driver was not calling BACO exit at all in runtime pm resume, and a timing issue leading to a PCI AER error happened eventually. Fixes: 8795e182b02d ("PCI/portdrv: Don't disable AER reporting in get_port_device_capability()") Suggested-by: Lijo Lazar <[email protected]> Signed-off-by: Guchun Chen <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-11-29drm/amdgpu: add drv_vram_usage_va for virt data exchangeTong Liu014-29/+49
For vram_usagebyfirmware_v2_2, fw_vram_reserve is not used. So fw_vram_usage_va is NULL, and cannot do virt data exchange anymore. Should add drv_vram_usage_va to do virt data exchange in vram_usagebyfirmware_v2_2 case. And refine some code style checks in pre add vram reservation logic patch Signed-off-by: Tong Liu01 <[email protected]> Acked-by: Luben Tuikov <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-11-29drm/amdgpu: fix stall on CPU when allocate large system memoryJames Zhu1-15/+35
-v2: 1. rename variable to redue confuse 2. optimize the code -v3: move new define out of the middle of the code -v4: squash in minmax error fix (Luben) When applications try to allocate large system (more than > 128GB), "stall cpu" is reported. for such large system memory, walk_page_range takes more than 20s usually. The warning message can be removed when splitting hmm range into smaller ones which is not more 64GB for each walk_page_range. [ 164.437617] amdgpu:amdgpu_amdkfd_gpuvm_alloc_memory_of_gpu:1753: amdgpu: create BO VA 0x7f63c7a00000 size 0x2f16000000 domain CPU [ 164.488847] amdgpu:amdgpu_amdkfd_gpuvm_alloc_memory_of_gpu:1785: amdgpu: creating userptr BO for user_addr = 7f63c7a00000 [ 185.439116] rcu: INFO: rcu_sched self-detected stall on CPU [ 185.439125] rcu: 8-....: (20999 ticks this GP) idle=e22/1/0x4000000000000000 softirq=2242/2242 fqs=5249 [ 185.439137] (t=21000 jiffies g=6325 q=1215) [ 185.439141] NMI backtrace for cpu 8 [ 185.439143] CPU: 8 PID: 3470 Comm: kfdtest Kdump: loaded Tainted: G O 5.12.0-0_fbk5_zion_rc1_5697_g2c723fb88626 #1 [ 185.439147] Hardware name: HPE ProLiant XL675d Gen10 Plus/ProLiant XL675d Gen10 Plus, BIOS A47 11/06/2020 [ 185.439150] Call Trace: [ 185.439153] <IRQ> [ 185.439157] dump_stack+0x64/0x7c [ 185.439163] nmi_cpu_backtrace.cold.7+0x30/0x65 [ 185.439165] ? lapic_can_unplug_cpu+0x70/0x70 [ 185.439170] nmi_trigger_cpumask_backtrace+0xf9/0x100 [ 185.439174] rcu_dump_cpu_stacks+0xc5/0xf5 [ 185.439178] rcu_sched_clock_irq.cold.97+0x112/0x38c [ 185.439182] ? tick_sched_handle.isra.21+0x50/0x50 [ 185.439185] update_process_times+0x8c/0xc0 [ 185.439189] tick_sched_timer+0x63/0x70 [ 185.439192] __hrtimer_run_queues+0xff/0x250 [ 185.439195] hrtimer_interrupt+0xf4/0x200 [ 185.439199] __sysvec_apic_timer_interrupt+0x51/0xd0 [ 185.439201] sysvec_apic_timer_interrupt+0x69/0x90 [ 185.439206] </IRQ> [ 185.439207] asm_sysvec_apic_timer_interrupt+0x12/0x20 [ 185.439211] RIP: 0010:clear_page_rep+0x7/0x10 [ 185.439214] Code: e8 fe 7c 51 00 44 89 e2 48 89 ee 48 89 df e8 60 ff ff ff c6 03 00 5b 5d 41 5c c3 cc cc cc cc cc cc cc cc b9 00 02 00 00 31 c0 <f3> 48 ab c3 0f 1f 44 00 00 31 c0 b9 40 00 00 00 66 0f 1f 84 00 00 [ 185.439218] RSP: 0018:ffffc9000f58f818 EFLAGS: 00000246 [ 185.439220] RAX: 0000000000000000 RBX: 0000000000000881 RCX: 000000000000005c [ 185.439223] RDX: 0000000000100dca RSI: 0000000000000000 RDI: ffff88a59e0e5d20 [ 185.439225] RBP: ffffea0096783940 R08: ffff888118c35280 R09: ffffea0096783940 [ 185.439227] R10: ffff888000000000 R11: 0000160000000000 R12: ffffea0096783980 [ 185.439228] R13: ffffea0096783940 R14: ffff88b07fdfdd00 R15: 0000000000000000 [ 185.439232] prep_new_page+0x81/0xc0 [ 185.439236] get_page_from_freelist+0x13be/0x16f0 [ 185.439240] ? release_pages+0x16a/0x4a0 [ 185.439244] __alloc_pages_nodemask+0x1ae/0x340 [ 185.439247] alloc_pages_vma+0x74/0x1e0 [ 185.439251] __handle_mm_fault+0xafe/0x1360 [ 185.439255] handle_mm_fault+0xc3/0x280 [ 185.439257] hmm_vma_fault.isra.22+0x49/0x90 [ 185.439261] __walk_page_range+0x692/0x9b0 [ 185.439265] walk_page_range+0x9b/0x120 [ 185.439269] hmm_range_fault+0x4f/0x90 [ 185.439274] amdgpu_hmm_range_get_pages+0x24f/0x260 [amdgpu] [ 185.439463] amdgpu_ttm_tt_get_user_pages+0xc2/0x190 [amdgpu] [ 185.439603] amdgpu_amdkfd_gpuvm_alloc_memory_of_gpu+0x49f/0x7a0 [amdgpu] [ 185.439774] kfd_ioctl_alloc_memory_of_gpu+0xfb/0x410 [amdgpu] Signed-off-by: James Zhu <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-11-23drm/amdgpu: Partially revert "drm/amdgpu: update drm_display_info correctly ↵Alex Deucher1-1/+0
when the edid is read" This partially reverts 20543be93ca45968f344261c1a997177e51bd7e1. Calling drm_connector_update_edid_property() in amdgpu_connector_free_edid() causes a noticeable pause in the system every 10 seconds on polled outputs so revert this part of the change. Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/2257 Cc: Claudio Suarez <[email protected]> Acked-by: Luben Tuikov <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-11-23drm/amdgpu: add missing license to some filesAlex Deucher5-0/+5
The driver is MIT, so add the licenses. Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/2265 Acked-by: Luben Tuikov <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-11-23drm/amdgpu: enable RAS poison for VCN 2.6Tao Zhou1-0/+29
Configure related settings to enable it. Signed-off-by: Tao Zhou <[email protected]> Signed-off-by: Lijo Lazar <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-11-23drm/amdkfd: Release the topology_lock in error caseFelix Kuehling1-55/+65
Move the topology-locked part of kfd_topology_add_device into a separate function to simlpify error handling and release the topology lock consistently. Reported-by: Dan Carpenter <[email protected]> Signed-off-by: Felix Kuehling <[email protected]> Signed-off-by: Ma Jun <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-11-23drm/amdgpu: add register definition for VCN RAS initializationTao Zhou2-1/+29
Prepare for enableing VCN RAS poison. v2: move SHIFT and MASK definitions to related sh_mask.h file. Signed-off-by: Tao Zhou <[email protected]> Signed-off-by: Lijo Lazar <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-11-23drm/amdgpu: fix for suspend/resume kiq fence fallback under sriovShikang Fan1-11/+12
- in device_resume, sriov configure interrupt should be in full access, so release_full_gpu should be done after kfd_resume. - remove the previous workaround solution for sriov. Fixes: ec4927d463cb ("drm/amdgpu: fix for suspend/resume sequence under sriov") Signed-off-by: Shikang Fan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-11-23drm/amd/display: trigger timing sync only if TG is runningAurabindo Pillai1-0/+6
[Why&How] If the timing generator isnt running, it does not make sense to trigger a sync on the corresponding OTG. Check this condition before starting. Otherwise, this will cause error like: *ERROR* GSL: Timeout on reset trigger! Fixes: dc55b106ad47 ("drm/amd/display: Disable phantom OTG after enable for plane disable") Signed-off-by: Aurabindo Pillai <[email protected]> Reviewed-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-11-23drm/amdgpu: Replace remaining 1-element array with flex-arrayPaulo Miguel Almeida1-1/+1
One-element arrays are deprecated, and we are replacing them with flexible array members instead. So, replace one-element array with flexible-array member in struct GOP_VBIOS_CONTENT and refactor the rest of the code accordingly. Important to mention is that doing a build before/after this patch results in no functional binary output differences. This helps with the ongoing efforts to tighten the FORTIFY_SOURCE routines on memcpy() and help us make progress towards globally enabling -fstrict-flex-arrays=3 [1]. Link: https://github.com/KSPP/linux/issues/79 Link: https://github.com/KSPP/linux/issues/238 Link: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101836 [1] Signed-off-by: Paulo Miguel Almeida <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-11-23Revert "drm/amd/display: fix dpms_off issue when disabling bios mode"Alex Deucher1-1/+1
This reverts commit 5aa663752ff6f844c6bfc97d89231e98884ae769. This causes a blank screen on boot on an Asus G513QY / 6800M laptop. Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/2259 Cc: Aric Cyr <[email protected]> Cc: Tom Chung <[email protected]> Cc: Zhongwei Zhang <[email protected]> Cc: Harry Wentland <[email protected]> Tested-by: Mike Lothian <[email protected]> Reviewed-by: Luben Tuikov <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-11-23drm/amdgpu: fix unused-function errorRen Zhijie1-0/+2
If CONFIG_DRM_AMDGPU=y and CONFIG_DRM_AMD_DC is not set, gcc complained about unused-function : drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c:1705:13: error: ‘amdgpu_discovery_set_sriov_display’ defined but not used [-Werror=unused-function] static void amdgpu_discovery_set_sriov_display(struct amdgpu_device *adev) ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ cc1: all warnings being treated as errors To fix this error, use CONFIG_DRM_AMD_DC to wrap the definition of amdgpu_discovery_set_sriov_display(). Fixes: 25263da37693 ("drm/amdgpu: rework SR-IOV virtual display handling") Signed-off-by: Ren Zhijie <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-11-23drm/amdgpu: Fix minmax warningLuben Tuikov1-3/+6
Fix minmax warning by using min_t() macro and explicitly specifying the assignment type. Cc: Alex Deucher <[email protected]> Signed-off-by: Luben Tuikov <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-11-23drm/amdgpu: fix use-after-free during gpu recoveryStanley.Yang1-1/+6
[Why] [ 754.862560] refcount_t: underflow; use-after-free. [ 754.862898] Call Trace: [ 754.862903] <TASK> [ 754.862913] amdgpu_job_free_cb+0xc2/0xe1 [amdgpu] [ 754.863543] drm_sched_main.cold+0x34/0x39 [amd_sched] [How] The fw_fence may be not init, check whether dma_fence_init is performed before job free Signed-off-by: Stanley.Yang <[email protected]> Reviewed-by: Tao Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-11-23drm/amdgpu: update documentation of parameter amdgpu_gtt_sizeZhenGuo Yin1-2/+1
Fixes: f7ba887f606b ("drm/amdgpu: Adjust logic around GTT size (v3)") Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: ZhenGuo Yin <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-11-23drm/amdgpu/vcn: re-use original vcn0 doorbell valueJane Jian2-9/+1
root cause that S2A need to use deduct offset flag. after setting this flag, vcn0 doorbell value works. so return it as before Signed-off-by: Jane Jian <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-11-23drm/amdgpu: add the fan abnormal detection featurelyndonli3-0/+30
Update the SW CTF limit from existing register when there's a fan failure detected via SMU interrupt. Signed-off-by: lyndonli <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Reviewed-by: Kenneth Feng <[email protected]> Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-11-23drm/amd/pm: update driver if header for smu_13_0_7lyndonli2-39/+80
update driver if header for smu_13_0_7 Signed-off-by: lyndonli <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Reviewed-by: Kenneth Feng <[email protected]> Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-11-23drm/amd/pm: Enable bad memory page/channel recording support for smu v13_0_0Candice Li3-2/+49
Send message to SMU to update bad memory page and bad channel info. Signed-off-by: Candice Li <[email protected]> Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-11-23drm/amd/display: 3.2.213Aric Cyr1-1/+1
This version brings along following fixes: -Add configuration 2 for ABM 2.3/2.4. -Add margin for HUBP for SubVp + DRR. -Fix no display after resume from WB/CB. -Limit HW cursor size to be less than 64 x 64 bytes when the stream is >= 4K. -Lower watermarks for enter/enter+exit latency. -Update support types for DCN314 to include z8 only and z8_z10 only state. -Add new value for soc bounding box and dummy pstate. -Override fclk chang latency when calculating prefetch schedule for subvp with low uclk. -Add check for DET fetch latency for dcn32. -Add check if PSR enabled when entering MALL. -Use base MALL allocation size calculations off vewport height. -Add YCBCR2020 to CSC matrix. -Implement DP-Tx portion to interact with DPIA. -Add debug option for increasing phantom lines. -Fix phantom plane/stream retain after fail validation. -Fix display corruption with VSR enable. -Set valid divider value for virtual and FRL/DP2. -Add new num clk levels struct for max mclk index. -Fix check for phantom BPP. -Fix rotated cursor offset calculation. Signed-off-by: Aric Cyr <[email protected]> Reviewed-by: Aric Cyr <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-11-23drm/amd/display: Fix rotated cursor offset calculationDavid Galiffi3-30/+64
[Why] Underflow is observed when cursor is still enabled when the cursor rectangle is outside the bounds of it's surface viewport. [How] Update parameters used to determine when cursor should be disabled. Reviewed-by: Martin Leung <[email protected]> Acked-by: Brian Chang <[email protected]> Signed-off-by: David Galiffi <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-11-23drm/amd/display: Revert check for phantom BPPAlvin Lee1-1/+1
[Description] Revert change since enabling SubVP on 8K60 single cable results in corruption Reviewed-by: Nevenko Stupar <[email protected]> Reviewed-by: Martin Leung <[email protected]> Acked-by: Brian Chang <[email protected]> Signed-off-by: Alvin Lee <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-11-23drm/amd/display: Use new num clk levels struct for max mclk indexDillon Varone1-1/+1
[WHY?] When calculating watermark and dlg values, the max mclk level index and associated speed are needed to find the correlated dummy latency value. Currently the incorrect index is given due to a clock manager refactor. [HOW?] Use num_memclk_level from num_entries_per_clk struct for getting the correct max mem speed. Reviewed-by: Jun Lei <[email protected]> Acked-by: Brian Chang <[email protected]> Signed-off-by: Dillon Varone <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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