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2022-10-27drm/amd/display: Fix SDR visual confirmAric Cyr1-3/+10
Apply SDR visual confirm to RGB10 and FP16 formats as well when needed. Tested-by: Mark Broadworth <[email protected]> Reviewed-by: Jun Lei <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Aric Cyr <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-10-27drm/amd/display: cursor update command incompleteMax Tseng1-0/+4
Missing send cursor_rect width & Height into DMUB. PSR-SU would use these information. But missing these assignment in last refactor commit Tested-by: Mark Broadworth <[email protected]> Reviewed-by: Anthony Koo <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Max Tseng <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-10-27drm/amd/display: Enable timing sync on DCN32Alvin Lee1-0/+1
Missed enabling timing sync on DCN32 because DCN32 has a different DML param. Tested-by: Mark Broadworth <[email protected]> Reviewed-by: Martin Leung <[email protected]> Reviewed-by: Jun Lei <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alvin Lee <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-10-27drm/amd/display: Fix HDCP 1.X 1A-04 failingBhawanpreet Lakha1-1/+1
[Why] On some linux based OS, the hotplug->HDCP start takes longer than 4seconds (by ~100ms) This is due to the HDCP delay (3 sec) so we only have 1 second to hotplug->stream enablement, which is not enough for certain OS configs. [How] Change the Delay to 0 seconds. From testing it seems like 0 Seconds can pass 1.x and 2.x compliances Tested-by: Mark Broadworth <[email protected]> Reviewed-by: Aurabindo Pillai <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-10-27drm/amd/display: Remove optimization for VRR updatesAlvin Lee1-3/+0
Optimization caused unexpected regression, so remove for now. Tested-by: Mark Broadworth <[email protected]> Reviewed-by: Aric Cyr <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alvin Lee <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-10-27drm/amd/display: Set memclk levels to be at least 1 for dcn32Dillon Varone1-0/+3
[Why] Cannot report 0 memclk levels even when SMU does not provide any. [How] When memclk levels reported by SMU is 0, set levels to 1. Tested-by: Mark Broadworth <[email protected]> Reviewed-by: Martin Leung <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Dillon Varone <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-10-27drm/amd/display: Update latencies on DCN321Dillon Varone1-5/+5
Update DF related latencies based on new measurements. Tested-by: Mark Broadworth <[email protected]> Reviewed-by: Jun Lei <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Dillon Varone <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-10-27drm/amd/display: 3.2.208Aric Cyr1-1/+1
DC version 3.2.208 brings along the following: * Add more kernel doc * Enable secure display on DCN21 * Limit dcn32 to 1950Mhz display clock * PSR code refactor * Rework audio stream sequence * Generic bug fixes Tested-by: Mark Broadworth <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Aric Cyr <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-10-27drm/amd/display: Document part of the DMUB cmdAnthony Koo1-1/+12
Add a simple documentation in the dmub_cmd. Tested-by: Mark Broadworth <[email protected]> Reviewed-by: Aric Cyr <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Anthony Koo <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-10-27drm/amd/display: Limit dcn32 to 1950Mhz display clockJun Lei1-4/+4
[why] Hardware team recommends we limit dispclock to 1950Mhz for all DCN3.2.x [how] Limit to 1950 when initializing clocks. Tested-by: Mark Broadworth <[email protected]> Reviewed-by: Alvin Lee <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Jun Lei <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-10-27drm/amd/display: Drop struct crc_region and reuse struct rectAlan Liu8-42/+46
[Why] reuse struct rect rather than adding a new struct. [How] - Userspace keeps inputting x_start, y_start, x_end, y_end - We translate data to x, y, width, height in code flow to store - translate back to x_start, y_start, x_end, y_end before programming HW Tested-by: Mark Broadworth <[email protected]> Reviewed-by: Wayne Lin <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alan Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-10-27drm/amd/display: Implement secure display on DCN21Alan Liu11-189/+223
[Why] Porting secure display feature from DCN10 to DCN21. Support single display for now and will extend to multiple displays. [How] - use workqueue to offload works for dmub or dmcu firmware - after receiving ROI update from userspace, set skip_frame_cnt to 1 - refactor amdgpu_dm_crtc_handle_crc_window_irq() - disable PSR before activating secure_display on a crtc - check if secure_display is activated before enabling psr - only work for single display for now. Tested-by: Mark Broadworth <[email protected]> Reviewed-by: Wayne Lin <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alan Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-10-27drm/amd/display: Ignore Cable ID FeatureFangzhi Zuo1-0/+3
Ignore cable ID for DP2 receivers that does not support the feature. Tested-by: Mark Broadworth <[email protected]> Reviewed-by: Roman Li <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Fangzhi Zuo <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-10-27drm/amd/display: Update DSC capabilitie for DCN314Leo Chen1-1/+1
dcn314 has 4 DSC - conflicted hardware document updated and confirmed. Tested-by: Mark Broadworth <[email protected]> Reviewed-by: Charlene Liu <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Leo Chen <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-10-27drm/ttm: rework on ttm_resource to use size_t typeSomalapuram Amaranath6-12/+13
Change ttm_resource structure from num_pages to size_t size in bytes. v1 -> v2: change PFN_UP(dst_mem->size) to ttm->num_pages v1 -> v2: change bo->resource->size to bo->base.size at some places v1 -> v2: remove the local variable v1 -> v2: cleanup cmp_size_smaller_first() v2 -> v3: adding missing PFN_UP in ttm_bo_vm_fault_reserved Signed-off-by: Somalapuram Amaranath <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Christian König <[email protected]> Signed-off-by: Christian König <[email protected]>
2022-10-26drm/amd/display: stop using connector->override_edidJani Nikula1-3/+0
The connector->override_edid flag is strictly for EDID override debugfs management, and drivers have no business using it. Cc: Alex Deucher <[email protected]> Cc: Christian König <[email protected]> Cc: Xinhui Pan <[email protected]> Cc: [email protected] Signed-off-by: Jani Nikula <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Acked-by: Alex Deucher <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/c901869ff8a4e3aebc4abec99c7dd7b4c224f6e6.1666614699.git.jani.nikula@intel.com
2022-10-25Merge tag 'drm-misc-next-2022-10-20' of ↵Dave Airlie6-11/+0
git://anongit.freedesktop.org/drm/drm-misc into drm-next drm-misc-next for 6.2: UAPI Changes: - Documentation for page-flip flags Cross-subsystem Changes: - dma-buf: Add unlocked variant of vmapping and attachment-mapping functions Core Changes: - atomic-helpers: CRTC primary plane test fixes - connector: TV API consistency improvements, cmdline parsing improvements - crtc-helpers: Introduce drm_crtc_helper_atomic_check() helper - edid: Fixes for HFVSDB parsing, - fourcc: Addition of the Vivante tiled modifier - makefile: Sort and reorganize the objects files - mode_config: Remove fb_base from drm_mode_config_funcs - sched: Add a module parameter to change the scheduling policy, refcounting fix for fences - tests: Sort the Kunit tests in the Makefile, improvements to the DP-MST tests - ttm: Remove unnecessary drm_mm_clean() call Driver Changes: - New driver: ofdrm - Move all drivers to a common dma-buf locking convention - bridge: - adv7533: Remove dynamic lane switching - it6505: Runtime PM support - ps8640: Handle AUX defer messages - tc358775: Drop soft-reset over I2C - ast: Atomic Gamma LUT Support, Convert to SHMEM, various improvements - lcdif: Support for YUV planes - mgag200: Fix PLL Setup on some revisions - udl: Modesetting improvements, hot-unplug support - vc4: Fix support for PAL-M Signed-off-by: Dave Airlie <[email protected]> From: Maxime Ripard <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/20221020072405.g3o4hxuk75gmeumw@houat
2022-10-24drm/amd/display: Revert logic for plane modifiersJoaquín Ignacio Aramendía1-43/+7
This file was split in commit 5d945cbcd4b16a29d6470a80dfb19738f9a4319f ("drm/amd/display: Create a file dedicated to planes") and the logic in dm_plane_format_mod_supported() function got changed by a switch logic. That change broke drm_plane modifiers setting on series 5000 APUs (tested on OXP mini AMD 5800U and HP Dev One 5850U PRO) leading to Gamescope not working as reported on GitHub[1] To reproduce the issue, enter a TTY and run: $ gamescope -- vkcube With said commit applied it will abort. This one restores the old logic, fixing the issue that affects Gamescope. [1](https://github.com/Plagman/gamescope/issues/624) Cc: <[email protected]> # 6.0.x Signed-off-by: Joaquín Ignacio Aramendía <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-10-24amd/amdgpu: fix repeated words in commentswangjianli1-1/+1
Delete the redundant word 'the'. Signed-off-by: wangjianli <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-10-24drm/amd/display: refine wake up aux in retrieve link capsLewis Huang2-109/+41
[Why] Read set_power_state dpcd after HPD cause USB4 CTS 4.2.1.1 [How] Read LTTPR caps first. If aux channel not ready, wake up aux channel. If wake up aux channel return pass, retrieve lttpr caps again. If wake up aux channel return false, register a detection retry timer. Tested-by: Mark Broadworth <[email protected]> Reviewed-by: Wenjing Liu <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Lewis Huang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-10-24drm/amd/display: Add events log to trace OPTC lock and unlockRodrigo Siqueira4-0/+80
As an attempt to offer more DCN debug tools for cases where the OPTC can hang, this commit introduces a trace event responsible for showing OPTC status when it requests lock and unlock. Tested-by: Mark Broadworth <[email protected]> Reviewed-by: Aurabindo Pillai <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-10-24drm/amd/display: Convert documentation to a kernel-docRodrigo Siqueira1-76/+48
The dc_dmub_srv file has a lot of documentation associated with SubVP that could be converted to a kernel-doc. This commit just changes the comment style to a kernel-doc. Tested-by: Mark Broadworth <[email protected]> Reviewed-by: Aurabindo Pillai <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-10-24drm/amd/display: Refactor eDP PSR codesIan Chen11-10/+70
We split out PSR config from "global" to "per-panel" config settings. Tested-by: Mark Broadworth <[email protected]> Reviewed-by: Robin Chen <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Ian Chen <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-10-24drm/amd/display: correctly populate dcn315 clock tableDmytro Laktyushkin1-48/+23
Fix incorrect pstate read order as well as min and max state logic. Tested-by: Mark Broadworth <[email protected]> Reviewed-by: Charlene Liu <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Dmytro Laktyushkin <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-10-24drm/amd/display: remove audio mute control in hpo dpWenjing Liu4-27/+0
VPG doesn't have the ability to mute audio output by sending all 0s in audio SDP. The existing implemention is disabling audio SDP instead. This is same as what dp_audio_enable does. Since it is no longer referenced by any callers, we decided to remove this interface for simplicity. Tested-by: Mark Broadworth <[email protected]> Reviewed-by: Charlene Liu <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Wenjing Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-10-24drm/amd/display: move stream encoder audio setup to link_hwssWenjing Liu6-17/+38
Unify stream encoder audio setup interface. Tested-by: Mark Broadworth <[email protected]> Reviewed-by: Charlene Liu <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Wenjing Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-10-24drm/amd/display: refactor enable/disable audio stream hw sequenceWenjing Liu10-68/+68
[why] 1. As recommended by hardware team, don't enable APG when stream is not enabled. 2. Move audio stream encoder programming into link_hwss. [how] 1. Merge dp_audio_enable into enable audio stream hw sequence. 2. Move stream encoder programming into link hwss level to unify stream encoder programming interface. Tested-by: Mark Broadworth <[email protected]> Reviewed-by: Charlene Liu <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Wenjing Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-10-24drm/amd/display: Remove FPU guards from the DML folderRodrigo Siqueira2-18/+1
As part of the programming expectation for using DML functions, DC requires that any DML function invoked outside DML uses: DC_FP_START(); ... dml function ... DC_FP_END(); Additionally, all the DML functions that can be invoked outside the DML folder call the function dc_assert_fp_enabled(), which is responsible for triggering a warning in the case that the DML function was not guarded by the DC_FP_START/END. For this reason, call DC_FP_START/END inside DML is wrong, and this commit removes all of those references. Tested-by: Mark Broadworth <[email protected]> Reviewed-by: Nevenko Stupar <[email protected]> Reviewed-by: Jun Lei <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-10-24drm/amd/display: Add UHBR135 and UHBR20 into debugfsFangzhi Zuo1-0/+2
Add support to manually force link rate to UHBR135 (0x546) and UHBR20 (0x7d0). Tested-by: Mark Broadworth <[email protected]> Reviewed-by: Roman Li <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Fangzhi Zuo <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-10-24drm/amdgpu: disallow gfxoff until GC IP blocks complete s2idle resumePrike Liang1-0/+16
In the S2idle suspend/resume phase the gfxoff is keeping functional so some IP blocks will be likely to reinitialize at gfxoff entry and that will result in failing to program GC registers.Therefore, let disallow gfxoff until AMDGPU IPs reinitialized completely. Signed-off-by: Prike Liang <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-10-24drm/amdgpu: skip mes self test for gc 11.0.3 in recoverYuBiao Wang1-1/+1
Temporary disable mes self teset for gc 11.0.3 during gpu_recovery. Signed-off-by: YuBiao Wang <[email protected]> Acked-by: Luben Tuikov <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-10-24drm/amdkfd: introduce dummy cache info for property asicPrike Liang1-1/+52
This dummy cache info will enable kfd base function support. Signed-off-by: Prike Liang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-10-24drm/amdkfd: correct the cache info for gfx1036Jesse Zhang1-1/+52
correct the cache information for gfx1036 Acked-by: Alex Deucher <[email protected]> Reviewed-by: Yifan Zhang <[email protected]> Signed-off-by: Yifan Zhang <[email protected]> Signed-off-by: Jesse Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-10-24drm/amdkfd: update gfx1037 Lx cache settingPrike Liang1-1/+52
Update the gfx1037 L1/L2 cache setting. Signed-off-by: Prike Liang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-10-24drm/amd: Add IMU fw version to fw version queriesDavid Francis4-1/+18
IMU is a new firmware for GFX11. There are four means by which firmware version can be queried from the driver: device attributes, vf2pf, debugfs, and the AMDGPU_INFO_FW_VERSION option in the amdgpu info ioctl. Add IMU as an option for those four methods. V2: Added debugfs Reviewed-by: Likun Gao <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: David Francis <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-10-24drm/amdkfd: use vma_lookup() instead of find_vma()Deming Wang2-13/+12
Using vma_lookup() verifies the start address is contained in the found vma. This results in easier to read the code. Signed-off-by: Deming Wang <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-10-24drm/amd/display: make dcn32_mpc_funcs staticruanjinjie1-1/+1
The symbol is not used outside of the file, so mark it static. Fixes the following warning: drivers/gpu/drm/amd/amdgpu/../display/dc/dcn32/dcn32_mpc.c:985:24: warning: symbol 'dcn32_mpc_funcs' was not declared. Should it be static? Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: ruanjinjie <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-10-24drm/amd/display: make dcn32_mmhubbub_funcs staticruanjinjie1-1/+1
The symbol is not used outside of the file, so mark it static. Fixes the following warning: drivers/gpu/drm/amd/amdgpu/../display/dc/dcn32/dcn32_mmhubbub.c:214:28: warning: symbol 'dcn32_mmhubbub_funcs' was not declared. Should it be static? Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: ruanjinjie <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-10-24drm/amd/display: Make some symbols staticruanjinjie1-18/+18
These symbols qp_table_422_10bpc_min, qp_table_444_8bpc_max, qp_table_420_12bpc_max, qp_table_444_10bpc_min, qp_table_420_8bpc_max, qp_table_444_8bpc_min, qp_table_444_12bpc_min, qp_table_420_12bpc_min, qp_table_422_12bpc_min, qp_table_422_12bpc_max, qp_table_444_12bpc_max, qp_table_420_8bpc_min, qp_table_422_8bpc_min, qp_table_422_10bpc_max, qp_table_420_10bpc_max, qp_table_420_10bpc_min, qp_table_444_10bpc_max, qp_table_422_8bpc_max are not used outside of the file, so mark them static. ./drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dsc/qp_tables.h:28:18: warning: symbol 'qp_table_422_10bpc_min' was not declared. Should it be static? ./drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dsc/qp_tables.h:61:18: warning: symbol 'qp_table_444_8bpc_max' was not declared. Should it be static? ./drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dsc/qp_tables.h:102:18: warning: symbol 'qp_table_420_12bpc_max' was not declared. Should it be static? ./drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dsc/qp_tables.h:135:18: warning: symbol 'qp_table_444_10bpc_min' was not declared. Should it be static? ./drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dsc/qp_tables.h:188:18: warning: symbol 'qp_table_420_8bpc_max' was not declared. Should it be static? ./drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dsc/qp_tables.h:209:18: warning: symbol 'qp_table_444_8bpc_min' was not declared. Should it be static? ./drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dsc/qp_tables.h:250:18: warning: symbol 'qp_table_444_12bpc_min' was not declared. Should it be static? ./drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dsc/qp_tables.h:315:18: warning: symbol 'qp_table_420_12bpc_min' was not declared. Should it be static? ./drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dsc/qp_tables.h:348:18: warning: symbol 'qp_table_422_12bpc_min' was not declared. Should it be static? ./drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dsc/qp_tables.h:389:18: warning: symbol 'qp_table_422_12bpc_max' was not declared. Should it be static? ./drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dsc/qp_tables.h:430:18: warning: symbol 'qp_table_444_12bpc_max' was not declared. Should it be static? ./drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dsc/qp_tables.h:495:18: warning: symbol 'qp_table_420_8bpc_min' was not declared. Should it be static? ./drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dsc/qp_tables.h:516:18: warning: symbol 'qp_table_422_8bpc_min' was not declared. Should it be static? ./drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dsc/qp_tables.h:541:18: warning: symbol 'qp_table_422_10bpc_max' was not declared. Should it be static? ./drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dsc/qp_tables.h:574:16: warning: symbol 'qp_table_420_10bpc_max' was not declared. Should it be static? ./drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dsc/qp_tables.h:601:18: warning: symbol 'qp_table_420_10bpc_min' was not declared. Should it be static? ./drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dsc/qp_tables.h:628:18: warning: symbol 'qp_table_444_10bpc_max' was not declared. Should it be static? ./drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dsc/qp_tables.h:681:18: warning: symbol 'qp_table_422_8bpc_max' was not declared. Should it be static? Signed-off-by: ruanjinjie <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-10-24drm/amdgpu: fix sdma doorbell init ordering on APUsAlex Deucher2-5/+21
Commit 8795e182b02d ("PCI/portdrv: Don't disable AER reporting in get_port_device_capability()") uncovered a bug in amdgpu that required a reordering of the driver init sequence to avoid accessing a special register on the GPU before it was properly set up leading to an PCI AER error. This reordering uncovered a different hw programming ordering dependency in some APUs where the SDMA doorbells need to be programmed before the GFX doorbells. To fix this, move the SDMA doorbell programming back into the soc15 common code, but use the actual doorbell range values directly rather than the values stored in the ring structure since those will not be initialized at this point. This is a partial revert, but with the doorbell assignment fixed so the proper doorbell index is set before it's used. Fixes: e3163bc8ffdfdb ("drm/amdgpu: move nbio sdma_doorbell_range() into sdma code for vega") Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2022-10-24drm/amd/display: Don't return false if no streamAlvin Lee1-1/+1
pipe_ctx[i] exists even if the pipe is not in use. If the pipe is not in use it will always have a null stream, so don't return false in this case. Tested-by: Daniel Wheeler <[email protected]> Reviewed-by: Rodrigo Siqueira <[email protected]> Acked-by: Qingqing Zhuo <[email protected]> Signed-off-by: Alvin Lee <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-10-24drm/amd/display: Remove wrong pipe control lockRodrigo Siqueira1-11/+1
When using a device based on DCN32/321, we have an issue where a second 4k@60Hz display does not light up, and the system becomes unresponsive for a few minutes. In the debug process, it was possible to see a hang in the function dcn20_post_unlock_program_front_end in this part: for (j = 0; j < TIMEOUT_FOR_PIPE_ENABLE_MS*1000 && hubp->funcs->hubp_is_flip_pending(hubp); j++) mdelay(1); } The hubp_is_flip_pending always returns positive for waiting pending flips which is a symptom of pipe hang. Additionally, the dmesg log shows this message after a few minutes: BUG: soft lockup - CPU#4 stuck for 26s! ... [ +0.000003] dcn20_post_unlock_program_front_end+0x112/0x340 [amdgpu] [ +0.000171] dc_commit_state_no_check+0x63d/0xbf0 [amdgpu] [ +0.000155] ? dc_validate_global_state+0x358/0x3d0 [amdgpu] [ +0.000154] dc_commit_state+0xe2/0xf0 [amdgpu] This confirmed the hypothesis that we had a pipe hanging somewhere. Next, after checking the ftrace entries, we have the below weird sequence: [..] 2) | dcn10_lock_all_pipes [amdgpu]() { 2) 0.120 us | optc1_is_tg_enabled [amdgpu](); 2) | dcn20_pipe_control_lock [amdgpu]() { 2) | dc_dmub_srv_clear_inbox0_ack [amdgpu]() { 2) 0.121 us | amdgpu_dm_dmub_reg_write [amdgpu](); 2) 0.551 us | } 2) | dc_dmub_srv_send_inbox0_cmd [amdgpu]() { 2) 0.110 us | amdgpu_dm_dmub_reg_write [amdgpu](); 2) 0.511 us | } 2) | dc_dmub_srv_wait_for_inbox0_ack [amdgpu]() { 2) 0.110 us | amdgpu_dm_dmub_reg_read [amdgpu](); 2) 0.110 us | amdgpu_dm_dmub_reg_read [amdgpu](); 2) 0.110 us | amdgpu_dm_dmub_reg_read [amdgpu](); 2) 0.110 us | amdgpu_dm_dmub_reg_read [amdgpu](); 2) 0.110 us | amdgpu_dm_dmub_reg_read [amdgpu](); 2) 0.110 us | amdgpu_dm_dmub_reg_read [amdgpu](); 2) 0.110 us | amdgpu_dm_dmub_reg_read [amdgpu](); [..] We are not expected to read from dmub register so many times and for so long. From the trace log, it was possible to identify that the function dcn20_pipe_control_lock was triggering the dmub operation when it was unnecessary and causing the hang issue. This commit drops the unnecessary dmub code and, consequently, fixes the second display not lighting up the issue. Tested-by: Daniel Wheeler <[email protected]> Acked-by: Qingqing Zhuo <[email protected]> Signed-off-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-10-24drm/amd/pm: allow gfxoff on gc_11_0_3Kenneth Feng2-0/+2
allow gfxoff on gc_11_0_3 Signed-off-by: Kenneth Feng <[email protected]> Reviewed-by: Yang Wang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-10-24drm/amd/display: Use update plane and stream routine for DCN32xRodrigo Siqueira1-0/+12
Sub-viewport (Subvp) feature is used for changing MCLK without causing any display artifact, requiring special treatment from the plane and stream perspective since DC needs to read data from the cache when using subvp. However, the function dc_commit_updates_for_stream does not provide all the support needed by this feature which will make this function legacy at some point. For this reason, this commit enables dc_update_planes_and_stream for ASICs that support this feature but preserves the old behavior for other ASICs. However, dc_update_planes_and_stream should replace dc_commit_updates_for_stream for all ASICs since it does most of the tasks executed by dc_commit_updates_for_stream with other extra operations, but we need to run tests before making this change. Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Rodrigo Siqueira <[email protected]> Co-developed-by: Aurabindo Pillai <[email protected]> Signed-off-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-10-24drm/amd/display: Avoid ABM when ODM combine is enabled for eDPRodrigo Siqueira1-1/+11
ODM to combine on the eDP panel with ABM causes the color difference to the panel since the ABM module only sets one pipe. Hence, this commit blocks ABM in case of ODM combined on eDP. Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Rodrigo Siqueira <[email protected]> Co-developed-by: Aurabindo Pillai <[email protected]> Signed-off-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-10-24drm/amd/display: Update OTG instance in the commit streamRodrigo Siqueira1-0/+6
OTG instance is not updated in dc_commit_state_no_check for newly committed streams because mode_change is not set. Notice that OTG update is part of the software state, and after hardware programming, it must be updated; for this reason, this commit updates the OTG offset right after hardware programming. Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Rodrigo Siqueira <[email protected]> Co-developed-by: Aurabindo Pillai <[email protected]> Signed-off-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-10-24drm/amd/display: Handle seamless boot streamRodrigo Siqueira1-0/+15
A seamless boot stream has hardware resources assigned to it, and adding a new stream means rebuilding the current assignment. It is desirable to avoid this situation since it may cause light-up issues on the VGA monitor on USB-C. This commit swaps the seamless boot stream to pipe 0 (if necessary) to ensure that the pipe context matches. Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Rodrigo Siqueira <[email protected]> Co-developed-by: Aurabindo Pillai <[email protected]> Signed-off-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-10-24drm/amd/display: Add function for validate and update new streamRodrigo Siqueira3-14/+227
DC stream can be seen as a representation of the DCN backend or the data struct that represents the center of the display pipeline. The front end (i.e., planes) is connected to the DC stream, and in its turn, streams are connected to the DC link. Due to this dynamic, DC must handle the following scenarios: 1. A stream is removed; 2. A new stream is created; 3. An unchanged stream had some updates on its planes. These combinations require that the new stream data struct become updated and has a valid global state. For handling multiple corner cases associated with stream operations, this commit introduces a function dedicated to manipulating stream changes and invokes the state validation function after that. Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Rodrigo Siqueira <[email protected]> Co-developed-by: Aurabindo Pillai <[email protected]> Signed-off-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-10-24drm/amd/display: Handle virtual hardware detectRodrigo Siqueira1-0/+3
If virtual hardware is detected, there is no reason to run the full dc_commit_streams process, and DC can return true immediately. Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Rodrigo Siqueira <[email protected]> Co-developed-by: Aurabindo Pillai <[email protected]> Signed-off-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-10-24drm/amd/display: Include surface of unaffected streamsRodrigo Siqueira3-3/+28
The commit stream function does not include surfaces of unaffected streams, which may lead to some blank screens during mode change in some edge cases. This commit adds surfaces of unaffected streams followed by kernel-doc for documenting some of the fields that participate in this change. v2: squash in kerneldoc warning fix (Alex) Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Rodrigo Siqueira <[email protected]> Co-developed-by: Aurabindo Pillai <[email protected]> Signed-off-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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