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2024-04-09drm/amd/display: fix disable otg wa logic in DCN316Fudongwang1-7/+12
[Why] Wrong logic cause screen corruption. [How] Port logic from DCN35/314. Cc: [email protected] Reviewed-by: Nicholas Kazlauskas <[email protected]> Acked-by: Hamza Mahfooz <[email protected]> Signed-off-by: Fudongwang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-09drm/amd/display: Do not recursively call manual trigger programmingDillon Varone1-3/+0
[WHY&HOW] We should not be recursively calling the manual trigger programming function when FAMS is not in use. Cc: [email protected] Reviewed-by: Alvin Lee <[email protected]> Acked-by: Hamza Mahfooz <[email protected]> Signed-off-by: Dillon Varone <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-09drm/amd/display: Add driver support for future FAMS versionsDillon Varone11-6/+37
[WHY&HOW] Changes to support future versions of FAMS. Reviewed-by: Alvin Lee <[email protected]> Acked-by: Hamza Mahfooz <[email protected]> Signed-off-by: Dillon Varone <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-09drm/amd/pm: Allow setting soft max frequency in VFLijo Lazar1-1/+6
Setting soft max frequency for MCLK is allowed in 1VF mode in SMUv13.0.6 SOCs. Signed-off-by: Lijo Lazar <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-09drm/amd/display: fix an incorrect ODM policy assigned for subvpWenjing Liu1-13/+15
[why] When Subvp pipe's index is smaller than main pipe's index, the main pipe's ODM policy is not yet assigned. If we assign subvp pipe's ODM policy based on main pipe, we will assign uninitialized ODM policy. [how] Instead of copying main pipe's policy we copy the main pipe ODM policy logic. So it doesn't matter whether if main pipe's ODM policy is set, phantom pipe will always have the same policy because it running the same calcualtion to derive ODM policy. Cc: [email protected] Reviewed-by: Alvin Lee <[email protected]> Acked-by: Hamza Mahfooz <[email protected]> Signed-off-by: Wenjing Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-09drm/amd/display: always reset ODM mode in context when adding first planeWenjing Liu1-0/+9
[why] In current implemenation ODM mode is only reset when the last plane is removed from dc state. For any dc validate we will always remove all current planes and add new planes. However when switching from no planes to 1 plane, ODM mode is not reset because no planes get removed. This has caused an issue where we kept ODM combine when it should have been remove when a plane is added. The change is to reset ODM mode when adding the first plane. Cc: [email protected] Reviewed-by: Alvin Lee <[email protected]> Acked-by: Hamza Mahfooz <[email protected]> Signed-off-by: Wenjing Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-09drm/amdgpu: fix incorrect number of active RBs for gfx11Tim Huang1-1/+1
The RB bitmap should be global active RB bitmap & active RB bitmap based on active SA. Signed-off-by: Tim Huang <[email protected]> Reviewed-by: Yifan Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-09drm/amd/display: Return max resolution supported by DWBAlex Hung1-4/+2
mode_config's max width x height is 4096x2160 and is higher than DWB's max resolution 3840x2160 which is returned instead. Cc: [email protected] Reviewed-by: Harry Wentland <[email protected]> Acked-by: Hamza Mahfooz <[email protected]> Signed-off-by: Alex Hung <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-09drm/amd/display: Add option to configure mapping policy for edp0 on dp1Lewis Huang2-1/+9
[Why] We want flexibility to choose how pwrseq instance is mapped to eDP panel [How] Add configuration option to choose the pwrseq mapping policy. When enabled, allow fixed mapping between DIG inst to pwrseq inst. Reviewed-by: Anthony Koo <[email protected]> Acked-by: Hamza Mahfooz <[email protected]> Signed-off-by: Lewis Huang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-09amd/amdgpu: improve VF recover timeZhigang Luo3-1/+3
1. change AMDGPU_VF2PF_UPDATE_MAX_RETRY_LIMIT from 30 to 5. 2. set fatel error detected flag. Signed-off-by: Zhigang Luo <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-09amd/amdkfd: sync all devices to wait all processes being evictedZhigang Luo1-11/+6
If there are more than one device doing reset in parallel, the first device will call kfd_suspend_all_processes() to evict all processes on all devices, this call takes time to finish. other device will start reset and recover without waiting. if the process has not been evicted before doing recover, it will be restored, then caused page fault. Signed-off-by: Zhigang Luo <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-09drm/amd/pm: Categorize RAS messages on SMUv13.0.6Lijo Lazar1-5/+6
Set RAS priority handling capability for SMUv13.0.6 SOCs and categorize RAS priority messages allowed. Signed-off-by: Lijo Lazar <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Reviewed-by: Asad Kamal <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-09drm/amd/pm: Add special handling for RAS messagesLijo Lazar1-6/+59
When a RAS fatal error is detected, PMFW will only process priority messages. Other messages won't be taken up for processing and therefore won't get any response in such a state. Add logic to filter out non-priority messages when RAS error is detected. Also, don't poll response response status register before sending priority messages. Use firmware capability flag to determine whether to filter priority messages. Signed-off-by: Lijo Lazar <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Reviewed-by: Asad Kamal <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-09drm/amd/pm: Add PMFW message and capability flagsLijo Lazar3-4/+12
Add flags to categorize messages and PMFW capabilities. Signed-off-by: Lijo Lazar <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Reviewed-by: Asad Kamal <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-09drm/amdgpu: Set fatal errror detected flag earlierLijo Lazar1-13/+28
In case of fatal errors, set FED status when interrupt is received. Set the flag on other devices in the hive before RAS recovery work. Signed-off-by: Lijo Lazar <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Reviewed-by: Asad Kamal <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-09drm/amd/display: Add missing parameter desc in dc_commit_streamsSrinivasan Shanmugam1-2/+1
This commit removes the lines that describe the 'streams' and 'stream_count' parameters and adds a line to describe the 'params' parameter, which was missing from the original comment block. Fixes the below with gcc W=1: drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc.c:2138: warning: Function parameter or member 'params' not described in 'dc_commit_streams' drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc.c:2138: warning: Excess function parameter 'streams' description in 'dc_commit_streams' drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc.c:2138: warning: Excess function parameter 'stream_count' description in 'dc_commit_streams' Fixes: e779f4587f61 ("drm/amd/display: Add handling for DC power mode") Cc: Joshua Aberback <[email protected]> Cc: Rodrigo Siqueira <[email protected]> Cc: Roman Li <[email protected]> Cc: Aurabindo Pillai <[email protected]> Cc: Tom Chung <[email protected]> Signed-off-by: Srinivasan Shanmugam <[email protected]> Reviewed-by: Tom Chung <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-09drm/amd/pm: Update uclk/sclk limit report formatAsad Kamal1-6/+10
Use OD (pp_od_clk_voltage) interface to report current limits, default or those set by user, for SCLK and UCLK on aldebaran. Signed-off-by: Asad Kamal <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-09drm/amd/pm: Report uclk/sclk current limitsAsad Kamal1-4/+10
Use OD (pp_od_clk_voltage) interface to report current limits, default or those set by user, for SCLK and UCLK on smu_v_13_0_6 Signed-off-by: Asad Kamal <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-09drm/amdgpu: clear set_q_mode_offs when VM changedZhenGuo Yin1-0/+1
[Why] set_q_mode_offs don't get cleared after GPU reset, nexting SET_Q_MODE packet to init shadow memory will be skiped, hence there has a page fault. [How] VM flush is needed after GPU reset, clear set_q_mode_offs when emitting VM flush. Fixes: 8bc75586ea01 ("drm/amdgpu: workaround to avoid SET_Q_MODE packets v2") Reviewed-by: Christian König <[email protected]> Signed-off-by: ZhenGuo Yin <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-09drm/amdgpu: retire UMC v12 mca_addr_to_paTao Zhou3-161/+7
RAS TA will handle it, the function is useless. Signed-off-by: Tao Zhou <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-09drm/amd/amdgpu: support MES command SET_HW_RESOURCE1 in sriovchongli26-3/+85
support MES command SET_HW_RESOURCE1 in sriov Signed-off-by: chongli2 <[email protected]> Reviewed-by: Jingwen Chen <[email protected]> Acked-by: Jingwen Chen <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-09drm/amdgpu: update check condition for XGMI ACA UETao Zhou1-1/+3
Check more possible ext error codes. Signed-off-by: Tao Zhou <[email protected]> Reviewed-by: Yang Wang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-09drm/amd/pm: update XGMI RAS UE criteria for sum v13.0.6Tao Zhou1-1/+2
Add more possible ext error code. v2: still use ext error code instead of UC bit. Signed-off-by: Tao Zhou <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-09drm/amdgpu: Fix VCN allocation in CPX partitionLijo Lazar1-4/+11
VCN need not be shared in CPX mode always for all GFX 9.4.3 SOC SKUs. In certain configs, VCN instance can be exclusively allocated to a partition even under CPX mode. Signed-off-by: Lijo Lazar <[email protected]> Reviewed-by: James Zhu <[email protected]> Reviewed-by: Asad Kamal <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-09drm/amdgpu/pm: Check AMDGPU_RUNPM_BAMACO when setting baco stateMa Jun3-5/+4
Check AMDGPU_RUNPM_BAMACO intead of amdgpu_runtime_pm when setting baco state. Signed-off-by: Ma Jun <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-09drm/amdgpu: Add support for BAMACO mode checkingMa Jun3-8/+27
Optimize the code to add support for BAMACO mode checking Signed-off-by: Ma Jun <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-09drm/amd/pm: centralize all pp_dpm_xxx attribute nodes update cbYang Wang1-92/+115
centralize all pp_dpm_xxx attr nodes into pp_dpm_clk_default_attr_update() function. Signed-off-by: Yang Wang <[email protected]> Reviewed-by: Kenneth Feng <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-09drm/amdgpu: Bypass asd if display hw is not availableHawking Zhang1-0/+5
ASD is not needed by headless GPU. Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Kenneth Feng <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-09drm/amdgpu/pm: Add support for MACO flag checkingMa Jun27-64/+79
Add support for MACO flag checking. MACO mode only works if BACO is supported. Signed-off-by: Ma Jun <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-09drm/amdgpu/pm: Change the member function name in pp_hwmgr_func and ↵Ma Jun27-32/+34
pptable_funcs Use a unified and more explicit name get_bamaco_support to replace is_baco_support and get_asic_baco_capability Signed-off-by: Ma Jun <[email protected]> Suggested-by: Lijo Lazar <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-09drm/amdgpu: Add a new runtime mode definitionMa Jun1-0/+4
Add a new runtime pm mode AMDGPU_RUNPM_BAMACO and related macro definition Signed-off-by: Ma Jun <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-09drm/amd/pm: fix the high voltage issue after unloadKenneth Feng4-14/+48
fix the high voltage issue after unload on smu 13.0.10 Signed-off-by: Kenneth Feng <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-09drm/amd/display: Enable FGCG for DCN351Rodrigo Siqueira1-0/+2
Signed-off-by: Rodrigo Siqueira <[email protected]> Acked-by: Roman Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-09drm/amd/display: Add color logs for dcn20Rodrigo Siqueira1-0/+1
Signed-off-by: Rodrigo Siqueira <[email protected]> Acked-by: Roman Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-09drm/amd/display: Includes adjustmentsRodrigo Siqueira5-10/+1
This commit clean up some of the includes used by DCN. Signed-off-by: Rodrigo Siqueira <[email protected]> Acked-by: Roman Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-09drm/amd/display: Add code comments clock and encode codeRodrigo Siqueira4-7/+16
This commit adds some comments to make easier to understand the clock update for DCN 201, the encode function, and other minor comments. Signed-off-by: Rodrigo Siqueira <[email protected]> Acked-by: Roman Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-09drm/amd/display: Add WBSCL ram coefficient for writebackRodrigo Siqueira1-0/+11
Signed-off-by: Rodrigo Siqueira <[email protected]> Acked-by: Roman Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-09drm/amd/display: Fix MPCC DTN loggingEric Bernstein1-1/+1
[Why] DTN only logs 'pipe_count' instances of MPCC. However in some cases there are different number of MPCC than DPP (pipe_count). [How] Add mpcc_count parameter to resource_pool and set it during pool construction and use it for DTN logging of MPCC state. Signed-off-by: Eric Bernstein <[email protected]> Reviewed-by: Rodrigo Siqueira <[email protected]> Acked-by: Roman Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-09drm/amd/display: Initialize debug variable dataRodrigo Siqueira1-1/+1
Signed-off-by: Rodrigo Siqueira <[email protected]> Acked-by: Roman Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-09drm/amd/display: Add missing SFB and OPP_SFRodrigo Siqueira2-0/+2
Signed-off-by: Rodrigo Siqueira <[email protected]> Acked-by: Roman Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-09drm/amd/display: Remove redundant RESERVE0 and RESERVE1Rodrigo Siqueira1-2/+1
This commit drops the RESERVE0 and RESERVE1 since both of them can be summarized as RESERVED. Signed-off-by: Rodrigo Siqueira <[email protected]> Acked-by: Roman Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-09drm/amd/display: Add missing registersRodrigo Siqueira8-1/+149
Signed-off-by: Rodrigo Siqueira <[email protected]> Acked-by: Roman Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-09drm/amd/display: Drop legacy codeRodrigo Siqueira2-23/+0
Signed-off-by: Rodrigo Siqueira <[email protected]> Acked-by: Roman Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-09drm/amd/display: Update DSC compute parameter calculationRodrigo Siqueira1-4/+3
Adjust bytes per pixel calculation to use div_u64. Signed-off-by: Rodrigo Siqueira <[email protected]> Acked-by: Roman Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-09drm/amd/display: Add some missing debug registersRodrigo Siqueira8-0/+85
Signed-off-by: Rodrigo Siqueira <[email protected]> Acked-by: Roman Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-09drm/amd/display: Enable cur_rom_en even if cursor degamma is not enabledRodrigo Siqueira1-3/+1
Signed-off-by: Rodrigo Siqueira <[email protected]> Acked-by: Roman Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-09drm/amd/display: Set alpha enable to 0 for some specific formatsRodrigo Siqueira1-0/+4
Set alpha_en to 0 in some specific color formats. Signed-off-by: Rodrigo Siqueira <[email protected]> Acked-by: Roman Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-09drm/amd/display: Initialize DP ref clk with the correct clockRodrigo Siqueira1-2/+2
Signed-off-by: Rodrigo Siqueira <[email protected]> Acked-by: Roman Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-09drm/amd/display: 3.2.279Aric Cyr1-1/+1
This version pairs with DMUB FW Release 0.0.211.0 for dcn314, dcn35, dcn351 and brings along the following: - Fix underflow in subvp/non-subvp configs - Fix compiler warnings - Add handling for DC power mode - Add extra logging for DMUB, HUBP and OTG - Add timing pixel encoding for mst mode validation - Expand supported Replay residency mode - Allow HPO PG and RCG for DCN35 - Update pipe topology log to support subvp - Disable Z8 minimum stutter period check for DCN35 - Enable RCO for HDMISTREAMCLK in DCN35 Acked-by: Roman Li <[email protected]> Signed-off-by: Aric Cyr <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-09drm/amd/display: Allow RCG for Static Screen + LVP for DCN35Roman Li1-1/+3
[Why] We want to block IPS2 for static screen but allow it for power state transitions. [How] Set DalDisableIPS=6 for DCN35 which allows: 1. RCG during static screen 2. RCG during LVP 3. IPS2 for display off / S0i3 Reviewed-by: Nicholas Kazlauskas <[email protected]> Acked-by: Roman Li <[email protected]> Signed-off-by: Nicholas Kazlauskas <[email protected]> Signed-off-by: Roman Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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