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2023-06-09drm/amdgpu: add the accelerator PCIe classShiwu Zhang3-3/+2
Add the accelerator PCIe class and match the class in amdgpu for 0x1002 devices of that class. From PCI spec: "PCI Code and ID Assignment, r1.9, sec 1, 1.19" Signed-off-by: Shiwu Zhang <[email protected]> Acked-by: Lijo Lazar <[email protected]> Acked-by: Bjorn Helgaas <[email protected]> # pci_ids.h Signed-off-by: Alex Deucher <[email protected]>
2023-06-09Revert "Revert drm/amd/display: Enable Freesync Video Mode by default"Aurabindo Pillai1-7/+5
This reverts commit 4243c84aa082d8fba70c45f48eb2bb5c19799060. Enables freesync video by default, since the hang and corruption issue on eDP panels are now fixed. Acked-by: Stylon Wang <[email protected]> Signed-off-by: Aurabindo Pillai <[email protected]> Reviewed-by: Rodrigo Siqueira <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-06-09drm/amdkfd: fix and enable debugging for gfx11Jonathan Kim7-17/+25
There are a couple of fixes required to enable gfx11 debugging. First, ADD_QUEUE.trap_en is an inappropriate place to toggle a per-process register so move it to SET_SHADER_DEBUGGER.trap_en. When ADD_QUEUE.skip_process_ctx_clear is set, MES will prioritize the SET_SHADER_DEBUGGER.trap_en setting. Second, to preserve correct save/restore priviledged wave states in coordination with the trap enablement setting, resume suspended waves early in the disable call. Signed-off-by: Jonathan Kim <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-06-09drm/amd: Tighten permissions on VBIOS flashing attributesMario Limonciello1-2/+2
Non-root users shouldn't be able to try to trigger a VBIOS flash or query the flashing status. This should be reserved for users with the appropriate permissions. Cc: [email protected] Fixes: 8424f2ccb3c0 ("drm/amdgpu/psp: Add vbflash sysfs interface support") Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Mario Limonciello <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-06-09drm/amd: Make sure image is written to trigger VBIOS image update flowMario Limonciello1-0/+3
The VBIOS image update flow requires userspace to: 1) Write the image to `psp_vbflash` 2) Read `psp_vbflash` 3) Poll `psp_vbflash_status` to check for completion If userspace reads `psp_vbflash` before writing an image, it's possible that it causes problems that can put the dGPU into an invalid state. Explicitly check that an image has been written before letting a read succeed. Cc: [email protected] Fixes: 8424f2ccb3c0 ("drm/amdgpu/psp: Add vbflash sysfs interface support") Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Mario Limonciello <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-06-09drm/amd/pm: enable more Pstates profile levels for SMU v13.0.4Tim Huang1-1/+53
This patch enables following UMD stable Pstates profile levels for power_dpm_force_performance_level interface. - profile_peak - profile_min_mclk - profile_min_sclk - profile_standard Signed-off-by: Tim Huang <[email protected]> Acked-by: Alex Deucher <[email protected]> Reviewed-by: Yifan Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-06-09drm/amd/pm: enable vclk and dclk Pstates for SMU v13.0.4Tim Huang1-0/+29
Add the ability to control the vclk and dclk frequency by power_dpm_force_performance_level interface. Signed-off-by: Tim Huang <[email protected]> Acked-by: Alex Deucher <[email protected]> Reviewed-by: Yifan Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-06-09drm/amd/pm: fix vclk setting failed for SMU v13.0.4Tim Huang2-2/+11
PMFW use the left-shifted 16 bits argument to set the VCLK DPM frequency for SMU v13.0.4. Signed-off-by: Tim Huang <[email protected]> Acked-by: Alex Deucher <[email protected]> Reviewed-by: Yifan Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-06-09drm/amdgpu: skip to resume rlcg for gc 9.4.3 in vf sideYang Wang1-5/+10
skip to resume rlcg, because rlcg is already enabled in pf side. Signed-off-by: Yang Wang <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-06-09drm/amdgpu: disable virtual display support on APP deviceYang Wang1-1/+2
virtual display is not support on APP device. Signed-off-by: Yang Wang <[email protected]> Signed-off-by: Gavin Wan <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-06-09drm/amdgpu: unmap and remove csa_va properlyLang Yu3-5/+46
Root PD BO should be reserved before unmap and remove a bo_va from VM otherwise lockdep will complain. v2: check fpriv->csa_va is not NULL instead of amdgpu_mcbp (christian) [14616.936827] WARNING: CPU: 6 PID: 1711 at drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c:1762 amdgpu_vm_bo_del+0x399/0x3f0 [amdgpu] [14616.937096] Call Trace: [14616.937097] <TASK> [14616.937102] amdgpu_driver_postclose_kms+0x249/0x2f0 [amdgpu] [14616.937187] drm_file_free+0x1d6/0x300 [drm] [14616.937207] drm_close_helper.isra.0+0x62/0x70 [drm] [14616.937220] drm_release+0x5e/0x100 [drm] [14616.937234] __fput+0x9f/0x280 [14616.937239] ____fput+0xe/0x20 [14616.937241] task_work_run+0x61/0x90 [14616.937246] exit_to_user_mode_prepare+0x215/0x220 [14616.937251] syscall_exit_to_user_mode+0x2a/0x60 [14616.937254] do_syscall_64+0x48/0x90 [14616.937257] entry_SYSCALL_64_after_hwframe+0x63/0xcd Signed-off-by: Lang Yu <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-06-09drm/amd/display: Refactor avi_info_frame colorimetry determinationJoshua Ashton1-11/+17
Replace the messy two if-else chains here that were on the same value with a switch on the enum. Signed-off-by: Joshua Ashton <[email protected]> Signed-off-by: Harry Wentland <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Cc: Pekka Paalanen <[email protected]> Cc: Sebastian Wick <[email protected]> Cc: [email protected] Cc: Joshua Ashton <[email protected]> Cc: Simon Ser <[email protected]> Cc: Melissa Wen <[email protected]> Cc: [email protected] Cc: [email protected] Signed-off-by: Alex Deucher <[email protected]>
2023-06-09drm/amd/display: Add debugfs for testing output colorspaceHarry Wentland1-0/+57
In order to IGT test colorspace we'll want to print the currently enabled colorspace on a stream. We add a new debugfs to do so, using the same scheme as current bpc reporting. This might also come in handy when debugging display issues. v4: - Fix function doc comment - Fix sRGB debug print Signed-off-by: Harry Wentland <[email protected]> Reviewed-by: Joshua Ashton <[email protected]> Cc: Pekka Paalanen <[email protected]> Cc: Sebastian Wick <[email protected]> Cc: [email protected] Cc: Joshua Ashton <[email protected]> Cc: Simon Ser <[email protected]> Cc: Melissa Wen <[email protected]> Cc: [email protected] Cc: [email protected] Signed-off-by: Alex Deucher <[email protected]>
2023-06-09drm/amd/display: Always set crtcinfo from create_stream_for_sinkJoshua Ashton1-1/+1
Given that we always pass dm_state into here now, this won't ever trigger anymore. This is needed for we will always fail mode validation with invalid clocks or link bandwidth errors. Signed-off-by: Joshua Ashton <[email protected]> Signed-off-by: Harry Wentland <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Cc: Pekka Paalanen <[email protected]> Cc: Sebastian Wick <[email protected]> Cc: [email protected] Cc: Joshua Ashton <[email protected]> Cc: Simon Ser <[email protected]> Cc: Melissa Wen <[email protected]> Cc: [email protected] Cc: [email protected] Signed-off-by: Alex Deucher <[email protected]>
2023-06-09drm/amd/display: Send correct DP colorspace infopacketHarry Wentland1-17/+31
Look at connector->colorimetry to determine output colorspace. We don't want to impact current SDR behavior, so DRM_MODE_COLORIMETRY_DEFAULT preserves current behavior. Also add support to explicitly set BT601 and BT709. v4: - Roll support for BT709 and BT601 into this patch - Add default case to avoid warnings for unhandled enum values Signed-off-by: Harry Wentland <[email protected]> Reviewed-by: Joshua Ashton <[email protected]> Cc: Pekka Paalanen <[email protected]> Cc: Sebastian Wick <[email protected]> Cc: [email protected] Cc: Joshua Ashton <[email protected]> Cc: Simon Ser <[email protected]> Cc: Melissa Wen <[email protected]> Cc: [email protected] Cc: [email protected] Signed-off-by: Alex Deucher <[email protected]>
2023-06-09drm/amd/display: Signal mode_changed if colorspace changedHarry Wentland1-1/+9
We need to signal mode_changed to make sure we update the output colorspace. v2: No need to call drm_hdmi_avi_infoframe_colorimetry as DC does its own infoframe packing. Signed-off-by: Harry Wentland <[email protected]> Reviewed-by: Leo Li <[email protected]> Reviewed-by: Joshua Ashton <[email protected]> Cc: Pekka Paalanen <[email protected]> Cc: Sebastian Wick <[email protected]> Cc: [email protected] Cc: Uma Shankar <[email protected]> Cc: Joshua Ashton <[email protected]> Cc: Simon Ser <[email protected]> Cc: Melissa Wen <[email protected]> Cc: [email protected] Cc: [email protected] Signed-off-by: Alex Deucher <[email protected]>
2023-06-09drm/amd/display: Register Colorspace property for DP and HDMIHarry Wentland1-0/+15
We want compositors to be able to set the output colorspace on DP and HDMI outputs, based on the caps reported from the receiver via EDID. Signed-off-by: Harry Wentland <[email protected]> Reviewed-by: Joshua Ashton <[email protected]> Cc: Pekka Paalanen <[email protected]> Cc: Sebastian Wick <[email protected]> Cc: [email protected] Cc: Joshua Ashton <[email protected]> Cc: Simon Ser <[email protected]> Cc: Ville Syrjälä <[email protected]> Cc: Melissa Wen <[email protected]> Cc: [email protected] Cc: [email protected] Signed-off-by: Alex Deucher <[email protected]>
2023-06-09drm/amd/display: Always pass connector_state to stream validationHarry Wentland1-4/+5
We need the connector_state for colorspace and scaling information and can get it from connector->state. Signed-off-by: Harry Wentland <[email protected]> Reviewed-by: Joshua Ashton <[email protected]> Cc: Pekka Paalanen <[email protected]> Cc: Sebastian Wick <[email protected]> Cc: [email protected] Cc: Joshua Ashton <[email protected]> Cc: Simon Ser <[email protected]> Cc: Melissa Wen <[email protected]> Cc: [email protected] Cc: [email protected] Signed-off-by: Alex Deucher <[email protected]>
2023-06-09drm/amdkfd: Fix reserved SDMA queues handlingMukul Joshi3-13/+12
This patch fixes a regression caused by a bad merge where the handling of reserved SDMA queues was accidentally removed. With the fix, the reserved SDMA queues are again correctly marked as unavailable for allocation. Fixes: a805889a1531 ("drm/amdkfd: Update SDMA queue management for GFX9.4.3") Signed-off-by: Mukul Joshi <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-06-09drm/amdgpu: add missing radeon secondary PCI IDAlex Deucher1-0/+1
0x5b70 is a missing RV370 secondary id. Add it so we don't try and probe it with amdgpu. Cc: [email protected] Reviewed-by: Michel Dänzer <[email protected]> Tested-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-06-09drm/amd: Check that a system is a NUMA system before looking for SRATMario Limonciello1-1/+2
It's pointless on laptops to look for the SRAT table as these are not NUMA. Check the number of possible nodes is > 1 to decide whether to look for SRAT. Suggested-by: Felix Kuehling <[email protected]> Signed-off-by: Mario Limonciello <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-06-09drm/amdkfd: fix vmfault signalling with additional data.Jonathan Kim1-14/+20
Exception handling for vmfaults should be raised with additional data. Reported-by: Mukul Joshi <[email protected]> Signed-off-by: Jonathan Kim <[email protected]> Reviewed-by: Mukul Joshi <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-06-09drm/amdgpu: Set EEPROM ras infoStanley.Yang2-0/+29
Set EEPROM ras info: rma status, health percent and bad page threshold. Signed-off-by: Stanley.Yang <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-06-09drm/amdgpu: Calculate EEPROM table ras info bytes sumStanley.Yang1-0/+19
It's more reasonable to check EEPROM table ras info bytes. Signed-off-by: Stanley.Yang <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-06-09drm/amdgpu: Add support EEPROM table v2.1Stanley.Yang3-15/+203
Add ras info to EEPROM table, app can analyse device ECC status without GPU driver through EEPROM table ras info. Signed-off-by: Stanley.Yang <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-06-09drm/amdgpu: Support setting EEPROM table versionStanley.Yang2-0/+8
Add setting EEPROM table version interface for umcv8.10, Add EEPROM table v2.1 to UMC v8.10. Signed-off-by: Stanley.Yang <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-06-09drm/amdgpu: Add RAS table v2.1 macro definitionStanley.Yang2-0/+14
Add RAS EEPROM table version 2.1 macro definition. Signed-off-by: Stanley.Yang <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-06-09drm/amdgpu: Rename ras table versionStanley.Yang2-3/+4
Rename RAS_TABLE_VER to RAS_TABLE_VER_V1, move RAS_TABLE_VER_V1 from amdgpu_ras_eeprom.c to amdgpu_ras_eeprom.h. Signed-off-by: Stanley.Yang <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-06-09drm/amdgpu: Implement gfx9 patch functions for resubmissionJiadong Zhu1-0/+80
Patch the packages including CONTEXT_CONTROL and WRITE_DATA for gfx9 during the resubmission scenario. Signed-off-by: Jiadong Zhu <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-06-09drm/amdgpu: Modify indirect buffer packages for resubmissionJiadong Zhu4-0/+102
When the preempted IB frame resubmitted to cp, we need to modify the frame data including: 1. set PRE_RESUME 1 in CONTEXT_CONTROL. 2. use meta data(DE and CE) read from CSA in WRITE_DATA. Add functions to save the location the first time IBs emitted and callback to patch the package when resubmission happens. Signed-off-by: Jiadong Zhu <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-06-09drm/amdgpu/mmsch: Correct the definition for mmsch init headerEmily Deng4-4/+8
For the header, it is version related, shouldn't use MAX_VCN_INSTANCES. Signed-off-by: Emily Deng <[email protected]> Reviewed-by: Feifei Xu <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-06-09drm/amdkfd: potential error pointer dereference in ioctlDan Carpenter1-2/+2
The "target" either comes from kfd_create_process() which returns error pointers on error or kfd_lookup_process_by_pid() which returns NULL on error. So we need to check for both types of errors. Fixes: 0ab2d7532b05 ("drm/amdkfd: prepare per-process debug enable and disable") Signed-off-by: Dan Carpenter <[email protected]> Reviewed-by: Jonathan Kim <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-06-09drm/amd/display: Only use ODM2:1 policy for high pixel rate displaysAurabindo Pillai2-0/+2
We only gain a benefit of using the ODM2:1 dynamic policy if it allow us to decrease DISPCLK to use the VMIN freq. If the display config can already achieve VMIN DISPCLK freq without ODM2:1, don't apply the policy. This patch was reverted but that causes some IGT regressions. To unblock, the patch is being applied again until IGT failures are fixed. Signed-off-by: Alvin Lee <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Signed-off-by: Aurabindo Pillai <[email protected]> Reviewed-by: Rodrigo Siqueira <[email protected]>
2023-06-09drm/amd/pm: Fix memory some memory corruptionDan Carpenter2-4/+4
The "od_table" is a pointer to a large struct, but this code is doing pointer math as if it were pointing to bytes. It results in writing far outside the struct. Fixes: 2e8452ea4ef6 ("drm/amd/pm: fulfill the OD support for SMU13.0.0") Fixes: 2a9aa52e4617 ("drm/amd/pm: fulfill the OD support for SMU13.0.7") Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Dan Carpenter <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-06-09drm/amdgpu: display/Kconfig: replace leading spaces with tabSui Jingfeng1-10/+7
This patch replace the leading spaces with tab, make them keep aligned with the rest of the config options. No functional change. Signed-off-by: Sui Jingfeng <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-06-09drm/amd/display: mark dml314's UseMinimumDCFCLK() as noinline_for_stackHamza Mahfooz1-1/+1
clang reports: drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn314/display_mode_vba_314.c:3892:6: error: stack frame size (2632) exceeds limit (2048) in 'dml314_ModeSupportAndSystemConfigurationFull' [-Werror,-Wframe-larger-than] 3892 | void dml314_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_lib) | ^ 1 error generated. So, since UseMinimumDCFCLK() consumes a lot of stack space, mark it as noinline_for_stack to prevent it from blowing up dml314_ModeSupportAndSystemConfigurationFull()'s stack size. Acked-by: Alex Deucher <[email protected]> Signed-off-by: Hamza Mahfooz <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-06-09drm/amd/display: mark dml31's UseMinimumDCFCLK() as noinline_for_stackHamza Mahfooz1-1/+1
clang reports: drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn31/display_mode_vba_31.c:3797:6: error: stack frame size (2632) exceeds limit (2048) in 'dml31_ModeSupportAndSystemConfigurationFull' [-Werror,-Wframe-larger-than] 3797 | void dml31_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_lib) | ^ 1 error generated. So, since UseMinimumDCFCLK() consumes a lot of stack space, mark it as noinline_for_stack to prevent it from blowing up dml31_ModeSupportAndSystemConfigurationFull()'s stack size. Acked-by: Alex Deucher <[email protected]> Signed-off-by: Hamza Mahfooz <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-06-09drm/amd/display: Fix unused variable ‘should_lock_all_pipes’Srinivasan Shanmugam1-1/+0
Fix below compilation error: drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc.c:3524:7: error: unused variable 'should_lock_all_pipes' [-Werror,-Wunused-variable] bool should_lock_all_pipes = (update_type != UPDATE_TYPE_FAST); Cc: Rodrigo Siqueira <[email protected]> Cc: Aurabindo Pillai <[email protected]> Cc: Harry Wentland <[email protected]> Cc: Alex Deucher <[email protected]> Reviewed-by: Hamza Mahfooz <[email protected]> Signed-off-by: Srinivasan Shanmugam <[email protected]> Signed-off-by: Hamza Mahfooz <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-06-09drm/amd/display: Reduce sdp bw after urgent to 90%Alvin Lee1-1/+1
[Description] Reduce expected SDP bandwidth due to poor QoS and arbitration issues on high bandwidth configs Cc: Mario Limonciello <[email protected]> Cc: Alex Deucher <[email protected]> Cc: [email protected] Acked-by: Stylon Wang <[email protected]> Signed-off-by: Alvin Lee <[email protected]> Reviewed-by: Nevenko Stupar <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-06-09drm/amd/display: Add control flag to dc_stream_state to skip eDP BL off/link offMax Tseng3-4/+7
Add control flag to dc_stream_state to skip eDP BL off/link off. Acked-by: Stylon Wang <[email protected]> Signed-off-by: Max Tseng <[email protected]> Reviewed-by: Anthony Koo <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-06-09drm/amd/display: Wrong index type for pipe iteratorSaaem Rizvi2-2/+2
[Why and How] Type mismatch in index and pipe count might cause an infinite loop. code Change should resolve this issue. Acked-by: Stylon Wang <[email protected]> Signed-off-by: Saaem Rizvi <[email protected]> Reviewed-by: Josip Pavic <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-06-09drm/amd/display: Refactor fast update to use new HWSS build sequenceAlvin Lee20-30/+693
[Description] - Refactor HW sequencer to use a build / execute sequence - Also move gamma updates to become fast v2: squash in build fix ("drm/amd/display: Fix guarding of 'if (dc->debug.visual_confirm)'") Acked-by: Stylon Wang <[email protected]> Signed-off-by: Alvin Lee <[email protected]> Reviewed-by: Jun Lei <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-06-09drm/amd/display: fix dcn315 single stream crb allocationDmytro Laktyushkin1-3/+12
Change to improve avoiding asymetric crb calculations for single stream scenarios. Cc: Mario Limonciello <[email protected]> Cc: Alex Deucher <[email protected]> Cc: [email protected] Acked-by: Stylon Wang <[email protected]> Signed-off-by: Dmytro Laktyushkin <[email protected]> Reviewed-by: Charlene Liu <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-06-09drm/amdgpu: change reserved vram info printYiPeng Chai1-3/+4
The link object of mgr->reserved_pages is the blocks variable in struct amdgpu_vram_reservation, not the link variable in struct drm_buddy_block. Signed-off-by: YiPeng Chai <[email protected]> Reviewed-by: Arunpravin Paneer Selvam <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2023-06-09drm/amdgpu: fix xclk freq on CHIP_STONEYChia-I Wu1-2/+9
According to Alex, most APUs from that time seem to have the same issue (vbios says 48Mhz, actual is 100Mhz). I only have a CHIP_STONEY so I limit the fixup to CHIP_STONEY Signed-off-by: Chia-I Wu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-06-09Revert "drm/amdgpu: switch to golden tsc registers for raven/raven2"Alex Deucher1-40/+0
This reverts commit f03eb1d26c2739b75580f58bbab4ab2d5d3eba46. This results in inconsistent timing reported via asynchronous GPU queries. Link: https://lists.freedesktop.org/archives/amd-gfx/2023-May/093731.html Cc: [email protected] Cc: [email protected] Reviewed-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-06-09Revert "drm/amdgpu: Differentiate between Raven2 and Raven/Picasso according ↵Alex Deucher1-14/+19
to revision id" This reverts commit 9d2d1827af295fd6971786672c41c4dba3657154. This results in inconsistent timing reported via asynchronous GPU queries. Link: https://lists.freedesktop.org/archives/amd-gfx/2023-May/093731.html Cc: [email protected] Cc: [email protected] Reviewed-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-06-09Revert "drm/amdgpu: change the reference clock for raven/raven2"Alex Deucher1-3/+4
This reverts commit fbc24293ca16b3b9ef891fe32ccd04735a6f8dc1. This results in inconsistent timing reported via asynchronous GPU queries. Link: https://lists.freedesktop.org/archives/amd-gfx/2023-May/093731.html Cc: [email protected] Cc: [email protected] Reviewed-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-06-09drm/amdgpu: convert vcn/jpeg logical mask to physical maskStanley.Yang1-0/+4
Changed from V1: Remove amdgpu_ras_logical_mask_to_physical_mask due to GET_MASK provides same feature. Support convert VCN/JPEG logical mask to physical mask. Signed-off-by: Stanley.Yang <[email protected]> Reviewed-by: Tao Zhou <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-06-09drm/amdgpu: support check vcn jpeg block maskStanley.Yang1-1/+5
Support VCN/JPEG instance mask checking, pass logical mask directly except GFX/SDMA/VCN/JPEG blocks. Changed from V1: correct a typo Signed-off-by: Stanley.Yang <[email protected]> Reviewed-by: Tao Zhou <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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