aboutsummaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/amd
AgeCommit message (Collapse)AuthorFilesLines
2019-03-19drm/amd/display: 3.2.20Aric Cyr1-1/+1
Signed-off-by: Aric Cyr <[email protected]> Reviewed-by: Aric Cyr <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-03-19drm/amd/display: Fix soft hang issue when some DPCD data invalidAnthony Koo1-0/+9
[Why] AUX transaction returns success, but data has invalid lane count and rate which when passed to VBIOS command table causes it to soft hang [How] Do some sanity checking and fail if the DPCD caps are invalid. Signed-off-by: Anthony Koo <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-03-19drm/amd/display: Update plane tiling attributes for stream updatesNicholas Kazlauskas1-73/+101
[Why] Tiling and DCC attributes can change when swapping framebuffers but these will only ever get updated on full commits where state->allow_modeset is true. But for the page-flip IOCTL state->allow_modeset = false so these aren't updated and DCC changes aren't being programmed. [How] Split out updating the tiling and DCC attributes into its own function that's called when creating the plane for the first time but also called when switching framebuffers before commit stream updates. These functions also don't modify the plane state directly since the plane state being used as reference is often the current one being used by the hardware. DC needs to be able to compare plane_state to the stream update structures to determine if the hardware programming should happen. If it's modified in place then nothing will be programmed and we can run into concurrency issues. Signed-off-by: Nicholas Kazlauskas <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-03-19drm/amd/display: Re-add custom degamma supportDavid Francis1-0/+2
[Why] The dc_gamma_type CUSTOM_GAMMA is used to represent degamma mappings passed in by drm. This type of gamma must be interpolated into a transfer function by apply_1d_lut. The line in mod_color_calculate_degamma_params that handled this case was erroneously removed. [How] For CUSTOM_GAMMA degamma, calculate the lut as before. Signed-off-by: David Francis <[email protected]> Reviewed-by: Krunoslav Kovac <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-03-19Revert "drm/amd/display: dcn add check surface in_use"Charlene Liu6-97/+4
This reverts commit 6bff1cc7780cca2fd2a775aa7b18b789e2a1b608. [Description] Revert since this will be checked at CP side. Signed-off-by: Charlene Liu <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-03-19drm/amd/display: half bandwidth for YCbCr420 during validationMartin Leung1-13/+20
[Why] used to be unable to run 4:2:0 if using a dongle because 4k60 bandwidth exceeded dongle caps [How] half pixel clock during comparison to dongle cap. *Could get stuck on black screen on monitor that don't support 420 but will be selecting 420 as preferred mode* Signed-off-by: Martin Leung <[email protected]> Reviewed-by: Wenjing Liu <[email protected]> Acked-by: Aidan Wood <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-03-19drm/amd/display: Keep clocks high before seamless boot doneAnthony Koo6-12/+42
[Why] UEFI boot usually uses a boot profile that uses higher clocks and watermark settings. UEFI boot surface is less optimal, for example it uses linear surface [How] Before we finish our seamless boot sequence, keep the clock and watermark settings from boot. Update to optimal settings only after first flip away from UEFI frame buffer. Signed-off-by: Anthony Koo <[email protected]> Reviewed-by: Aric Cyr <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-03-19drm/amd/display: Refactor pageflips plane commitDavid Francis1-68/+64
[Why] commit_planes is indented quite far [How] Move the pageflip code from an if statement to after a continue Signed-off-by: David Francis <[email protected]> Reviewed-by: Nicholas Kazlauskas <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-03-19drm/amd/display: Allow pflips from a framebuffer to itselfDavid Francis1-5/+4
[Why] IGT expects that pageflips can be triggered with the same framebuffer before and after the commit [How] Expand the definition of pageflip to include any change with an old framebuffer and a new framebuffer, even if they're the same Signed-off-by: David Francis <[email protected]> Reviewed-by: Nicholas Kazlauskas <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-03-19drm/amd/display: Create overlay planesNicholas Kazlauskas1-7/+44
[Why] Raven has support for combining pipes for DRM_PLANE_TYPE_OVERLAY use but no overlays are exposed to userspace. [How] Expose overlay planes based on DC plane caps. If all the pipes are in use then the atomic commits can fail, but this is expected behavior for userspace. Only support RGB on overlays for now. Signed-off-by: Nicholas Kazlauskas <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-03-19drm/amd/display: Drop underlay plane supportNicholas Kazlauskas1-57/+19
[Why] Primary and underlay planes were previously exposed to DRM by using max_planes and max_slave_planes. The value for max_planes was always pipe_count + has_underlay. If there was an underlay pipe, then max_slave_planes = 1. Raven has pipe_count = 4, max_planes = 4, and max_slave_planes = 1. So during plane initialziation it was actually "creating" 1 overlay plane and 3 primary planes... or it would be, had its plane_type array not been dm_plane_type_default, which will only create DRM_PLANE_TYPE_PRIMARY planes. We can expose primary planes as supporting more than one CRTC at a time to more closely resemble plane behavior on DCN but userspace doesn't really expect planes to be used in this manner and will either ignore the planes or crash. Planes with index greater than max_streams are marked as supporting all CRTCs. No ASIC currently has primary plane count greater than the stream count but we shouldn't expose more than necessary. [How] Drop support for underlay planes. They aren't well tested and don't fully work right at the moment. Only create one primary plane per CRTC so we're not creating overlays. Initialize plane types directly instead of referencing a misleading array of plane types. Signed-off-by: Nicholas Kazlauskas <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-03-19drm/amd/display: Add plane capabilities to dc_capsNicholas Kazlauskas7-0/+91
[Why] The current dc_caps doesn't provide the information needed to determine the count and type of each plane to be exposed to userspace. There are three types of DRM planes that are exposed to userspace: 1. Primary planes (can be used for modesetting) 2. Overlay planes (can be blended below or above a primary plane) 3. Cursor planes (blended topmost) We need to know the number and type of each in amdgpu_dm to expose to userspace. Hardware supports blending planes below, above or both ways depending on the ASIC. Alpha support is also ASIC dependent. Some hardware has dedicated pipes for overlays and other hardware combines the pipes. All of this should be exposed in a way that DM can query and use. [How] Introduce the dc_plane_cap structure that describes the capabilities for the hw planes. It describes: - the type of the plane - whether the plane can blend with planes below it - whether the plane can blend with planes above it - whether the plane supports per pixel alpha blending - supported formats on the plane (partial list for now) Pre DCN ASICs don't have their full capabilities described for now. They can be updated as needed in the future. Signed-off-by: Nicholas Kazlauskas <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-03-19drm/amd/display: Set stream->mode_changed when connectors changeNicholas Kazlauskas1-2/+1
[Why] The kms_plane@plane-position-covered-pipe-*-planes subtests can produce a sequence of atomic commits such that neither active_changed nor mode_changed but connectors_changed. When this happens we remove the old stream from the context and add a new stream but the new stream doesn't have mode_changed=true set. This incorrect programming sequence causes CRC mismatches to occur in the test. The stream->mode_changed value should be set whenever a new stream is created. [How] A new stream is created whenever drm_atomic_crtc_needs_modeset is true. We previously covered the active_changed and mode_changed conditions for the CRTC but connectors_changed is also checked within drm_atomic_crtc_needs_modeset. So just use drm_atomic_crtc_needs_modeset directly to determine the mode_changed flag. Signed-off-by: Nicholas Kazlauskas <[email protected]> Reviewed-by: Sun peng Li <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-03-19drm/amd/display: Respect aux return valuesThomas Lim5-39/+129
[Why] The new aux implementation was not up to spec. This caused us to fail DP compliance as well as introduced serious delays during system resume. [How] Make dce_aux_transfer_raw return the operation result Make dce_aux_transfer_with_retries delay with udelay instead of msleep, and only on invalid reply. Also fail on the second invalid reply, third timeout, or first of any other error Convert return values to drm error codes in amdgpu_dm As the two aux transfer functions are now noticeably different, change the names to better reflect their functionality and document. There was one last call to dc_link_aux_transfer that should have retries, fix that Signed-off-by: David Francis <[email protected]> Signed-off-by: Thomas Lim <[email protected]> Reviewed-by: David Francis <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Acked-by: Eric Yang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-03-19drm/amd/display: Add function to create 4d19 fixed pointTyler DiBattista2-0/+7
[Why] Implemented for future use Signed-off-by: Tyler DiBattista <[email protected]> Reviewed-by: Eric Bernstein <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-03-19drm/amd/display: add full update commit hint structJun Lei2-0/+6
In some cases we might need to do a full update. Add a commit_hints struct for future use Signed-off-by: Jun Lei <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-03-19drm/amd/display: Poll pending DOWN_REP before enabling the linkMartin Tsai3-6/+6
[Why] With special monitor combination on MST, the UP_REQ could come after clear payload table. It makes the pending DOWN_REP fail to be handled after link training and the new DOWN_REQ will be queued until time out . [How] To move the current polling pending DOWN_REP procedure to after clear payload table to make sure the pending DOWN_REP can be done before enabling the link. Signed-off-by: Martin Tsai <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-03-19drm/amdgpu: Add sysfs files for returning VRAM/GTT info v2Kent Russell2-0/+168
Add 6 files that return (in bytes): The total amount of VRAM/visible VRAM/GTT and the current total used VRAM/visible VRAM/GTT v2: Split used and total into separate files Reviewed-by: Christian König <[email protected]> Signed-off-by: Kent Russell <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-03-19drm/amd/powerplay: add od condition for power limitLikun Gao3-0/+17
Add condition to judge whether overdrive is enabled and correct power limit value for overdrive used by power limit interface. Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Kevin Wang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-03-19drm/amd/powerplay: add limit of pp_feature for smu (v3)Likun Gao10-8/+16
Move pp_feature from the struct of amd_powerplay to amdgpu_device. Add pp_feature limit for overdrive interface. v2: put pp_feature into struct amdgpu_pm. v3: merge feature_mask with pp_feature. Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Kevin Wang <[email protected]> Suggested-by: Alex Deucher <[email protected]> Suggested-by: Huang Rui <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-03-19drm/amd/powerplay: use REG32_PCIE wrapper instead for sw smuHuang Rui1-4/+3
This patch uses REG32_PCIE wrapper instead of writting pci_index2 and reading pci_data2. This sequence should be protected by pcie_idx_lock. Signed-off-by: Huang Rui <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-03-19drm/amd/powerplay: fix the issue of checking on message mappingHuang Rui1-2/+7
The vega20_message_map[index] scope should be in PPSMC_Message_Count not in SMU_MSG_MAX_COUNT. Signed-off-by: Huang Rui <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-03-19drm/amd/powerplay: move setting allowed mask and feature enabling togetherHuang Rui1-4/+4
This patch moves setting allowed mask and feature enabling together to refine the programming sequence. Signed-off-by: Huang Rui <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-03-19drm/amd/powerplay: fix byte alignment issue of smu11 pptableHuang Rui1-3/+3
The smu_11_0_powerplay_table, smu_11_0_power_saving_clock_table, and smu_11_0_overdrive_table need byte alignment. So we must add packed attribute in the definitions. Signed-off-by: Huang Rui <[email protected]> Acked-by: Alex Deucher <[email protected]> Reviewed-by: Kenneth Feng <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-03-19drm/amd/powerplay: fix smc messsage index reportHuang Rui1-5/+5
We actually want to know the index of PPSMC_MSG. Signed-off-by: Huang Rui <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-03-19drm/amd/powerplay: support sysfs to set/get pcieLikun Gao1-0/+38
Add sys interface to set and get pcie info for smu. Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Gui Chengming <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-03-19drm/amd/powerplay: add override pcie parametersLikun Gao1-0/+46
PCIE parameters should be override to fix the conflict between the ASIC capabilities and the system capabilities. Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Gui Chengming <[email protected]> Reviewed-by: Huang Rui <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-03-19drm/amd/powerplay: support sysfs to set socclk, fclk, dcefclkLikun Gao4-35/+201
Add sys interface to set socclk, fclk and dcefclk for smu. Add feature_mask parameter for smu_upload_dpm_level as socclk, fclk and dcefclk have dependency, without feature_mask to point out specific clk will make it fail to set some clk. Fix the function of smu_unforce_dpm_levels. Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Gui Chengming <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-03-19drm/amd/powerplay: support sysfs to get socclk, fclk, dcefclkLikun Gao2-3/+65
Add sys interface to get socclk, fclk and dcefclk for smu. Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Gui Chengming <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-03-19drm/amd/powerplay: add condition for smc table hw initLikun Gao3-33/+13
Smc table hw init should be skipped for suspend/resume when dpm running. Unified feature enable and disable function into smu_system_features_control. Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Kenneth Feng <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-03-19drm/amd/powerplay: add suspend and resume function for smuLikun Gao3-97/+93
Functional the function of smu suspend and resume. Modified the function of smu_smc_table_hw_init to make it useful for smu resume. Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Kenneth Feng <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-03-19drm/amd/powerplay: add is_dpm_running for SMU11Chengming Gui2-0/+25
add is_dpm_running function to support smu s3 case. Signed-off-by: Chengming Gui <[email protected]> Reviewed-by: Huang Rui <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-03-19drm/amd/powerplay: add smu_late_init for SMU11.Chengming Gui1-1/+14
add smu_late_init to complete smu init sequence for SMU11. Signed-off-by: Chengming Gui <[email protected]> Reviewed-by: Likun Gao <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-03-19drm/amd/powerplay: set dpm table of vclk/dclk/eclk for smu11 (v2)Likun Gao1-12/+6
Set default dpm table fo vclk, dclk and eclk. Open clk adjust rules for vclk, dclk. v2: Open clk adjust rules for eclk. Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Huang Rui <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-03-19drm/amd/powerplay: get eclk/vclk/dclk for smu11Likun Gao2-0/+45
Get eclk, vclk and dclk info from vbios when hw init for smu11. Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Huang Rui <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-03-19drm/amd/powerplay: set fan target interface for hwmonLikun Gao3-2/+44
Add fan1_target set interface to set fan speed for hwmon. Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Kevin Wang <[email protected]> Reviewed-by: Huang Rui <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-03-19drm/amd/powerplay: implement fan1_enable hwmon interface for SMU11 (v2)Chengming Gui2-8/+15
set the fan1_enable hwmon interface to call smu_get_fan_control_mode and smu_set_fan_control_mode. v2: fix print value. Signed-off-by: Chengming Gui <[email protected]> Reviewed-by: Huang Rui <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-03-19drm/amd/powerplay: implement pwm1_enable hwmon interface for SMU11 (v2)Chengming Gui3-10/+55
1, set get_pwm1_enable and set_pwm1_enable functions to call smu_get_fan_control_mode and smu_set_fan_control_mode for SMU11 2, implement set_fan_control_mode function v2: add return value in set_fan_control_mode function Signed-off-by: Chengming Gui <[email protected]> Reviewed-by: Huang Rui <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-03-19drm/amd/powerplay: implement pwm1 hwmon interface for SMU11 (v2)Chengming Gui3-4/+112
added main functions: get_fan_speed_percent set_fan_speed_percent. added dependent functions: smc_fan_control set_fan_static_mode get_fan_speed_percent v2: fix coding style issue Signed-off-by: Chengming Gui <[email protected]> Reviewed-by: Huang Rui <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-03-19drm/amd/powerplay: add STABLE_PSTATE_SCLK and STABLE_PSTATE_MCLK when read ↵Chengming Gui1-0/+8
sensor for SMU11 add AMDGPU_PP_SENSOR_STABLE_PSTATE_SCLK and AMDGPU_PP_SENSOR_STABLE_PSTATE_MCLK to support read sensor for SMU11. Signed-off-by: Chengming Gui <[email protected]> Reviewed-by: Kevin Wang <[email protected]> Reviewed-by: Huang Rui <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-03-19drm/amd/powerplay: implement power1_cap and power1_cap_max interface for ↵Chengming Gui4-18/+49
SMU11 (v2) add get_power_limit and set_power_limit functions to support hwmon for SMU11. v2: fix the code style issue. Signed-off-by: Chengming Gui <[email protected]> Reviewed-by: Huang Rui <[email protected]> Reviewed-by: Kevin Wang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-03-19drm/amd/powerplay: add fan input interface for hwmonLikun Gao3-3/+31
Add fan1_input and fan1_target interface to get fan speed info for hwmon. Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Kevin Wang <[email protected]> Reviewed-by: Huang Rui <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-03-19drm/amd/powerplay: add fan rpm limit interface for hwmonLikun Gao1-0/+10
Add fan1_min and fan2_max function for hwmon. Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Kevin Wang <[email protected]> Reviewed-by: Huang Rui <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-03-19drm/amd/powerplay: debugfs don't check powerplay when SW SMU is enabled.Kevin Wang1-1/+1
when sw smu is enabled, the powerplay interface isn't implemented. Signed-off-by: Kevin Wang <[email protected]> Reviewed-by: Huang Rui <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-03-19drm/amd/powerplay: enable amdgpu dpm for smuKevin Wang1-0/+2
enable amdgpu dpm global flag Signed-off-by: Kevin Wang <[email protected]> Reviewed-by: Huang Rui <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-03-19drm/amd/powerplay: add function to get sclk and mclkLikun Gao4-6/+110
Add function to get sclk and mclk for smu11. Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Huang Rui <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-03-19drm/amd/powerplay: Unify smu handle task function (v2)Likun Gao4-212/+250
Unify power stade adjust function into smu_handle_task by the judgment of task_id. Move functions which have no relationship with smu version into the file of amdgpu_smu. Modified the function of smu_display_config_changed into two part. Unify some similiar function. v2: Correct the operation of upload dpm level when force dpm limit value. Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Huang Rui <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-03-19drm/amd/powerplay: implement dpm enable functions of uvd & vce for smuKevin Wang3-3/+34
add function of dpm enable uvd & vce for extern module use. Signed-off-by: Kevin Wang <[email protected]> Reviewed-by: Huang Rui <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-03-19drm/amd/powerplay: implement sensor of uvd & vce power state for smu11Kevin Wang1-0/+8
add functions of uvd & vce for hwmon. Signed-off-by: Kevin Wang <[email protected]> Reviewed-by: Huang Rui <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-03-19drm/amd/powerplay: implement uvd & vce dpm enable functionsKevin Wang2-0/+31
add dpm enable functions for vce,uvd. Signed-off-by: Kevin Wang <[email protected]> Reviewed-by: Huang Rui <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
Powered by cgit, Gruvboxed by Blaster4385.