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2022-07-28drm/amd/display: Clean up some inconsistent indentingJiapeng Chong1-1/+2
No functional modification involved. smatch warnings: drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c:716 dcn314_clk_mgr_construct() warn: inconsistent indenting. Reported-by: Abaci Robot <[email protected]> Signed-off-by: Jiapeng Chong <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-28drm/amd/display: Clean up some inconsistent indentingJiapeng Chong1-18/+18
No functional modification involved. smatch warnings: drivers/gpu/drm/amd/amdgpu/../display/dc/dcn32/dcn32_mpc.c:306 mpc32_get_shaper_current() warn: inconsistent indenting. Reported-by: Abaci Robot <[email protected]> Signed-off-by: Jiapeng Chong <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-28drm/amd/display: Clean up some inconsistent indentingJiapeng Chong1-4/+4
No functional modification involved. smatch warning: drivers/gpu/drm/amd/amdgpu/../display/dc/dcn32/dcn32_hwseq.c:910 dcn32_init_hw() warn: inconsistent indenting. Reported-by: Abaci Robot <[email protected]> Signed-off-by: Jiapeng Chong <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-28drm/amdkfd: Split giant svm rangePhilip Yang1-16/+33
Giant svm range split to smaller ranges, align the range start address to max svm range pages to improve MMU TLB usage. Signed-off-by: Philip Yang <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-28drm/amdkfd: Set svm range max pagesPhilip Yang3-0/+26
This will be used to split giant svm range into smaller ranges, to support VRAM overcommitment by giant range and improve GPU retry fault recover on giant range. Signed-off-by: Philip Yang <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-28drm/amdgpu: Allow TTM to evict svm bo from same processPhilip Yang1-3/+6
To support SVM range VRAM overcommitment, TTM should be able to evict svm bo of same process to system memory, to get space to alloc new svm bo. Signed-off-by: Philip Yang <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-28drm/amdgpu: Fix the incomplete product numberRoy Sun1-1/+1
The comments say that the product number is a 16-digit HEX string so the buffer needs to be at least 17 characters to hold the NUL terminator. Expand the buffer size to 20 to avoid the alignment issues. The comment:Product number should only be 16 characters. Any more,and something could be wrong. Cap it at 16 to be safe Signed-off-by: Roy Sun <[email protected]> Reviewed-by: André Almeida <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-28drm/amdgpu: use adev_to_drm for consistencyGuchun Chen1-1/+1
Keep code consistency when accessing drm_device from amdgpu driver. Signed-off-by: Guchun Chen <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-28drm/amdgpu/dc/dce: fix repeated words in commentswangjianli1-1/+1
Delete the redundant word 'in'. Signed-off-by: wangjianli <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-27Merge tag 'amd-drm-next-5.20-2022-07-26' of ↵Dave Airlie164-6900/+9489
https://gitlab.freedesktop.org/agd5f/linux into drm-next amdgpu: - VCN4 fixes - RAS support for UMC 8.10 - ACP support for jadeite platforms - NBIO HDP flush fixes - Misc spelling and grammar fixes - Runtime PM fixes - Non-DC HPD fix - Clean up amdgpu DM code - DSC fixes - Expose some additional GFXOFF data via debugfs - More FP clean up for new DCN blocks - PPC DC FP fixes - DCN 3.1.4 fixes - DC DML stack usage fixes - GMC fixes - SPM fixes for RDNA2 amdkfd: - MMU notifier fix - Mutex fix UAPI: - Add a comment about VCN4 unified queues - IP version information for UMDs Proposed mesa change: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17411/diffs?commit_id=c8a63590dfd0d64e6e6a634dcfed993f135dd075 Signed-off-by: Dave Airlie <[email protected]> From: Alex Deucher <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2022-07-26drm/amdgpu: Re-enable DCN for 64-bit powerpcMichael Ellerman1-1/+1
Commit d11219ad53dc ("amdgpu: disable powerpc support for the newer display engine") disabled the DCN driver for all of powerpc due to unresolved build failures with some compilers. Further digging shows that the build failures only occur with compilers that default to 64-bit long double. Both the ppc64 and ppc64le ABIs define long double to be 128-bits, but there are compilers in the wild that default to 64-bits. The compilers provided by the major distros (Fedora, Ubuntu) default to 128-bits and are not affected by the build failure. There is a compiler flag to force 128-bit long double, which may be the correct long term fix, but as an interim fix only allow building the DCN driver if long double is 128-bits by default. The bisection in commit d11219ad53dc must have gone off the rails at some point, the build failure occurs all the way back to the original commit that enabled DCN support on powerpc, at least with some toolchains. Depends-on: d11219ad53dc ("amdgpu: disable powerpc support for the newer display engine") Fixes: 16a9dea110a6 ("amdgpu: Enable initial DCN support on POWER") Signed-off-by: Michael Ellerman <[email protected]> Acked-by: Alex Deucher <[email protected]> Reviewed-by: Dan Horák <[email protected]> Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2100 Link: https://lore.kernel.org/r/[email protected]
2022-07-25drm/amd/display: Reduce stack size in the mode support functionRodrigo Siqueira1-62/+70
When we use the allmodconfig option we see the following error: drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/display_mode_vba_32.c: In function 'dml32_ModeSupportAndSystemConfigurationFull': drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/display_mode_vba_32.c:3799:1: error: the frame size of 2464 bytes is larger than 2048 bytes [-Werror=frame-larger-than=] 3799 | } // ModeSupportAndSystemConfigurationFull This commit fixes this issue by moving part of the mode support operation from ModeSupportAndSystemConfigurationFull to a dedicated function. Cc: Harry Wentland <[email protected]> Cc: Alex Deucher <[email protected]> Cc: Aurabindo Pillai <[email protected]> Cc: Stephen Rothwell <[email protected]> Tested-by: Stephen Rothwell <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-25drm/amd/display: 3.2.196Anthony Koo1-1/+1
This version brings along following fixes: - Copy crc_skip_count when duplicating CRTC state - Add debug option for idle optimizations on cursor updates - Disable MPC split for DCN32/321 - Add missing ODM 2:1 policy logic - Update DCN32 and DCN321 SR latencies - Add reinstate dram in the FPO logic - Add dc_ctx to link_enc_create() parameters - Cache cursor when cursor exceeds 64x64 - Add support for manual DMUB FAMS trigger - Fix dpstreamclk programming - Add missing AUDIO_DTO_SEL reg field - Add OTG/ODM functions - Use correct clock source constructor for DCN314 - Use correct DTO_SRC_SEL for 128b/132b encoding - Add pixel rate div calcs and programming - Remove FPU flags from DCN30 Makefile - Create patch bounding box function for isolate FPU - Move mclk calculation function to DML - Remove FPU operations from dcn201 resources - Fallback to SW cursor if SubVP + cursor too big - Drop unnecessary FPU flags on dcn302 files - Reboot while unplug hdcp enabled dp from mst hub - Reset pipe count when iterating for DET override - Calculate MALL cache lines based on Mblks required - Fix two MPO videos in single display ODM combine mode - Guard against zero memory channels - Updates SubVP + SubVP DRR cases updates - Fix OPTC function pointers for DCN314 - Add enable/disable FIFO callbacks to stream setup - Avoid MPC infinite loop Acked-by: Alex Hung <[email protected]> Signed-off-by: Anthony Koo <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-25drm/amd/display: Copy crc_skip_count when duplicating CRTC stateLeo Li1-0/+1
[Why] crc_skip_count is used to track how many frames to skip to allow the OTG CRC engine to "warm up" before it outputs correct CRC values. Experimentally, this seems to be 2 frames. When duplicating CRTC states, this value was not copied to the duplicated state. Therefore, when this state is committed, we will needlessly wait 2 frames before outputing CRC values. Even if the CRC engine is already warmed up. [How] Copy the crc_skip_count as part of dm_crtc_duplicate_state. Acked-by: Alex Hung <[email protected]> Signed-off-by: Leo Li <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-25drm/amd/display: Add debug option for idle optimizations on cursor updatesAlvin Lee2-0/+2
For optimizations and debug purposes we added an option to exit idle operations on cursor updates. Acked-by: Alex Hung <[email protected]> Signed-off-by: Alvin Lee <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-25drm/amd/display: Disable MPC split for DCN32/321Alvin Lee2-2/+2
Due to CRB, no need to rely on MPC splitting to maximize use of DET anymore. Reviewed-by: Rodrigo Siqueira <[email protected]> Acked-by: Alex Hung <[email protected]> Signed-off-by: Alvin Lee <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-25drm/amd/display: Add missing ODM 2:1 policy logicSamson Tam2-2/+6
Phantom pipes must use the same configuration used in main pipes. This commit add this check. Reviewed-by: Rodrigo Siqueira <[email protected]> Acked-by: Alex Hung <[email protected]> Signed-off-by: Samson Tam <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-25drm/amd/display: Update DCN32 and DCN321 SR latenciesAlvin Lee2-4/+4
Update worst case SR latencies according to values measured by hardware team. Reviewed-by: Rodrigo Siqueira <[email protected]> Acked-by: Alex Hung <[email protected]> Signed-off-by: Alvin Lee <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-25drm/amd/display: Add reinstate dram in the FPO logicRodrigo Siqueira2-10/+60
In order to handle FPO correctly, we need to reinstate the dram values. This function adds the required code to handle the vblank stretch and the dram calculation. Acked-by: Alex Hung <[email protected]> Signed-off-by: Rodrigo Siqueira <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-25drm/amd/display: Add dc_ctx to link_enc_create() parametersAurabindo Pillai23-3/+27
[Why&How] Preparation to enable run time initialization of register offsets to add dc_context to the link_enc_create callback. This is needed to get the dc_ctx handle where register offset initialization routine is called. Reviewed-by: Rodrigo Siqueira <[email protected]> Acked-by: Alan Liu <[email protected]> Acked-by: Alex Hung <[email protected]> Signed-off-by: Aurabindo Pillai <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-25drm/amd/display: Cache cursor when cursor exceeds 64x64Chris Park4-6/+11
[Why] When Static screen from MALL, the cursor needs to be cached if cursor exceeds 64x64 size. [How] Program the bit that cache cursor in MALL when size of the cursor exceeds 64x64. Reviewed-by: Jun Lei <[email protected]> Acked-by: Alan Liu <[email protected]> Acked-by: Alex Hung <[email protected]> Signed-off-by: Chris Park <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-25drm/amd/display: Add support for manual DMUB FAMS triggerAnthony Koo1-1/+8
- Add is_drr parameter to indicate DRR is enabled on the panel to determine whether SubVP MCLK switch logic should be enabled - Add DRR manual trigger in FW (instead of driver) because manual trigger programming triggers DRR update pending and can block SubVP MCLK switches from taking place Acked-by: Alex Hung <[email protected]> Signed-off-by: Anthony Koo <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-25drm/amd/display: Fix dpstreamclk programmingMichael Strauss6-19/+20
[WHY] Currently programming incorrect hpo inst as well as selecting incorrect source [HOW] Use hpo inst instead of otg inst to select dpstreamclk inst Reviewed-by: Nicholas Kazlauskas <[email protected]> Acked-by: Alex Hung <[email protected]> Signed-off-by: Michael Strauss <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-25drm/amd/display: Add missing AUDIO_DTO_SEL reg fieldMichael Strauss1-1/+2
[WHY] Needed to program audio dto Reviewed-by: Nicholas Kazlauskas <[email protected]> Acked-by: Alex Hung <[email protected]> Signed-off-by: Michael Strauss <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-25drm/amd/display: Add OTG/ODM functionsMichael Strauss1-0/+34
[WHY] Required for correct OTG_H_TIMING_CNTL programming Reviewed-by: Nicholas Kazlauskas <[email protected]> Acked-by: Alex Hung <[email protected]> Signed-off-by: Michael Strauss <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-25drm/amd/display: Use correct clock source constructor for DCN314Michael Strauss1-1/+1
[WHY] Previously was pointing to DCN3 clock constructor rather than DCN31's Reviewed-by: Nicholas Kazlauskas <[email protected]> Acked-by: Alex Hung <[email protected]> Signed-off-by: Michael Strauss <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-25drm/amd/display: Use correct DTO_SRC_SEL for 128b/132b encodingMichael Strauss6-7/+24
[WHY] DP DTO isn't used for 128b/132b encoding [HOW] Check current link rate to determine whether using 8b/10b or 128/132b encoding Reviewed-by: Nicholas Kazlauskas <[email protected]> Acked-by: Alex Hung <[email protected]> Signed-off-by: Michael Strauss <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-25drm/amd/display: Add pixel rate div calcs and programmingMichael Strauss4-0/+56
[WHY/HOW] Need to calculate and set some pixel rate divisors on correct otg_inst Reviewed-by: Nicholas Kazlauskas <[email protected]> Acked-by: Alex Hung <[email protected]> Signed-off-by: Michael Strauss <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-25drm/amd/display: Remove FPU flags from DCN30 MakefileRodrigo Siqueira1-30/+0
At this stage, we must have all the FPU code for DCN30 isolated in the DML folder. Drop FPU flags from Makefile. Reviewed-by: Harry Wentland <[email protected]> Acked-by: Alex Hung <[email protected]> Signed-off-by: Rodrigo Siqueira <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-25drm/amd/display: Create patch bounding box function for isolate FPURodrigo Siqueira3-17/+24
In the DCN30 resource, we have a small patch to the bounding box struct; this patch uses FPU operations. This commit moves that specific part to its function under the DML folder. Reviewed-by: Harry Wentland <[email protected]> Acked-by: Alex Hung <[email protected]> Signed-off-by: Rodrigo Siqueira <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-25drm/amd/display: Move mclk calculation function to DMLRodrigo Siqueira3-38/+49
The function responsible for calculating the MCLK switching has FPU operations. This commit moves it to the dcn30_fpu file. Reviewed-by: Harry Wentland <[email protected]> Acked-by: Alex Hung <[email protected]> Signed-off-by: Rodrigo Siqueira <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-25drm/amd/display: Remove FPU operations from dcn201 resourcesRodrigo Siqueira4-25/+100
We have some FPU operations on the resource part of the DCN201. This commit drops FPU flags and moves any required FPU code to the DML folder. Reviewed-by: Harry Wentland <[email protected]> Acked-by: Alex Hung <[email protected]> Signed-off-by: Rodrigo Siqueira <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-25drm/amd/display: Fallback to SW cursor if SubVP + cursor too bigAlvin Lee1-0/+5
[Description] - For SubVP cursor cannot be cached in MALL, therefore we will switch to SW cursor if the cursor size exceeds what can fit in the local DCN buffers (64x64x4) - Returning false / failure for set_cursor_attributes will fallback to SW cursor Reviewed-by: Jun Lei <[email protected]> Acked-by: Alex Hung <[email protected]> Signed-off-by: Alvin Lee <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-25drm/amd/display: Drop unnecessary FPU flags on dcn302 filesRodrigo Siqueira1-25/+0
We already isolated the DCN302 code in the DML folder, but we forgot to drop the FPU flags from the Makefile. This commit drops those flags. Reviewed-by: Harry Wentland <[email protected]> Acked-by: Alex Hung <[email protected]> Signed-off-by: Rodrigo Siqueira <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-25drm/amd/display: Reboot while unplug hdcp enabled dp from mst hubhersen wu1-12/+22
[Why] event_property_update does not check NULL pointer [How] check aconnector->base.state equals NULL Reviewed-by: Bhawanpreet Lakha <[email protected]> Acked-by: Alex Hung <[email protected]> Signed-off-by: hersen wu <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-25drm/amd/display: Reset pipe count when iterating for DET overrideTaimur Hassan1-1/+2
[Why] Coding error in DET allocation was resulting in too few DET segments being allocated, causing underflow. [How] Reset pipe count each time we begin iterating through pipes for a stream. Reviewed-by: Alvin Lee <[email protected]> Acked-by: Alex Hung <[email protected]> Signed-off-by: Taimur Hassan <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-25drm/amd/display: Calculate MALL cache lines based on Mblks requiredAlvin Lee2-1/+15
[Description] - Calculation for NumWays in MALL should be based on number of MBlks Reviewed-by: Jun Lei <[email protected]> Acked-by: Alex Hung <[email protected]> Signed-off-by: Alvin Lee <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-25drm/amd/display: Fix two MPO videos in single display ODM combine modeSamson Tam3-31/+260
[Why] In single display ODM combine mode, two MPO videos ( three planes ) are not working [How] When we detect three planes, don't set odm combine 2to1 policy for the MPO planes. Otherwise, we run out of pipes available Add support for two MPO videos in dc_add_plane_to_context(). Don't allow both videos to be on the same side of the display. Add extra check when fetching free pipe for two MPO videos. Reviewed-by: Alvin Lee <[email protected]> Acked-by: Alex Hung <[email protected]> Signed-off-by: Samson Tam <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-25drm/amd/display: Guard against zero memory channelsNicholas Kazlauskas1-1/+4
[Why] If BIOS doesn't specify number of memory channels then bandwidth validation will fail due to insufficient BW in DML. [How] If BIOS is setting zero channels then use the default in the table. If no entry is in the table and no BIOS value is specified then throw an ASSERT for future developers to look into. Reviewed-by: Michael Strauss <[email protected]> Acked-by: Alex Hung <[email protected]> Signed-off-by: Nicholas Kazlauskas <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-25drm/amd/display: Updates SubVP and SubVP DRR casesAlvin Lee4-6/+82
[Description] - For any DRR cases in SubVP, don't lock for VSYNC flips - For DCN32/321 use FW to do DRR manual trigger programming - Add bit in SubVP cmd to indicate if the SubVP pipe is DRR Reviewed-by: Jun Lei <[email protected]> Acked-by: Alex Hung <[email protected]> Signed-off-by: Alvin Lee <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-25drm/amd/display: Fix OPTC function pointers for DCN314Nicholas Kazlauskas3-2/+5
[Why] Access violation occurs when swapping between HDMI and FRL monitors because we're missing the immediate_disable_crtc callback and it's required for the DCN314 clk manager. [How] Update the table to match the DCN31 optc functions for ones that should be the same: - immediate_disable_crtc - configure_crc Reviewed-by: Michael Strauss <[email protected]> Acked-by: Alex Hung <[email protected]> Signed-off-by: Nicholas Kazlauskas <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-25drm/amd/display: Add enable/disable FIFO callbacks to stream setupNicholas Kazlauskas3-12/+35
[Why] We don't write out attributes after disabling and re-enabling the link on some monitors, causing some, but not all, HDMI displays to fail to lightup on DCN314. [How] Firmware used to do this after DIG link setup. Since firmware is no longer doing this to support USB4 and dynamic link remapping we'll need to add this to driver in the equivalent paths. New optional callbacks were created in the stream encoder interface and implementations were added for DCN314. Reviewed-by: Michael Strauss <[email protected]> Acked-by: Alex Hung <[email protected]> Signed-off-by: Nicholas Kazlauskas <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-25drm/amd/display: Avoid MPC infinite loopAric Cyr1-0/+5
[why] In some cases MPC tree bottom pipe ends up point to itself. This causes iterating from top to bottom to hang the system in an infinite loop. [how] When looping to next MPC bottom pipe, check that the pointer is not same as current to avoid infinite loop. Reviewed-by: Josip Pavic <[email protected]> Reviewed-by: Jun Lei <[email protected]> Acked-by: Alex Hung <[email protected]> Signed-off-by: Aric Cyr <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-25drm/amdgpu: enable swiotlb for gmc 11.0Aaron Liu1-0/+5
Enable swiotlb for gmc 11.0. Signed-off-by: Aaron Liu <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-25drm/amdgpu: enable swiotlb for gmc 10.0 (V2)Aaron Liu1-0/+5
Enable swiotlb for gmc 10.0. v2: include drm_cache.h to use the function ‘drm_need_swiotlb’ Signed-off-by: Aaron Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-25drm/amd: Fix typo 'the the' in commentSlark Xiao2-3/+3
Replace 'the the' with 'the' in the comment. Signed-off-by: Slark Xiao <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-25drm/amd/display: reduce stack for dml32_CalculatePrefetchScheduleAlex Deucher4-211/+227
Move stack variables to dummy structure. Reviewed-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: Stephen Rothwell <[email protected]>
2022-07-25drm/amd/display: reduce stack for ↵Alex Deucher4-104/+120
dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport Move stack variables to dummy structure. Reviewed-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: Stephen Rothwell <[email protected]>
2022-07-25drm/amd/display: reduce stack for dml32_CalculateVMRowAndSwathAlex Deucher4-62/+70
Move stack variables to dummy structure. Reviewed-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: Stephen Rothwell <[email protected]>
2022-07-25drm/amd/display: reduce stack for dml32_CalculateSwathAndDETConfigurationAlex Deucher4-64/+77
Move stack variables to dummy structure. Reviewed-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: Stephen Rothwell <[email protected]>
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