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2022-07-25drm/amd/display: Remove unused ↵Maíra Canal1-54/+0
dml32_CalculatedoublePipeDPPCLKAndSCLThroughput function Remove dml32_CalculatedoublePipeDPPCLKAndSCLThroughput function, which is not used in the codebase. This was pointed by clang with the following warning: drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/display_mode_vba_util_32.c:393:6: warning: no previous prototype for function 'dml32_CalculatedoublePipeDPPCLKAndSCLThroughput' [-Wmissing-prototypes] void dml32_CalculatedoublePipeDPPCLKAndSCLThroughput( ^ drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/display_mode_vba_util_32.c:393:1: note: declare 'static' if the function is not intended to be used outside of this translation unit void dml32_CalculatedoublePipeDPPCLKAndSCLThroughput( ^ static 1 warning generated. Reviewed-by: André Almeida <[email protected]> Signed-off-by: Maíra Canal <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-25drm/amd/display: Remove unused clk_src variableMaíra Canal1-2/+0
Remove the variable clk_src from the function dcn3_get_pix_clk_dividers. This was pointed by clang with the following warning: drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_clock_source.c:1279:25: warning: variable 'clk_src' set but not used [-Wunused-but-set-variable] struct dce110_clk_src *clk_src; ^ 1 warning generated. Reviewed-by: André Almeida <[email protected]> Signed-off-by: Maíra Canal <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-25drm/amd/display: Update de-tile override to anticipate pipe splittingTaimur Hassan3-71/+69
[Why] For certain MPO configurations, DML will split a pipe after DET buffer has already been allocated by driver, resulting in allocation of more DET segments than the configurable return buffer has, causing underflow. [How] Determine during DET override calculation whether or not a pipe will be split later on by DML, and distribute DET segments based on expected number of pipes. Tested-by: Daniel Wheeler <[email protected]> Reviewed-by: Dmytro Laktyushkin <[email protected]> Acked-by: Alan Liu <[email protected]> Signed-off-by: Taimur Hassan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-25drm/amd/display: Don't set dram clock change requirement for SubVPAlvin Lee1-0/+10
[Description] In general cases we want to keep the dram clock change requirement (we prefer configs that support MCLK switch). Only override to false for SubVP. Tested-by: Daniel Wheeler <[email protected]> Acked-by: Alan Liu <[email protected]> Signed-off-by: Alvin Lee <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-25drm/amd/display: Fix hard hang if DSC is disabledRodrigo Siqueira1-7/+12
We want to calculate the DTB clock values when DSC is enabled; however, this is not the current behavior implemented in DCN32. Right now, DML is trying to calculate DSC values even if DSC is disabled; as a result, we can have a hard hang due to wrong clock calculation. This commit fixes this issue by moving the calculation after the DSC check. Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-25drm/amd/display: remove number of DSC slices override in DMLWenjing Liu1-20/+0
[why] Number of DSC slices is an input to DML with high dependency on display specific capability. This isn't something DML can decide on its own. DML has to use the original number of DSC slices input to DML during validation without modification. Otherwise the computed DSC delay will not reflect the current configuration and therefore causes validation failures. [how] Remove DML override for number of DSC slices parameter. Tested-by: Daniel Wheeler <[email protected]> Reviewed-by: Alvin Lee <[email protected]> Acked-by: Alan Liu <[email protected]> Signed-off-by: Wenjing Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-25drm/amd/display: Create a file dedicated for CRTCRodrigo Siqueira4-433/+516
[Why] The amdgpu_dm file contains most of the code that works as an interface between DRM API and DC. As a result, this file becomes very large since it comprises multiple abstractions such as CRTC manipulation. [How] This commit extracts the CRTC code to its specific file named amdgpu_dm_crtc. This change does not change anything inside the functions; the only exception is converting some static functions to a global function. v2: fix ifdef merge mix up (Alex) Tested-by: Daniel Wheeler <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Acked-by: Alan Liu <[email protected]> Signed-off-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-22Merge tag 'drm-misc-next-fixes-2022-07-21' of ↵Dave Airlie2-9/+9
git://anongit.freedesktop.org/drm/drm-misc into drm-next Short summary of fixes pull: * amdgpu: Fix for drm buddy memory corruption * nouveau: PM fixes; DP fixes Signed-off-by: Dave Airlie <[email protected]> From: Thomas Zimmermann <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/Ytj65+PdAJs4jIEO@linux-uq9g
2022-07-21Merge tag 'amd-drm-fixes-5.19-2022-07-20' of ↵Dave Airlie5-18/+38
https://gitlab.freedesktop.org/agd5f/linux into drm-fixes amd-drm-fixes-5.19-2022-07-20: amdgpu: - Drop redundant buffer cleanup that can lead to a segfault - Add a bo_list mutex to avoid possible list corruption in CS Signed-off-by: Dave Airlie <[email protected]> From: Alex Deucher <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2022-07-20drm/amdgpu: Protect the amdgpu_bo_list list with a mutex v2Luben Tuikov3-4/+19
Protect the struct amdgpu_bo_list with a mutex. This is used during command submission in order to avoid buffer object corruption as recorded in the link below. v2 (chk): Keep the mutex looked for the whole CS to avoid using the list from multiple CS threads at the same time. Suggested-by: Christian König <[email protected]> Cc: Alex Deucher <[email protected]> Cc: Andrey Grodzovsky <[email protected]> Cc: Vitaly Prosyak <[email protected]> Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2048 Signed-off-by: Luben Tuikov <[email protected]> Signed-off-by: Christian König <[email protected]> Tested-by: Luben Tuikov <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2022-07-20drm/amd/display: Create a file dedicated to planesRodrigo Siqueira4-1617/+1878
[Why] The amdgpu_dm file contains most of the code that works as an interface between DRM API and DC. As a result, this file becomes very large since it comprises multiple abstractions such as plane manipulation. [How] This commit extracts the plane code to its specific file named amdgpu_dm_plane. This change does not change anything inside the functions; the only exception is converting some static functions to a global function. Tested-by: Daniel Wheeler <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Acked-by: Alan Liu <[email protected]> Signed-off-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-20drm/amd/display: Add tags for indicating mst progress statusWayne Lin4-3/+94
[Why & How] In order to leverage igt tool to maintain mst feature, expose new debugfs entry "mst_progress_status". In our dm flow, record down the result of each phase of mst and user can examine the mst result by checking whether each phase get completed successfully. Tested-by: Daniel Wheeler <[email protected]> Reviewed-by: Hersen Wu <[email protected]> Acked-by: Alan Liu <[email protected]> Signed-off-by: Wayne Lin <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-20drm/amd/display: Add is_mst_connector debugfs entryWayne Lin1-0/+53
[Why & How] Add "is_mst_connector" debugfs entry to help distinguish whether a connector is in a mst topology or not. Access it with the following command: cat /sys/kernel/debug/dri/0/DP-X/is_mst_connector Result: - "root" stands for the root connector of the topology - "branch" stands for branch device of the topology - "end" stands for leaf node connector of the topology - "no" stands for the connector is not a device of a mst topology Tested-by: Daniel Wheeler <[email protected]> Reviewed-by: Hersen Wu <[email protected]> Acked-by: Alan Liu <[email protected]> Signed-off-by: Wayne Lin <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-20drm/amd/display: fix trigger_hotplug to support mst caseWayne Lin1-3/+14
[Why & How] Correct few problems below to have debugfs trigger_hotplug entry supports mst case * Adjust the place for acquiring the hpd_lock. We'll also access dc_link when simulate unplug * When detect the connector is a mst root, call reset_cur_dp_mst_topology() to simulate unplug * Don't support hotplug caused by CSN message since we can't change mst topology info directly. We can't simulate that * Clean up redundant code Tested-by: Daniel Wheeler <[email protected]> Reviewed-by: Hersen Wu <[email protected]> Acked-by: Alan Liu <[email protected]> Signed-off-by: Wayne Lin <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-20drm/amd/display: Expose function reset_cur_dp_mst_topologyWayne Lin2-1/+4
[Why & How] Need to leverage this function out of dc_link.c. Change it to public. Tested-by: Daniel Wheeler <[email protected]> Reviewed-by: Hersen Wu <[email protected]> Acked-by: Alan Liu <[email protected]> Signed-off-by: Wayne Lin <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-20drm/amd/display: Update in dmlAlvin Lee2-0/+2
Update DML to configure drr_display in vba struct. Tested-by: Daniel Wheeler <[email protected]> Reviewed-by: Dmytro Laktyushkin <[email protected]> Acked-by: Alan Liu <[email protected]> Signed-off-by: Alvin Lee <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-20drm/amd/display: Remove unused variableJun Lei1-1/+0
Remove an unused variable "remove_disconnect_edp" which was a workaround bit. Tested-by: Daniel Wheeler <[email protected]> Acked-by: Alan Liu <[email protected]> Signed-off-by: Jun Lei <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-20drm/amd/display: Support vertical interrupt 0 for all dcn ASICWayne Lin2-7/+26
[Why] When CONFIG_DRM_AMD_SECURE_DISPLAY is enabled, it will try to register vertical interrupt 0 for specific task. Currently, only dcn10 have defined relevant info for vertical interrupt 0. If we enable CONFIG_DRM_AMD_SECURE_DISPLAY for other dcn ASIC, will get DC_IRQ_SOURCE_INVALID while calling dc_interrupt_to_irq_source() and cause pointer errors. [How] Add support of vertical interrupt 0 for all dcn ASIC. Tested-by: Daniel Wheeler <[email protected]> Acked-by: Alan Liu <[email protected]> Signed-off-by: Wayne Lin <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-20drm/amd/pm: enable gfx ulv and gpo on smu_v13_0_7Kenneth Feng1-0/+4
enable gfx ulv and gpo on smu_v13_0_7 Signed-off-by: Kenneth Feng <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-20drm/amd/display: Change get_pipe_idx function scopeMaíra Canal2-2/+1
Turn previously global function into a static function as it is not used outside the file. Reviewed-by: André Almeida <[email protected]> Signed-off-by: Maíra Canal <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-20drm/amdgpu: Write masked value to control registerMaíra Canal2-2/+2
On the dce_v6_0 and dce_v8_0 hpd tear down callback, the tmp variable should be written into the control register instead of 0. Reviewed-by: André Almeida <[email protected]> Signed-off-by: Maíra Canal <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-20drm/amdgpu: fix scratch register access method in SRIOVGavin Wan1-4/+4
The scratch register should be accessed through MMIO instead of RLCG in SRIOV, since it being used in RLCG register access function. Fixes: d54762cc3e6a ("drm/amdgpu: nuke dynamic gfx scratch reg allocation") Reviewed-by: Christian König <[email protected]> Signed-off-by: Gavin Wan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-20drm/amdgpu: remove acc_size from reserve/unreserve memAlex Sierra1-43/+17
TTM used to track the "acc_size" of all BOs internally. We needed to keep track of it in our memory reservation to avoid TTM running out of memory in its own accounting. However, that "acc_size" accounting has since been removed from TTM. Therefore we don't really need to track it any more. Signed-off-by: Alex Sierra <[email protected]> Reviewed-by: Philip Yang <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-20drm/amdgpu: Protect the amdgpu_bo_list list with a mutex v2Luben Tuikov3-4/+19
Protect the struct amdgpu_bo_list with a mutex. This is used during command submission in order to avoid buffer object corruption as recorded in the link below. v2 (chk): Keep the mutex looked for the whole CS to avoid using the list from multiple CS threads at the same time. Suggested-by: Christian König <[email protected]> Cc: Alex Deucher <[email protected]> Cc: Andrey Grodzovsky <[email protected]> Cc: Vitaly Prosyak <[email protected]> Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2048 Signed-off-by: Luben Tuikov <[email protected]> Signed-off-by: Christian König <[email protected]> Tested-by: Luben Tuikov <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-18drm/amd/pm: enable mode1 reset for smu_v13_0_7Kenneth Feng2-0/+2
enable mode1 reset for smu_v13_0_7 since it's missing. Signed-off-by: Kenneth Feng <[email protected]> Reviewed-by: Yang Wang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-18drm/amdgpu: correct the PSP_BL_CMD enumHawking Zhang1-2/+2
To match with the enum defined in trusted os Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Le Ma <[email protected]> Reviewed-by: John Clements <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-18drm/amdgpu: drop runpm from amdgpu_device structureGuchun Chen3-19/+15
It's redundant, as now switching to rpm_mode to indicate runtime power management mode. Suggested-by: Lijo Lazar <[email protected]> Signed-off-by: Guchun Chen <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-18drm/amdgpu: drop runtime pm disablement quirk on several sienna cichlid cardsGuchun Chen1-13/+0
This quirk is not needed any more as it's fixed by bypassing SMU FW reloading in runtime resume. Signed-off-by: Guchun Chen <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-18drm/amdgpu: skip SMU FW reloading in runpm BACO caseGuchun Chen1-0/+7
SMU is always alive, so it's fine to skip SMU FW reloading when runpm resumed from BACO, this can avoid some race issues when resuming SMU. Suggested-by: Evan Quan <[email protected]> Signed-off-by: Guchun Chen <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-18drm/amdgpu: introduce runtime pm modeGuchun Chen2-1/+14
It can benefit code consistency in future. Suggested-by: Lijo Lazar <[email protected]> Signed-off-by: Guchun Chen <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-18drm/amd/display: Remove unnecessary NULL check in commit_planes_for_stream()Dan Carpenter1-1/+1
Smatch complains that: drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc.c:3369 commit_planes_for_stream() warn: variable dereferenced before check 'stream' (see line 3114) The 'stream' pointer cannot be NULL and the check can be removed. Signed-off-by: Dan Carpenter <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-18drm/amdgpu: Clarify asics naming in Kconfig optionsAndré Almeida1-2/+3
Clarify which architecture those asics acronyms refers to. Signed-off-by: André Almeida <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-18drm/amd/display: Fix spelling mistake "supporing" -> "supporting"Colin Ian King1-1/+1
There is a spelling mistake in a dml_print message. Fix it. Signed-off-by: Colin Ian King <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-18drm/amd/display: Enable building new display engine with KCOV enabledGuenter Roeck2-1/+4
The new display engine uses floating point math, which is not supported by KCOV. Commit 9d1d02ff3678 ("drm/amd/display: Don't build DCN1 when kcov is enabled") tried to work around the problem by disabling CONFIG_DRM_AMD_DC_DCN if KCOV_INSTRUMENT_ALL and KCOV_ENABLE_COMPARISONS are enabled. The result is that KCOV can not be enabled on systems which require this display engine. A much simpler and less invasive solution is to disable KCOV selectively when compiling the display enagine while keeping it enabled for the rest of the kernel. Fixes: 9d1d02ff3678 ("drm/amd/display: Don't build DCN1 when kcov is enabled") Cc: Arnd Bergmann <[email protected]> Cc: Leo Li <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Guenter Roeck <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-18drm/amdgpu: restore original stable pstate on ctx finiAlex Deucher1-27/+33
Save the original stable pstate on ctx init and restore it on ctx fini so that we restore a manually selected stable pstate on ctx exit. v2: fix init order (Alex) v3: don't add new variable to ctx struct (Evan) Fixes: c65b364c52ba ("drm/amdgpu/ctx: only reset stable pstate if the user changed it (v2)") Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-18drm/amdgpu: use the same HDP flush registers for all nbio 2.3.xAlex Deucher3-26/+1
Align RDNA2.x with other asics. One HDP bit per SDMA instance, aligned with firmware. This is effectively a revert of commit 369b7d04baf3 ("drm/amdgpu/nbio2.3: don't use GPU_HDP_FLUSH bit 12"). On further discussions with the relevant hardware teams, re-align the bits for SDMA. Fixes: 369b7d04baf3 ("drm/amdgpu/nbio2.3: don't use GPU_HDP_FLUSH bit 12") Reviewed-by: Kent Russell <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-18drm/amdgpu: use the same HDP flush registers for all nbio 7.4.xAlex Deucher3-26/+1
Align aldebaran with all other asics. One HDP bit per SDMA instance, aligned with firmware. This is effectively a revert of commit a0f9f8546668 ("drm/amdgpu/nbio7.4: don't use GPU_HDP_FLUSH bit 12"). On further discussions with the relevant hardware teams, re-align the bits for SDMA. Fixes: a0f9f8546668 ("drm/amdgpu/nbio7.4: don't use GPU_HDP_FLUSH bit 12") Reviewed-by: Kent Russell <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-18drm/amdgpu: create I2S platform devices for Jadeite platformVijendar Mukunda1-109/+184
Jadeite platform uses I2S MICSP instance. Create platform devices for DMA controller and I2S controller for Jadeite platform. Signed-off-by: Vijendar Mukunda <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-18drm/amdgpu: add dmi check for jadeite platformVijendar Mukunda1-0/+36
DMI check is required to distinguish Jadeite platform from Stoney base variant. Add DMI check logic for Jadeite platform. Signed-off-by: Vijendar Mukunda <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-18drm/amdgpu: Call trace info was found in dmesg when loading amdgpulin cao1-1/+3
In the case of SRIOV, the register smnMp1_PMI_3_FIFO will get an invalid value which will cause the "shift out of bound". In Ubuntu22.04, this issue will be checked an related call trace will be reported in dmesg. Signed-off-by: lin cao <[email protected]> Reviewed-by: Jingwen Chen <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-18drm/amdgpu: fix for coding style issuesVijendar Mukunda1-23/+12
Fixed below checkpatch warnings and errors drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c:131: CHECK: Comparison to NULL could be written "apd" drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c:150: CHECK: Comparison to NULL could be written "apd" drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c:196: CHECK: Prefer kernel type 'u64' over 'uint64_t' drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c:224: CHECK: Please don't use multiple blank lines drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c:226: CHECK: Comparison to NULL could be written "!adev->acp.acp_genpd" drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c:233: CHECK: Please don't use multiple blank lines drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c:239: CHECK: Alignment should match open parenthesis drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c:241: CHECK: Comparison to NULL could be written "!adev->acp.acp_cell" drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c:247: CHECK: Comparison to NULL could be written "!adev->acp.acp_res" drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c:253: CHECK: Comparison to NULL could be written "!i2s_pdata" drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c:350: CHECK: Alignment should match open parenthesis drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c:550: ERROR: that open brace { should be on the previous line Signed-off-by: Vijendar Mukunda <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-18drm/amdgpu: add umc ras functions for umc v8_10_0YiPeng Chai5-2/+464
1. Support query umc ras error counter. 2. Support ras umc ue error address remapping. Signed-off-by: YiPeng Chai <[email protected]> Reviewed-by: Alexander Deucher <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Reviewed-by: Tao Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-18drm/amdgpu: add umc v8_10_0 ip headersYiPeng Chai2-0/+127
Add umc v8_10_0 register offset and shift masks header files Signed-off-by: YiPeng Chai <[email protected]> Reviewed-by: Alexander Deucher <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Reviewed-by: Tao Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-18drm/amdgpu: Get rid of amdgpu_job->external_hw_fenceAndrey Grodzovsky3-25/+6
This is a follow-up cleanup to [1]. See bellow refcount balancing for calling amdgpu_job_submit_direct after this cleanup as far as I calculated. amdgpu_fence_emit dma_fence_init 1 dma_fence_get(fence) 2 rcu_assign_pointer(*ptr, dma_fence_get(fence) 3 ---> amdgpu_job_submit_direct completes before fence signaled amdgpu_sa_bo_free (*sa_bo)->fence = dma_fence_get(fence) 4 amdgpu_job_free dma_fence_put 3 amdgpu_vcn_enc_get_destroy_msg *fence = dma_fence_get(f) 4 dma_fence_put(f); 3 amdgpu_vcn_enc_ring_test_ib dma_fence_put(fence) 2 amdgpu_fence_process dma_fence_put 1 amdgpu_sa_bo_remove_locked dma_fence_put 0 ---> amdgpu_job_submit_direct completes after fence signaled amdgpu_fence_process dma_fence_put 2 amdgpu_job_free dma_fence_put 1 amdgpu_vcn_enc_get_destroy_msg *fence = dma_fence_get(f) 2 dma_fence_put(f); 1 amdgpu_vcn_enc_ring_test_ib dma_fence_put(fence) 0 [1] - https://patchwork.kernel.org/project/dri-devel/cover/[email protected]/ Signed-off-by: Andrey Grodzovsky <[email protected]> Suggested-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-18drm/amdgpu: limiting AV1 to first instance on VCN4 decodeSonny Jiang1-0/+131
AV1 is only supported on first instance. Signed-off-by: Sonny Jiang <[email protected]> Reviewed-by: James Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-18drm/amdgpu: Remove one duplicated ef removalxinhui pan1-6/+0
That has been done in BO release notify. Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/2074 Signed-off-by: xinhui pan <[email protected]> Acked-by: Christian König <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-17drm/amdkfd: add SPM support for SVMAlex Sierra1-13/+21
When CPU is connected throug XGMI, it has coherent access to VRAM resource. In this case that resource is taken from a table in the device gmc aperture base. This resource is used along with the device type, which could be DEVICE_PRIVATE or DEVICE_COHERENT to create the device page map region. Also, MIGRATE_VMA_SELECT_DEVICE_COHERENT flag is selected for coherent type case during migration to device. Link: https://lkml.kernel.org/r/[email protected] Signed-off-by: Alex Sierra <[email protected]> Signed-off-by: Christoph Hellwig <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Cc: Alistair Popple <[email protected]> Cc: David Hildenbrand <[email protected]> Cc: Jason Gunthorpe <[email protected]> Cc: Jerome Glisse <[email protected]> Cc: Matthew Wilcox <[email protected]> Cc: Ralph Campbell <[email protected]> Signed-off-by: Andrew Morton <[email protected]>
2022-07-15Merge tag 'drm-fixes-2022-07-15' of git://anongit.freedesktop.org/drm/drmLinus Torvalds10-388/+291
Pull drm fixes from Dave Airlie: "This is the regular fixes pull for this week. This has a bunch of amdgpu fixes, major one reverts the buddy allocator until it can be tested more, otherwise just small ones, then i915 has a bunch of fixes. The outstanding firmware regressions reported by phoronix will hopefully be dealt with ASAP. amdgpu: - revert buddy allocator support for now - DP MST blank screen fix for specific platforms - MEC firmware check fix for GC 10.3.7 - Deep color fix for DCE - Fix possible divide by 0 - Coverage blend mode fix - Fix cursor only commit timestamps i915: - Selftest fix - TTM fix sg_table construction - Error return fixes - Fix a performance regression related to waitboost - Fix GT resets" * tag 'drm-fixes-2022-07-15' of git://anongit.freedesktop.org/drm/drm: drm/amd/display: Ensure valid event timestamp for cursor-only commits drm/amd/display: correct check of coverage blend mode drm/amd/pm: Prevent divide by zero drm/amd/display: Only use depth 36 bpp linebuffers on DCN display engines. drm/amdkfd: correct the MEC atomic support firmware checking for GC 10.3.7 drm/amd/display: Ignore First MST Sideband Message Return Error drm/i915/selftests: fix subtraction overflow bug drm/i915/gem: Look for waitboosting across the whole object prior to individual waits drm/i915/gt: Serialize TLB invalidates with GT resets drm/i915/gt: Serialize GRDOM access between multiple engine resets drm/i915/ttm: fix sg_table construction drm/i915/selftests: fix a couple IS_ERR() vs NULL tests drm/i915: Fix vm use-after-free in vma destruction drm/i915/guc: ADL-N should use the same GuC FW as ADL-S drm/i915: fix a possible refcount leak in intel_dp_add_mst_connector() drm/i915/gvt: IS_ERR() vs NULL bug in intel_gvt_update_reg_whitelist() Revert "drm/amdgpu: add drm buddy support to amdgpu"
2022-07-15drm/amd/display: Fix new dmub notification enabling in DMStylon Wang1-8/+19
[Why] Changes from "Fix for dmub outbox notification enable" need to land in DM or DMUB outbox notification would be disabled. [How] Enable outbox notification only after interrupt are enabled and IRQ handlers registered. Any pending notification will be sent by DMUB once outbox notification is enabled. Fixes: ed7208706448 ("drm/amd/display: Fix for dmub outbox notification enable") Reviewed-by: Nicholas Kazlauskas <[email protected]> Acked-by: Solomon Chiu <[email protected]> Signed-off-by: Stylon Wang <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2022-07-15drm/amdgpu: Fix for drm buddy memory corruptionArunpravin Paneer Selvam2-9/+9
User reported gpu page fault when running graphics applications and in some cases garbaged graphics are observed as soon as X starts. This patch fixes all the issues. Fixed the typecast issue for fpfn and lpfn variables, thus preventing the overflow problem which resolves the memory corruption. Signed-off-by: Arunpravin Paneer Selvam <[email protected]> Reported-by: Mike Lothian <[email protected]> Tested-by: Mike Lothian <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Christian König <[email protected]> Signed-off-by: Christian König <[email protected]>
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