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2022-05-16drm/amdgpu/pm: add GFXOFF control IP version check for SMU IP v13.0.4Tim Huang1-0/+1
Enable the SMU IP v13.0.4 GFXOFF control Signed-off-by: Tim Huang <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-05-16drm/amdgpu/pm: enable swsmu for SMU IP v13.0.4Tim Huang1-0/+4
Add the entry to set the ppt functions for SMU IP v13.0.4. Signed-off-by: Tim Huang <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-05-16drm/amdgpu/pm: add swsmu ppt implementation for SMU IP v13.0.4Tim Huang3-1/+1074
Add swsmu ppt files for SMU IP v13.0.4. Signed-off-by: Tim Huang <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-05-16drm/amdgpu/pm: add some common ppt functions for SMU IP v13.0.xTim Huang2-15/+100
Add some common ppt functions that will be used by SMU IP v13.0.x and drop the not used function smu_v13_0_mode2_reset. Signed-off-by: Tim Huang <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-05-16drm/amdgpu/pm: add EnableGfxImu message dummy map for SMU IP v13.0.4Tim Huang1-1/+2
The SMU needs this message to trigger IMU initialization. Signed-off-by: Tim Huang <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-05-16drm/amdgpu/pm: add smu v13.0.4 driver SMU if headersHuang Rui3-0/+542
Add smu v13.0.4 driver SMU interface headers. v2: squash in the header updates (Alex) Signed-off-by: Huang Rui <[email protected]> Reviewed-by: Tim Huang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-05-16drm/amdgpu/gfx11: fix mes mqd settingsJack Xiao1-10/+10
Use the correct Memory Queue Descriptor (MQD) structure for GC 11. Signed-off-by: Jack Xiao <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-05-16drm/amdgpu/gfx11: fix me field handling in map_queue packetJack Xiao1-2/+5
Select the correct microengine (me) when using the map_queue packet. There are different me's for GFX, compute, and scheduling. Signed-off-by: Jack Xiao <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-05-16drm/amd/pm: update smartshift powerboost calc for smu13Sathishkumar S1-16/+46
smartshift apu and dgpu power boost are reported as percentage with respect to their power limits. adjust the units of power before calculating the percentage of boost. Signed-off-by: Sathishkumar S <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-05-16drm/amd/pm: update smartshift powerboost calc for smu12Sathishkumar S1-16/+44
smartshift apu and dgpu power boost are reported as percentage with respect to their power limits. This value[0-100] reflects the boost for the respective device. Signed-off-by: Sathishkumar S <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-05-16drm/amdkfd: allocate MMIO/DOORBELL BOs with AMDGPU_GEM_CREATE_PREEMPTIBLELang Yu1-16/+16
MMIO/DOORBELL BOs' backing resources(bus address resources that are used to talk to the GPU) are not managed by GTT manager, but they are counted by GTT manager. That makes no sense. With AMDGPU_GEM_CREATE_PREEMPTIBLE flag, such BOs will be managed by PREEMPT manager(for preemptible contexts, e.g., KFD). Then they won't be evicted and don't need to be pinned as well. But we still leave these BOs pinned to indicate that the underlying resource never moves. Signed-off-by: Lang Yu <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-05-16drm/amdgpu: Ensure the DMA engine is deactivated during set upsHaohui Mai1-45/+64
Setting the HALT bit of SDMA_F32_CNTL in all paths before programming the ring buffer of the SDMA engine. Signed-off-by: Haohui Mai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-05-16drm/amdgpu/ctx: only reset stable pstate if the user changed it (v2)Alex Deucher1-0/+5
Check if the requested stable pstate matches the current one before changing it. This avoids changing the stable pstate on context destroy if the user never changed it in the first place via the IOCTL. v2: compare the current and requested rather than setting a flag (Lijo) Fixes: 8cda7a4f96e435 ("drm/amdgpu/UAPI: add new CTX OP to get/set stable pstates") Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-05-16drm/amd/pm: add smu power_limit callback for smu_v13_0_7Yang Wang1-0/+39
- get_power_limit - set_power_limit add above callback functions to enable power_cap hwmon node. Signed-off-by: Yang Wang <[email protected]> Reviewed-by: Kenneth Feng <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-05-16drm/amd/pm: add smu feature map support for smu_v13_0_0Yang Wang1-19/+50
the pp_features can't display full feauture information when these mapping is not exiting. Signed-off-by: Yang Wang <[email protected]> Reviewed-by: Kenneth Feng <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-05-16drm/amd/pm: add smu feature map support for smu_v13_0_7Yang Wang2-8/+73
the pp_features can't display full feauture information when these mapping is not exiting. Signed-off-by: Yang Wang <[email protected]> Reviewed-by: Kenneth Feng <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-05-16drm/amd/pm: support ss metrics read for smu11Sathishkumar S2-37/+187
support reading smartshift apu and dgpu power for smu11 based asic v2: add new version of SmuMetrics and make calculation more readable (Lijo) v3: avoid calculations that result in -ve values and skip related checks v4: use the current power limit on dGPU and exclude smu 11_0_7 (Lijo) v5: remove redundant code (Lijo) Signed-off-by: Sathishkumar S <[email protected]> Acked-by: Alex Deucher <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-05-16drm/amd/pm: add smu pp_feature_mask callback for smu_v13_0_7Yang Wang1-0/+2
- set_pp_feature_mask - get_pp_feature_mask the pp_feature device node isn't working when above callback functions aren't provided. Signed-off-by: Yang Wang <[email protected]> Reviewed-by: Kenneth Feng <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-05-13drm/amdgpu: clean up some inconsistent indentingJiapeng Chong1-9/+8
Eliminate the follow smatch warning: drivers/gpu/drm/amd/amdgpu/nbio_v7_7.c:35 nbio_v7_7_get_rev_id() warn: inconsistent indenting. drivers/gpu/drm/amd/amdgpu/nbio_v7_7.c:214 nbio_v7_7_init_registers() warn: inconsistent indenting. Reported-by: Abaci Robot <[email protected]> Signed-off-by: Jiapeng Chong <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-05-13mmap locking API: fix missed mmap_sem references in commentsFlorian Rommel2-2/+2
Commit c1e8d7c6a7a6 ("mmap locking API: convert mmap_sem comments") missed replacing some references of mmap_sem by mmap_lock due to misspelling (mm_sem instead of mmap_sem). Link: https://lkml.kernel.org/r/[email protected] Signed-off-by: Florian Rommel <[email protected]> Signed-off-by: Andrew Morton <[email protected]>
2022-05-11drm/amdgpu/ctx: only reset stable pstate if the user changed it (v2)Alex Deucher1-0/+5
Check if the requested stable pstate matches the current one before changing it. This avoids changing the stable pstate on context destroy if the user never changed it in the first place via the IOCTL. v2: compare the current and requested rather than setting a flag (Lijo) Fixes: 8cda7a4f96e435 ("drm/amdgpu/UAPI: add new CTX OP to get/set stable pstates") Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2022-05-11Revert "drm/amd/pm: keep the BACO feature enabled for suspend"Alex Deucher1-7/+1
This reverts commit eaa090538e8d21801c6d5f94590c3799e6a528b5. Commit ebc002e3ee78 ("drm/amdgpu: don't use BACO for reset in S3") stops using BACO for reset during suspend, so it's no longer necessary to leave BACO enabled during suspend. This fixes resume from suspend on the navy flounder dGPU in the ASUS ROG Strix G513QY. Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/2008 Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1982 Reviewed-by: Lijo Lazar <[email protected]> Reviewed-by: Mario Limonciello <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2022-05-10drm/amdgpu: Remove duplicated argument in vcn_v4_0Wan Jiabing1-1/+0
Fix following coccicheck warning: ./drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c:724:4-36: duplicated argument to & or | Remove duplicated UVD_SUVD_CGC_GATE__SRE_H264_MASK. Signed-off-by: Wan Jiabing <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-05-10Revert "drm/amd/pm: keep the BACO feature enabled for suspend"Alex Deucher1-7/+1
This reverts commit eaa090538e8d21801c6d5f94590c3799e6a528b5. Commit ebc002e3ee78 ("drm/amdgpu: don't use BACO for reset in S3") stops using BACO for reset during suspend, so it's no longer necessary to leave BACO enabled during suspend. This fixes resume from suspend on the navy flounder dGPU in the ASUS ROG Strix G513QY. Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/2008 Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1982 Reviewed-by: Lijo Lazar <[email protected]> Reviewed-by: Mario Limonciello <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-05-10drm/amdgpu: vm flush needed after updating PDEsPhilip Yang1-0/+3
If page table PDEs is evicted and restored, after updating PDEs, need increase vm->tlb_seq, then amdgpu_vm_flush will flush TLB before command submission. Signed-off-by: Philip Yang <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-05-10drm/amd/display: 3.2.185Aric Cyr1-1/+1
This version brings along following fixes: - Refactor LTTPR code - Fix PSR after hibernate - Fix DC build errors - Fix IRQ unregister error when unloading amdgpu - Improve DP link training - Fix stutter - Remove redundant CONFIG_DRM_AMD_DC_DCN guards - Fix 2nd connected USB-C display not lighting up Acked-by: Stylon Wang <[email protected]> Signed-off-by: Aric Cyr <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-05-10Revert "drm/amd/display: Fix DCN3 B0 DP Alt Mapping"Stylon Wang1-6/+0
This reverts commit 4b7786d87fb3adf3e534c4f1e4f824d8700b786b. Commit 4b7786d87fb3 ("drm/amd/display: Fix DCN3 B0 DP Alt Mapping") is causing 2nd USB-C display not lighting up. Phy id remapping is done differently than is assumed in this patch. Signed-off-by: Stylon Wang <[email protected]> Reviewed-by: Nicholas Kazlauskas <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-05-10drm/amd/display: remove unnecessary else by CONFIG_DRM_AMD_DC_DCNAlex Hung1-4/+0
[Why & How] CONFIG_DRM_AMD_DC_DCN is used by pass the compilation failures, but DC code should be OS-agnostic. This patch fixes it by removing unnecessasry CONFIG_DRM_AMD_DC_DCN guards for #if-#else clause. Reviewed-by: Rodrigo Siqueira <[email protected]> Acked-by: Stylon Wang <[email protected]> Signed-off-by: Alex Hung <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-05-10drm/amdgpu/vcn: include header for vcn_dec_sw_ring_emit_fenceJames Zhu1-0/+1
Fixed warning: no previous prototype for 'vcn_dec_sw_ring_emit_fence'. v2: regenerate patch after git rebase. v3: update commit message. Signed-off-by: James Zhu <[email protected]> Reported-by: kernel test robot <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-05-10amdgpu/pm: Disallow managing power profiles on SRIOV for Sienna CichlidDanijel Slivka1-0/+9
Managing power profiles mode is not allowed in SRIOV mode for Sienna Cichlid. This patch is adjusting the "pp_power_profile_mode" and "power_dpm_force_performance_level" accordingly. Signed-off-by: Danijel Slivka <[email protected]> Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-05-10drm/amd/display: remove redundant CONFIG_DRM_AMD_DC_DCN in amdgpu_dmAlex Hung7-66/+3
[Why & How] CONFIG_DRM_AMD_DC_DCN is used by pass the compilation failures, but DC code should be OS-agnostic. This patch fixes it by removing unnecessasry CONFIG_DRM_AMD_DC_DCN in amdgpu_dm directory. Reviewed-by: Rodrigo Siqueira <[email protected]> Acked-by: Stylon Wang <[email protected]> Signed-off-by: Alex Hung <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-05-10drm/amd/pm: suppress compile warning about possible unaligned accessesEvan Quan1-1/+4
Suppress the following compile warning: In file included from drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu13/smu_v13_0_0_ppt.c:39: >> drivers/gpu/drm/amd/amdgpu/../pm/inc/smu_v13_0_0_pptable.h:194:39: warning: field overdrive_table within 'struct smu_13_0_0_powerplay_table' is less aligned than 'struct smu_13_0_0_overdrive_table' and is usually due to 'struct smu_13_0_0_powerplay_table' being packed, which can lead to unaligned accesses [-Wunaligned-access] Reported-by: kernel test robot <[email protected]> Signed-off-by: Evan Quan <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-05-10drm/amdgpu/vcn: Add vcn ras poison consumption event handlingMohammad Zafar Ziya4-0/+33
Add vcn ras poison consumption event handling V2: Removed default poison consumption handling function cb Signed-off-by: Mohammad Zafar Ziya <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Reviewed-by: Tao Zhou <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-05-10drm/amdgpu/jpeg: add jpeg ras poison consumption handlingMohammad Zafar Ziya4-0/+41
Add jpeg ras poison event callback and consumption handling V2: Removed the default poison consumption cb handle Signed-off-by: Mohammad Zafar Ziya <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Reviewed-by: Tao Zhou <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-05-10drm/amd/display: remove redundant CONFIG_DRM_AMD_DC_DCN for z10Alex Hung3-16/+2
[Why & How] CONFIG_DRM_AMD_DC_DCN is used by pass the compilation failures, but DC code should be OS-agnostic. This patch fixes it by removing unnecessasry CONFIG_DRM_AMD_DC_DCN for enabling z10. Reviewed-by: Rodrigo Siqueira <[email protected]> Acked-by: Stylon Wang <[email protected]> Signed-off-by: Alex Hung <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-05-10drm/amd/display: remove redundant CONFIG_DRM_AMD_DC_DCN in irqAlex Hung4-13/+1
[Why & How] CONFIG_DRM_AMD_DC_DCN is used by pass the compilation failures, but DC code should be OS-agnostic. This patch fixes it by removing unnecessasry CONFIG_DRM_AMD_DC_DCN in irq directory. Reviewed-by: Rodrigo Siqueira <[email protected]> Acked-by: Stylon Wang <[email protected]> Signed-off-by: Alex Hung <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-05-10drm/amdgpu: refine RAS poison consumption handlerTao Zhou1-17/+26
Qeury ras status before ras poison consumption handling, add more comment and log. Signed-off-by: Tao Zhou <[email protected]> Reviewed-and-tested-by: Mohammad Zafar Ziya <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-05-10drm/amdgpu: enable RAS IH for poison consumptionTao Zhou1-1/+3
Enable RAS IH if poison consumption handler is implemented. Signed-off-by: Tao Zhou <[email protected]> Reviewed-by: Mohammad Zafar Ziya <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-05-10drm/amd/display: remove redundant CONFIG_DRM_AMD_DC_DCN in gpioAlex Hung7-18/+1
[Why & How] CONFIG_DRM_AMD_DC_DCN is used by pass the compilation failures, but DC code should be OS-agnostic. This patch fixes it by removing unnecessasry CONFIG_DRM_AMD_DC_DCN in gpio directory. Reviewed-by: Rodrigo Siqueira <[email protected]> Acked-by: Stylon Wang <[email protected]> Signed-off-by: Alex Hung <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-05-10drm/amd/display: remove redundant CONFIG_DRM_AMD_DC_DCN in dceAlex Hung5-57/+3
[Why & How] CONFIG_DRM_AMD_DC_DCN is used by pass the compilation failures, but DC code should be OS-agnostic. This patch fixes it by removing unnecessasry CONFIG_DRM_AMD_DC_DCN in dce directory. Reviewed-by: Rodrigo Siqueira <[email protected]> Acked-by: Stylon Wang <[email protected]> Signed-off-by: Alex Hung <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-05-10drm/amd/display: remove redundant CONFIG_DRM_AMD_DC_DCN in dcAlex Hung12-121/+10
[Why & How] CONFIG_DRM_AMD_DC_DCN is used by pass the compilation failures, but DC code should be OS-agnostic. This patch fixes it by removing unnecessasry CONFIG_DRM_AMD_DC_DCN in dc and dc/core directories. Reviewed-by: Rodrigo Siqueira <[email protected]> Acked-by: Stylon Wang <[email protected]> Signed-off-by: Alex Hung <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-05-10drm/amd/display: do not wait for vblank during pipe programmingJosip Pavic1-1/+0
[Why] Waiting for the vlbank every time a global sync update is requested, including during full update flips, results in a stutter. [How] Do not wait for vblank during pipe programming. Reviewed-by: Aric Cyr <[email protected]> Acked-by: Stylon Wang <[email protected]> Signed-off-by: Josip Pavic <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-05-10drm/amd/display: do not calculate DP2.0 SST payload when link is offWenjing Liu1-1/+2
[Why & How] There is a chance where the RX issues HPD deassert in the middle of link training, this will cause our logic to abort link training and turn off link. However our payload allocation logic needs to use current link settings to determine average time slot per MTP. This will need to use current link bandwidth as divider. This causes divide by zero error occasionally. The fix is to skip DP2.0 payload allocation logic if current link is not in 128b/132b mode. Reviewed-by: George Shen <[email protected]> Acked-by: Stylon Wang <[email protected]> Signed-off-by: Wenjing Liu <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-05-10drm/amd/display: do not disable an invalid irq source in hdp finishAlan Liu1-1/+5
[why] Observing error log about trying to disable non-implemented irq source when user unload the driver. [how] Check and filter the invalid irq source before disabling it. Reviewed-by: Qingqing (Lillian) Zhuo <[email protected]> Acked-by: Stylon Wang <[email protected]> Signed-off-by: Alan Liu <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-05-10drm/amd/display: move definition of dc_flip_addrs structJosip Pavic2-12/+16
[Why & How] Move definition of dc_flip_addrs struct from dc.h to dc_hw_types.h to prevent build errors Reviewed-by: Aric Cyr <[email protected]> Acked-by: Stylon Wang <[email protected]> Signed-off-by: Josip Pavic <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-05-10drm/amd/display: Reset cached PSR parameters after hibernateEvgenii Krasnikov1-1/+4
[WHY] After hibernate system might be using old invalid psr_power_opt and psr_allow_active that never get reset [HOW] Reset cached Panel Self Refresh parameters when PSR is first configured for eDP in dc_link_setup_psr. Reviewed-by: Anthony Koo <[email protected]> Acked-by: Stylon Wang <[email protected]> Signed-off-by: Evgenii Krasnikov <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-05-10drm/amd/display: Refactor LTTPR cap retrievalMichael Strauss4-73/+113
[WHY] Split LTTPR mode selection between platform support and downstream link support Reviewed-by: Wesley Chalmers <[email protected]> Acked-by: Stylon Wang <[email protected]> Signed-off-by: Michael Strauss <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-05-10drm/amdgpu: support memory power gating for lsdma 6.0.2Likun Gao1-0/+1
Support memory power gating control for lsdma 6.0.2. Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-05-10drm/amdgpu: support memory power gating for lsdmaLikun Gao3-2/+27
Support memory power gating control for LSDMA. Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-05-10drm/amdgpu: add LSDMA block for LSDMA v6.0.2Likun Gao1-0/+1
Add LSDMA ip block for LSDMA v6.0.2. Signed-off-by: Likun Gao <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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