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2016-08-30drm/amd/powerplay: Fix CZ SMU firmware load check (v4)Tom St Denis1-4/+4
Remove an errant return in the middle of the check function as well as check for success in the start function. (v2) Add return check to smu_load_fw() (v3) Don't return early if SMU load check fails (v4) No returns! :-) Signed-off-by: Tom St Denis <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-30drm/amdgpu: throttle buffer migrations at CS using a fixed MBps limit (v2)Marek Olšák4-48/+127
The old mechanism used a per-submission limit that didn't take previous submissions within the same time frame into account. It also filled VRAM slowly when VRAM usage dropped due to a big eviction or buffer deallocation. This new method establishes a configurable MBps limit that is obeyed when VRAM usage is very high. When VRAM usage is not very high, it gives the driver the freedom to fill it quickly. The result is more consistent performance. It can't keep the BO move rate low if lots of evictions are happening due to VRAM fragmentation, or if a big buffer is being migrated. The amdgpu.moverate parameter can be used to set a non-default limit. Measurements can be done to find out which amdgpu.moverate setting gives the best results. Mainly APUs and cards with small VRAM will benefit from this. For F1 2015, anything with 2 GB VRAM or less will benefit. Some benchmark results - F1 2015 (Tonga 2GB): Limit MinFPS AvgFPS Old code: 14 32.6 128 MB/s: 28 41 64 MB/s: 15.5 43 32 MB/s: 28.7 43.4 8 MB/s: 27.8 44.4 8 MB/s: 21.9 42.8 (different run) Random drops in Min FPS can still occur (due to fragmented VRAM?), but the average FPS is much better. 8 MB/s is probably a good limit for this game & the current VRAM management. The random FPS drops are still to be tackled. v2: use a spinlock Signed-off-by: Marek Olšák <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-25drm/amd/amdgpu: Tidy up cz_dpm.cTom St Denis1-20/+11
Various minor formatting changes. Signed-off-by: Tom St Denis <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-25drm/amd/amdgpu: Clean up memory leak in cz_dpm_init().Tom St Denis1-5/+9
If init fails free up any allocated memory. Signed-off-by: Tom St Denis <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-25drm/amd/amdgpu: Fix memleak in cz_parse_power_table()Tom St Denis1-0/+2
If one of the entries fails to be allocated then free all of the previous entries before freeing the array which holds their pointers. Signed-off-by: Tom St Denis <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-25drm/amdgpu: refine uvd gate logic for CI.Rex Zhu1-4/+2
uvd dpm will be controlled by uvd. dpm just disable uvd dpm in case of suspend when play video. due to the new logic of uvd_begin_use/end_use, if disable uvd dpm in late init, will have no chance to enable uvd dpm after resume until play video again. Change-Id: I70e3d7efe63edad37f26e6c5ea089da1135c0ab5 Signed-off-by: Rex Zhu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-25drm/amd/powerplay: simplify struct amd_pp_init.Rex Zhu6-15/+0
delete the members not needed when amd_powerplay_init. Signed-off-by: Rex Zhu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-25drm/amd/powerplay: get system info by cgs interface.Rex Zhu1-4/+20
Signed-off-by: Rex Zhu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-25drm/amdgpu: add support for getting sub_device id andRex Zhu2-0/+8
sub_vendor_id in cgs interface. Signed-off-by: Rex Zhu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-25drm/amdgpu: add vce bypass mode for tonga.Rex Zhu1-1/+2
fix issue that encode test failed on the second time when vce dpm enabled on tonga. Signed-off-by: Rex Zhu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-25drm/amd/powerplay: add bypass mode for vce 2.0.Rex Zhu1-2/+19
fix issue after vce encode, the eclk stay high. Signed-off-by: Rex Zhu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-25drm/amdgpu: refine function name for consistencyRex Zhu1-2/+2
Signed-off-by: Rex Zhu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-25drm/amdgpu/vce3: add support for third vce ringAlex Deucher3-7/+21
Not of much use at the moment (we don't really use the second ring either), but may be useful later. Reviewed-by: JimQu <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-25drm/amdgpu: track the number of vce ringsAlex Deucher4-52/+45
Rather than using a hardcoded value. This allows different versions to expose more or less rings. No functional change. Reviewed-by: JimQu <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-25drm/amdgpu: rename suspend_kms and resume_kmsAlex Deucher3-14/+14
The old names were dragged over from radeon. The new ones better match the naming conventions used in the driver. No functional change. Signed-off-by: Alex Deucher <[email protected]>
2016-08-25Merge branch 'drm-next-4.9' of git://people.freedesktop.org/~agd5f/linux ↵Dave Airlie91-1869/+14254
into drm-next First drm-next pull for radeon and amdgpu for 4.9. Highlights: - powerplay support for iceland asics - improved GPU reset (both full asic and per block) - UVD and VCE powergating for CZ and ST - VCE clockgating for CZ and ST - Support for pre-initialized (e.g., zeroed) vram buffers - ttm cleanups - virtual display support - core and radeon/amdgpu support for page_flip_target - lots of bug fixes and clean ups * 'drm-next-4.9' of git://people.freedesktop.org/~agd5f/linux: (171 commits) drm/amdgpu: use memcpy_toio for VCE firmware upload drm/amdgpu: use memcpy_to/fromio for UVD fw upload drm/amd/powerplay: delete useless code in iceland_hwmgr.c. drm/radeon: switch UVD code to use UVD_NO_OP for padding drm/amdgpu: switch UVD code to use UVD_NO_OP for padding drm/radeon: add support for UVD_NO_OP register drm/amdgpu: add support for UVD_NO_OP register drm/amdgpu: fix VCE ib alignment value drm/amdgpu: fix IB alignment for UVD drm/amd/amdgpu: Print ring name in amdgpu_ib_schedule() drm/radeon: remove dead code, si_mc_load_microcode (v2) drm/radeon/cik: remove dead code (v2) drm/amd/powerplay: avoid NULL dereference, cz_hwmgr.c drm/amd/powerplay: avoid NULL pointer dereference drm/amdgpu/gmc8: remove dead code (v2) drm/amdgpu/gmc7: remove dead code (v2) drm/amdgpu: Fix indentation in dce_v8_0_audio_write_sad_regs() drm/amdgpu: Use correct mask in dce_v8_0_afmt_setmode() and fix comment typos. drm/amdgpu: cleanup amdgpu_vm_bo_update params drm/amdgpu: stop adding dummy entry in amdgpu_ttm_placement_init ...
2016-08-24drm/amdgpu: use memcpy_toio for VCE firmware uploadChristian König1-2/+2
Try to be clean here, even when it's a noop on x86. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-24drm/amdgpu: use memcpy_to/fromio for UVD fw uploadChristian König1-5/+5
Also use the firmware size from the header instead of calculating it. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-24drm/amd/powerplay: delete useless code in iceland_hwmgr.c.Rex Zhu1-2/+0
Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-24drm/amdgpu: switch UVD code to use UVD_NO_OP for paddingAlex Deucher6-5/+9
Replace packet2's with packet0 writes to UVD_NO_OP. The value written to UVD_NO_OP does not matter. Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-24drm/amdgpu: add support for UVD_NO_OP registerAlex Deucher3-1/+4
Writes to this register are the preferred way to do NOPs. Bump the driver version as well. Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-24drm/amdgpu: fix VCE ib alignment valueAlex Deucher1-1/+1
The VCE rings only require single dword alignment. Signed-off-by: Alex Deucher <[email protected]>
2016-08-24drm/amdgpu: fix IB alignment for UVDAlex Deucher1-1/+1
According to the hw team, it should be 16, not 8. Cc: Peter Fang <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2016-08-24drm/amdgpu: skip TV/CV in display parsingAlex Deucher1-0/+7
No asics supported by amdgpu support analog TV. Workaround for bug: https://bugs.freedesktop.org/show_bug.cgi?id=97460 Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2016-08-24drm/amdgpu: avoid a possible array overflowAlex Deucher1-0/+6
When looking up the connector type make sure the index is valid. Avoids a later crash if we read past the end of the array. Workaround for bug: https://bugs.freedesktop.org/show_bug.cgi?id=97460 Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2016-08-24drm/amdgpu: fix lru size grouping v2Christian König2-0/+10
Adding a BO can make it the insertion point for larger sizes as well. v2: add a comment about the guard structure. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2016-08-23drm/amd/amdgpu: Print ring name in amdgpu_ib_schedule()Tom St Denis1-1/+1
If the ring isn't ready lets print out which ring name to help debugging. Signed-off-by: Tom St Denis <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-23drm/amd/powerplay: avoid NULL dereference, cz_hwmgr.cHeinrich Schuchardt1-1/+1
if (a == NULL || a->b == NULL) leads to a NULL pointer dereference if a == NULL. Reviewed-by: Christian König <[email protected]> Signed-off-by: Heinrich Schuchardt <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-23drm/amd/powerplay: avoid NULL pointer dereferenceHeinrich Schuchardt1-2/+2
if (a == NULL || a->b == NULL) leads to a NULL pointer dereference if a == NULL. Reviewed-by: Christian König <[email protected]> Signed-off-by: Heinrich Schuchardt <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-23drm/amdgpu/gmc8: remove dead code (v2)Heinrich Schuchardt1-9/+1
In an if block for (running == 0) running cannot be non-zero. v2: agd: remove unused variable Reviewed-by: Christian König <[email protected]> Signed-off-by: Heinrich Schuchardt <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-23drm/amdgpu/gmc7: remove dead code (v2)Heinrich Schuchardt1-9/+1
In an if block for (running == 0) running cannot be non-zero. v2: agd: remove unused variable Reviewed-by: Christian König <[email protected]> Signed-off-by: Heinrich Schuchardt <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-23drm/amdgpu: Fix indentation in dce_v8_0_audio_write_sad_regs()Alexandre Demers1-7/+7
Fixed indentation for readability. Reviewed-by: Christian König <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]> Signed-off-by: Alexandre Demers <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-22drm/amdgpu: Use correct mask in dce_v8_0_afmt_setmode() and fix comment typos.Alexandre Demers1-3/+3
We were using the same mask twice. Looking at radeon, it seems we should be using HDMI_AVI_INFO_CONT instead as the second mask. Being there, fix typos in comments and improved readability. I haven't looked at other DCEs, the mask may also be wrong for them. Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alexandre Demers <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-22drm/amdgpu: cleanup amdgpu_vm_bo_update paramsChristian König3-12/+13
Make it more obvious what we are doing here. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-22drm/amdgpu: stop adding dummy entry in amdgpu_ttm_placement_initChristian König1-5/+3
AMDGPU_GEM_CREATE_NO_CPU_ACCESS and AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED are obviously mutual exclusive. So stop adding a dummy entry without effect when both are specified. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-22drm/amdgpu: cleanup amdgpu_ttm_placement_initChristian König1-52/+60
Make it more clear what this function does. No intendet functional change. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-22drm/amdgpu: fix lru size grouping v2Christian König2-0/+10
Adding a BO can make it the insertion point for larger sizes as well. v2: add a comment about the guard structure. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-22drm/amd/powerplay: Tidy up cz_hwmgr.cTom St Denis1-40/+13
Clean up whitespace and formatting. Signed-off-by: Tom St Denis <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-22drm/amdgpu: add AMDGPU_INFO_NUM_EVICTIONSMarek Olšák2-1/+5
For profiling. v2: really bump the minor version Signed-off-by: Marek Olšák <[email protected]> Reviewed-by: Christian König <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-22drm/amdgpu: recover vram bo from shadow after gpu reset V2Chunming Zhou1-0/+62
V2: 1. don't directly submit to many jobs at the same time. 2. delete unrelated printk. Signed-off-by: Chunming Zhou <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-22drm/amdgpu: link all shadow bo V2Chunming Zhou3-1/+19
V2: 1. use mutex instead of spinlock for shadow list, since its process could sleep. 2. move list_del to bo destroy phase. Signed-off-by: Chunming Zhou <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-22drm/amdgpu: update pt shadow while updating pt V2Chunming Zhou1-1/+15
V2: move shadow parameter to amdgpu_pte_update_params. Signed-off-by: Chunming Zhou <[email protected]> Reviewed-by: Christian König <[email protected]> Cc: [email protected] Signed-off-by: Alex Deucher <[email protected]>
2016-08-22drm/amdgpu: update pd shadow while updating pd V2Chunming Zhou2-19/+42
V2: Checking if shadow is valid. Signed-off-by: Chunming Zhou <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-22drm/amdgpu: sync bo and shadow V3Chunming Zhou3-8/+76
Use shadow flag to judge which direction to sync. V2: Don't need bo pin, so remove it. V3: 1. Split to two functions, one is backup_to_shadow, another is restore_from_shadow. 2. Clean up previous shadow direction difinitions. Signed-off-by: Chunming Zhou <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-22drm/amdgpu: add direct submision option for copy_bufferChunming Zhou4-11/+21
Signed-off-by: Chunming Zhou <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-19drm/amdgpu: add need backup function V2Chunming Zhou3-1/+10
V2: add checking if need backup in amdgpu_bo_create. Signed-off-by: Chunming Zhou <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-19drm/amd/amdgpu: S3 resumed failed after 4-5 times loopjimqu1-52/+81
Phenomenon: software hang when device resume back, read UVD fence is 0xffffffff and read pcie pid is 0xffff. The issue is caused by VCE reset when update cg setting. according to HW programming guide, adjust update VCE cg sequence. The patch apply to VCE2.0. Signed-off-by: JimQu <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-19drm/amdgpu: use domain's gpu_offset for start addrFlora Cui2-11/+3
Signed-off-by: Flora Cui <[email protected]> Reviewed-by: Ken Wang <[email protected]> Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-19drm/amdgpu: update gart_pin_size only if the bo is pined to GTTFlora Cui1-1/+1
Signed-off-by: Flora Cui <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-19drm/amdgpu: check domain sanity in amdgpu_bo_pin_restricted()Flora Cui1-0/+5
abort if the bo is pined to other domain already Signed-off-by: Flora Cui <[email protected]> Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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