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2018-02-06drm/amdgpu: Add GPUVM memory management functions for KFDFelix Kuehling10-4/+1818
v2: * Removed unused flags from struct kgd_mem * Updated some comments * Added a check to unmap_memory_from_gpu whether BO was mapped v3: add mutex_destroy in relevant places Signed-off-by: Felix Kuehling <[email protected]> Acked-by: Oded Gabbay <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2018-02-06drm/amdgpu: add amdgpu_sync_cloneFelix Kuehling2-0/+36
Cloning a sync object is useful for waiting for a sync object without locking the original structure indefinitely, blocking other threads. Signed-off-by: Felix Kuehling <[email protected]> Acked-by: Oded Gabbay <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2018-02-06drm/amdgpu: Update kgd2kfd_shared_resources for dGPU supportFelix Kuehling3-2/+26
Add GPUVM size and DRM render node. Also add function to query the VMID mask to avoid hard-coding it in multiple places later. v2: cut off GPUVM size at the VA hole Signed-off-by: Felix Kuehling <[email protected]> Reviewed-by: Oded Gabbay <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2018-02-06drm/amdgpu: Add KFD eviction fenceFelix Kuehling7-4/+241
This fence is used by KFD to keep memory resident while user mode queues are enabled. Trying to evict memory will trigger the enable_signaling callback, which starts a KFD eviction, which involves preempting user mode queues before signaling the fence. There is one such fence per process. v2: * Grab a reference to mm_struct * Dereference fence after NULL check * Simplify fence release, no need to signal without anyone waiting * Added signed-off-by Harish, who is the original author of this code v3: * update MAINTAINERS file * change amd_kfd_ prefix to amdkfd_ * remove useless initialization of variable to NULL v4: * set amdkfd_fence_ops to be static * Suggested by: Fengguang Wu <[email protected]> Signed-off-by: Harish Kasiviswanathan <[email protected]> Signed-off-by: Felix Kuehling <[email protected]> Reviewed-by: Oded Gabbay <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2018-02-06drm/amdgpu: Remove unused kfd2kgd interfaceFelix Kuehling3-21/+0
Signed-off-by: Felix Kuehling <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2018-02-06drm/amdgpu: Fix wrong mask in get_atc_vmid_pasid_mapping_pasidFelix Kuehling2-2/+2
Signed-off-by: Felix Kuehling <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2018-02-06drm/amdgpu: Fix header file dependenciesFelix Kuehling2-0/+2
Signed-off-by: Felix Kuehling <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2018-02-06drm/amdgpu: Replace kgd_mem with amdgpu_bo for kernel pinned gtt memYong Zhao1-24/+23
The extra fields in struct kgd_mem aren't actually needed. This struct will be used for GPUVM allocations later. Signed-off-by: Yong Zhao <[email protected]> Signed-off-by: Felix Kuehling <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2018-02-06drm/amdgpu: remove useless BUG_ONsFelix Kuehling3-10/+0
Dereferencing NULL pointers will cause a BUG anyway. No need to do an explicit check. Signed-off-by: Felix Kuehling <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2018-01-04drm/amdgpu: Enable KFD initialization on dGPUsFelix Kuehling1-0/+5
Signed-off-by: Felix Kuehling <[email protected]> Reviewed-by: Oded Gabbay <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2018-01-04drm/amdkfd: Add dGPU device IDs and device infoFelix Kuehling1-2/+143
v2: remove needs_iommu field as it doesn't exists CC: [email protected] Signed-off-by: Felix Kuehling <[email protected]> Reviewed-by: Oded Gabbay <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2018-01-04drm/amdkfd: Add dGPU support to kernel_queue_initFelix Kuehling1-0/+5
Recognize dGPU ASIC families. Signed-off-by: Felix Kuehling <[email protected]> Reviewed-by: Oded Gabbay <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2018-01-04drm/amdkfd: Add dGPU support to the MQD managerFelix Kuehling4-3/+64
On dGPUs don't set ATC addressing bits and use MTYPE_UC for coherent memory. Signed-off-by: Felix Kuehling <[email protected]> Acked-by: Oded Gabbay <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2018-01-04drm/amdkfd: Add dGPU support to the device queue managerFelix Kuehling4-0/+164
GFXv7 and v8 dGPUs use a different addressing mode for KFD compared to APUs (GPUVM64 vs HSA64). And dGPUs don't support MTYPE_CC. They use MTYPE_UC instead for memory that requires coherency. Signed-off-by: Felix Kuehling <[email protected]> Acked-by: Oded Gabbay <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2018-01-04drm/amdkfd: Make sched_policy a per-device settingFelix Kuehling6-9/+29
Some dGPUs don't support HWS. Allow them to use a per-device sched_policy that may be different from the global default. Signed-off-by: Felix Kuehling <[email protected]> Reviewed-by: Oded Gabbay <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2018-01-04drm/amdkfd: Conditionally enable PCIe atomicsFelix Kuehling2-0/+18
This will be needed for most dGPUs. CC: [email protected] Signed-off-by: Felix Kuehling <[email protected]> Reviewed-by: Oded Gabbay <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2018-01-18drm/amdkfd: Use ARRAY_SIZE macro in kfd_build_sysfs_node_entryGustavo A. R. Silva1-1/+1
Use ARRAY_SIZE instead of dividing sizeof array with sizeof an element. This issue was detected with the help of Coccinelle. Signed-off-by: Gustavo A. R. Silva <[email protected]> Reviewed-by: Felix Kuehling<[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2018-03-09Merge branch 'drm-next-4.17' of git://people.freedesktop.org/~agd5f/linux ↵Dave Airlie146-3547/+35332
into drm-next More stuff for 4.17. Highlights: - More fixes for "wattman" like functionality (fine grained clk/voltage control) - Add more power profile infrastucture (context based dpm) - SR-IOV fixes - Add iomem debugging interface for use with umr - Powerplay and cgs cleanups - DC fixes and cleanups - ttm improvements - Misc cleanups all over * 'drm-next-4.17' of git://people.freedesktop.org/~agd5f/linux: (143 commits) drm/amdgpu:Always save uvd vcpu_bo in VM Mode drm/amdgpu:Correct max uvd handles drm/amdgpu: replace iova debugfs file with iomem (v3) drm/amd/display: validate plane format on primary plane drm/amdgpu: Clean sdma wptr register when only enable wptr polling drm/amd/amdgpu: re-add missing GC 9.1 and SDMA0 4.1 sh_mask header files drm/amdgpu: give warning before sleep in kiq_r/wreg drm/amdgpu: further mitigate workaround for i915 drm/amdgpu: drop gtt->adev drm/amdgpu: add amdgpu_evict_gtt debugfs entry drm/amd/pp: Add #ifdef checks for CONFIG_ACPI drm/amd/pp: fix "Delete the wrapper layer of smu_allocate/free_memory" drm/amd/pp: Drop wrapper functions for upper/lower_32_bits drm/amdgpu: Delete cgs wrapper functions for gpu memory manager drm/amd/pp: Delete the wrapper layer of smu_allocate/free_memory drm/amd/pp: Remove cgs wrapper function for temperature update Revert "drm/amd/pp: Add a pp feature mask bit for AutoWattman feature" drm/amd/pp: Add auto power profilng switch based on workloads (v2) drm/amd/pp: Revert gfx/compute profile switch sysfs drm/amd/pp: Fix sclk in highest two levels when compute on smu7 ...
2018-03-07drm/amdgpu:Always save uvd vcpu_bo in VM ModeJames Zhu1-5/+8
When UVD is in VM mode, there is not uvd handle exchanged, uvd.handles are always 0. So vcpu_bo always need save, Otherwise amdgpu driver will fail during suspend/resume. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105021 Signed-off-by: James Zhu <[email protected]> Reviewed-by: Leo Liu <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2018-03-07drm/amdgpu:Correct max uvd handlesJames Zhu1-1/+1
Max uvd handles should use adev->uvd.max_handles instead of AMDGPU_MAX_UVD_HANDLES here. Signed-off-by: James Zhu <[email protected]> Reviewed-by: Leo Liu <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2018-03-07drm/amdgpu: replace iova debugfs file with iomem (v3)Tom St Denis1-21/+81
This allows access to pages allocated through the driver with optional IOMMU mapping. v2: Fix number of bytes copied and add write method v3: drop check for kmap return Original-by: Christian König <[email protected]> Signed-off-by: Tom St Denis <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-07drm/amd/display: validate plane format on primary planeShirish S1-0/+7
In dce110, the plane configuration is such that plane 0 or the primary plane should be rendered with only RGB data. This patch adds the validation to ensure that no video data is rendered on plane 0. Signed-off-by: Shirish S <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-07drm/amdgpu: Clean sdma wptr register when only enable wptr pollingEmily Deng1-2/+5
The sdma wptr polling memory is not fast enough, then the sdma wptr register will be random, and not equal to sdma rptr, which will cause sdma engine hang when load driver, so clean up the sdma wptr directly to fix this issue. v2:add comment above the code and correct coding style Reviewed-by: Xiangliang Yu <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Emily Deng <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-07drm/amd/amdgpu: re-add missing GC 9.1 and SDMA0 4.1 sh_mask header filesTom St Denis2-0/+32808
These are required by umr to properly parse bitfield offsets. Signed-off-by: Tom St Denis <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-07drm/amdgpu: give warning before sleep in kiq_r/wregMonk Liu1-0/+7
to catch error that may schedule in atomic context early on Signed-off-by: Monk Liu <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-07drm/amdgpu: further mitigate workaround for i915Christian König1-3/+9
Disable the workaround on imported BOs as well. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-07drm/amdgpu: drop gtt->adevChristian König1-5/+5
We can use ttm->bdev instead. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-07drm/amdgpu: add amdgpu_evict_gtt debugfs entryChristian König1-1/+12
Allow evicting all BOs from the GTT domain. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-07drm/amd/pp: Add #ifdef checks for CONFIG_ACPIRex Zhu2-0/+4
Fix compiling error when CONFIG_ACPI not enabled. Change-Id: I5f901adbc799c10b30e5ea79f8f44760e749fae1 Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]>
2018-03-07drm/amd/pp: fix "Delete the wrapper layer of smu_allocate/free_memory"Christian König2-2/+2
For amdgpu_bo_create_kernel to work the handle must be NULL initialized, otherwise we only try to pin and map the BO. Signed-off-by: Christian König <[email protected]> Reviewed-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-07drm/amd/pp: Drop wrapper functions for upper/lower_32_bitsRex Zhu5-33/+28
replace smu_upper_32_bits/smu_lower_32_bits with the standard kernel macros Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-07drm/amdgpu: Delete cgs wrapper functions for gpu memory managerRex Zhu2-246/+0
delete those cgs interfaces: amdgpu_cgs_alloc_gpu_mem amdgpu_cgs_free_gpu_mem amdgpu_cgs_gmap_gpu_mem amdgpu_cgs_gunmap_gpu_mem amdgpu_cgs_kmap_gpu_mem amdgpu_cgs_kunmap_gpu_mem Reviewed-by: Alex Deucher <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-07drm/amd/pp: Delete the wrapper layer of smu_allocate/free_memoryRex Zhu10-301/+195
use amdgpu_bo_create/free_kernel instand. Reviewed-by: Alex Deucher <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-07drm/amd/pp: Remove cgs wrapper function for temperature updateRex Zhu3-20/+3
Reviewed-by: Alex Deucher <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-07Revert "drm/amd/pp: Add a pp feature mask bit for AutoWattman feature"Rex Zhu1-1/+0
This reverts commit e429ea87b2939c4cce1b439baf6d76535a0767f2. Implement Workload Aware Dynamic power management instand of AutoWattman feature in linux. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-07drm/amd/pp: Add auto power profilng switch based on workloads (v2)Rex Zhu9-37/+66
Add power profiling mode dynamic switch based on the workloads. Currently, support Cumpute, VR, Video, 3D,power saving with Cumpute have highest prority, power saving have lowest prority. in manual dpm mode, driver will stop auto switch, just save the client's requests. user can set power profiling mode through sysfs. when exit manual dpm mode, driver will response the client's requests. switch based on the client's prority. v2: squash in fixes from Rex Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-06drm/amd/pp: Revert gfx/compute profile switch sysfsRex Zhu18-998/+0
The gfx/compute profiling mode switch is only for internally test. Not a complete solution and unexpectly upstream. so revert it. Reviewed-by: Evan Quan <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-06drm/amd/pp: Fix sclk in highest two levels when compute on smu7Rex Zhu1-0/+21
Compute workload tends to be "bursty", Only tune the behavior of nature dpm don't work well for most of such workloads. From test results, Fix sclk in highest two levels can get better performance. so add min sclk setting into the default cumpute workload policy on smu7. user still can change sclk range through sysfs pp_dpm_sclk for better perf/watt. Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-06drm/amd/pp: Implement get/set_power_profile_mode on smu7Rex Zhu1-0/+143
It show what parameters can be configured to tune the behavior of natural dpm for perf/watt on smu7. user can select the mode per workload, but even the default per workload settings are not bulletproof. user can configure custom settings per different use case for better perf or better perf/watt. cat pp_power_profile_mode NUM MODE_NAME SCLK_UP_HYST SCLK_DOWN_HYST SCLK_ACTIVE_LEVEL MCLK_UP_HYST MCLK_DOWN_HYST MCLK_ACTIVE_LEVEL 0 3D_FULL_SCREEN: 0 100 30 0 100 10 1 POWER_SAVING: 10 0 30 - - - 2 VIDEO: - - - 10 16 31 3 VR: 0 11 50 0 100 10 4 COMPUTE: 0 5 30 - - - 5 CUSTOM: 0 0 0 0 0 0 * CURRENT: 0 100 30 0 100 10 Under manual dpm level, user can echo "0/1/2/3/4">pp_power_profile_mode to select 3D_FULL_SCREEN/POWER_SAVING/VIDEO/VR/COMPUTE mode. echo "5 * * * * * * * *">pp_power_profile_mode to set custom settings. "5 * * * * * * * *" mean "CUSTOM enable_sclk SCLK_UP_HYST SCLK_DOWN_HYST SCLK_ACTIVE_LEVEL enable_mclk MCLK_UP_HYST MCLK_DOWN_HYST MCLK_ACTIVE_LEVEL" if the parameter enable_sclk/enable_mclk is true, driver will update the following parameters to dpm table. if false, ignore the following parameters. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-06drm/amd/pp: Implement update_dpm_settings on CIRex Zhu1-0/+97
use SW method to update DPM settings by updating SRAM directly on CI. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-06drm/amd/pp: Implement update_dpm_settings on TongaRex Zhu1-0/+97
use SW method to update DPM settings by updating SRAM directly on Tonga. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-06drm/amd/pp: Implement update_dpm_settings on FijiRex Zhu1-0/+97
use SW method to update DPM settings by updating SRAM directly on Fiji. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-05drm/amdgpu: fix KV harvestingAlex Deucher1-28/+2
Always set the graphics values to the max for the asic type. E.g., some 1 RB chips are actually 1 RB chips, others are actually harvested 2 RB chips. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=99353 Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2018-03-05drm/amd/pp: Implement update_dpm_settings on PolarisRex Zhu1-0/+97
v2: lock dpm level when update pptable by SW method use SW method to update DPM settings by updating SRAM directly on Polaris. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-05drm/amd/pp: Add a helper to set field in u32Rex Zhu2-0/+18
Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-05drm/amd/pp: Add common interface in smu for update dpm settingRex Zhu3-0/+10
it is used for adjust part of dpm settigs per workloads to change the natural dpm behavior for better perf or perf/watt. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-05drm/amd/pp: Add PCC feature support on VegaRex Zhu3-0/+36
This features controls vega peak current protection to allow for a wider compatibility with power supplies. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-05drm/amd/pp: Export new smu message for PCC feature on Vega10Rex Zhu1-2/+2
used to set PccThrottleLevel and PccResidencyThreshold Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-05drm/amd/pp: Remove cgs_query_system_infoRex Zhu14-286/+72
Get gpu info through adev directly in powerplay Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-05drm/amd/pp: Remove the wrap functions for acpi in powerplayRex Zhu5-397/+1
Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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